AN INTEGRATED CIRCUIT HAVING A FILTER WITH CHARGE BALANCING SCHEME TO REDUCE TRANSIENT DISTURBANCES - Patent 1145428

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EP 1 145 428 A3

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(88)	Date of publication A3:
	18.10.2001

(43)	Date of publication A2:
	17.10.2001 Bulletin 2001/42

(21)	Application number: 00967724.6

(22)	Date of filing: 21.09.2000

(51)	International Patent Classification (IPC)⁷: H03H 11/12

(86)	International application number:
	PCT/EP0009/222

(87)	International publication number:
	WO 0124/363 (05.04.2001 Gazette 2001/14)

(84)	Designated Contracting States:
	AT BE CH CY DE DK ES FI FR GB GR IE IT LI LU MC NL PT SE
	Designated Extension States:
	AL LT LV MK RO SI

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Priority:

28.09.1999 US 407776
22.12.1999 US 469873

(71)	Applicant: Koninklijke Philips Electronics N.V.
	5621 BA Eindhoven (NL)

(72)	Inventor:
	BHANDARI, Sanjay, M. NL-5656 AA Eindhoven (NL)

(74)	Representative: Charpail, François
	Philips Corporate Intellectual Property,156 Boulevard Haussmann 75008 Paris 75008 Paris (FR)


	Remarks:
	WIPO A3 publication data is not currently available.

(54)	AN INTEGRATED CIRCUIT HAVING A FILTER WITH CHARGE BALANCING SCHEME TO REDUCE TRANSIENT DISTURBANCES