(19)
(11) EP 1 251 518 B8

(12) CORRECTED EUROPEAN PATENT SPECIFICATION
Note: Bibliography reflects the latest situation

(15) Correction information:
Corrected version no 1 (W1 B1)

(48) Corrigendum issued on:
18.07.2012 Bulletin 2012/29

(45) Mention of the grant of the patent:
07.03.2012 Bulletin 2012/10

(21) Application number: 01310380.9

(22) Date of filing: 12.12.2001
(51) International Patent Classification (IPC): 
G11C 7/22(2006.01)
G11C 11/4096(2006.01)
 G11C 7/10(2006.01)
G11C 11/4076(2006.01)

(54)

Method and apparatus for high-speed read operation in semiconductor memory

Verfahren und Apparat für schnelle Lesevorgänge in Halbleiterspeichern

Méthode et appareil pour opérations de lecture rapide de mémoires à semiconducteurs

(84) Designated Contracting States:
DE FR GB

(30) Priority: 09.04.2001 JP 2001109901

(43) Date of publication of application:
23.10.2002 Bulletin 2002/43

(73) Proprietor: Fujitsu Semiconductor Limited
Kohoku-ku, Yokohama-shi Kanagawa 222-0033 (JP)

(72) Inventors:
  • Uchida, Toshiya, c/o Fujitsu Limited
    Kawasaki-shi, Kanagawa 211-8588 (JP)
  • Matsuzaki, Yasurou, c/o Fujitsu Limited
    Kawasaki-shi, Kanagawa 211-8588 (JP)

(74) Representative: Hitching, Peter Matthew et al
Haseltine Lake LLP Lincoln House, 5th Floor 300 High Holborn
London WC1V 7JH
London WC1V 7JH (GB)


(56) References cited: : 
EP-A- 1 061 523
US-A- 5 432 747
 US-A- 4 768 193
   
  • "ISSCC '87 - THE DEBUT OF THE 16MBIT DRAM" ELECTRONIC ENGINEERING, MORGAN-GRAMPIAN LTD. LONDON, GB, vol. 59, no. 724, 1 April 1987 (1987-04-01), pages 20,25-26, XP000111709 ISSN: 0013-4902
   
Note: Within nine months from the publication of the mention of the grant of the European patent, any person may give notice to the European Patent Office of opposition to the European patent granted. Notice of opposition shall be filed in a written reasoned statement. It shall not be deemed to have been filed until the opposition fee has been paid. (Art. 99(1) European Patent Convention).