MEMORY CELL WITH VERTICAL FLOATING GATE TRANSISTOR - Patent 1344250

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EP 1 344 250 A2

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(88)	Date of publication A3:
	01.05.2003

(43)	Date of publication:
	17.09.2003 Bulletin 2003/38

(21)	Application number: 01987070.8

(22)	Date of filing: 14.11.2001

(51)	International Patent Classification (IPC)⁷: H01L 21/8247, H01L 27/115, H01L 21/336, H01L 29/788

(86)	International application number:
	PCT/US0143/903

(87)	International publication number:
	WO 0204/5158 (06.06.2002 Gazette 2002/23)

(84)	Designated Contracting States:
	AT BE CH CY DE DK ES FI FR GB GR IE IT LI LU MC NL PT SE TR

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Priority:

01.12.2000 US 727955

(71)	Applicant: Infineon Technologies North America Corp.
	San Jose, CA 95112-4508 (US)

(72)	Inventor:
	CASAROTTO, Daniele Wappinger Falls, NY 12590 (US)

(74)	Representative: Epping Hermann & Fischer
	Ridlerstrasse 55 80339 München 80339 München (DE)

(54)	MEMORY CELL WITH VERTICAL FLOATING GATE TRANSISTOR