(19)
(11) EP 1 418 694 B9

(12) CORRECTED EUROPEAN PATENT SPECIFICATION
Note: Bibliography reflects the latest situation

(15) Correction information:
Corrected version no 1 (W1 B1)
Corrections, see
Description

(48) Corrigendum issued on:
19.08.2009 Bulletin 2009/34

(45) Mention of the grant of the patent:
04.03.2009 Bulletin 2009/10

(21) Application number: 03024599.7

(22) Date of filing: 28.10.2003
(51) International Patent Classification (IPC): 
H04L 1/00(2006.01)

(54)

BIT processing method for adaptive multirate modulation

Bitverarbeitungsverfahren für Multiübertragungsrate mit adaptativer Modulation

Procédé de traitement de bit pour modulation adaptative à différentes vitesses


(84) Designated Contracting States:
AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HU IE IT LI LU MC NL PT RO SE SI SK TR

(30) Priority: 31.10.2002 KR 2002067239

(43) Date of publication of application:
12.05.2004 Bulletin 2004/20

(73) Proprietor: LG Electronics Inc.
Yongdungpo-Gu Seoul (KR)

(72) Inventor:
  • Hong, Sung-Kwon
    Gyeonggi-Do, South Korea (KR)

(74) Representative: Katérle, Axel et al
Wuesthoff & Wuesthoff Patent- und Rechtsanwälte Schweigerstraße 2
81541 München
81541 München (DE)


(56) References cited: : 
EP-A- 0 961 515
WO-A-02/065723
   
     
    Remarks:
    The file contains technical information submitted after the application was filed and not included in this specification
     
    Note: Within nine months from the publication of the mention of the grant of the European patent, any person may give notice to the European Patent Office of opposition to the European patent granted. Notice of opposition shall be filed in a written reasoned statement. It shall not be deemed to have been filed until the opposition fee has been paid. (Art. 99(1) European Patent Convention).


    Description

    BACKGROUND OF THE INVENTION


    Field of the Invention



    [0001] The present invention relates to a radio communication system and, more particularly, to a discontinuous transmission (DTX) bit processing method for an adaptive multirate modulation.

    Description of the Related Art



    [0002] With the emergence of the information society, the focus of telecommunication services has shifted from low-speed voice communication services to multimedia services providing audio, video as well as voice communication. In order to support multimedia services that require high speed data transmission, it is critical to maximize the channel capacity by effectively utilizing the limited resources such as power and frequency bands.

    [0003] For effective utilization of the limited resources, various modulation techniques have been developed. In the case of a wired network, channel characteristics are stable so that high efficiency QAM modulation/demodulation techniques are widely used. A radio network, generally, is not stable compared to the wired network, due to multipath transmission and fading according to a Doppler effect. A frequency shift keying (FSK) or a phase shift keying (PSK) modulation in which 1∼2 bits are transferred per 1Hz is often used. However, recently, with the development in modulation techniques, a multirate modulation scheme such as 16-QAM, 64-QAM, or the like is adopted even in the radio network.

    [0004] The current and undergoing radio communication systems in the domestic and foreign countries are likely to adopt a fixed modulation scheme regardless of the channel state between the base station and the subscriber. Such a system has a problem in that a low rate modulation scheme is used even when a high rate modulation can be used in a good channel state, resulting in a failure to maximize the system capacity.

    [0005] Also, the system adopting the fixed modulation scheme can not change the modulation rate such that the same low rate modulation is used even when the channel state is bad. Accordingly, the transmission quality is further degraded, and this causes the communication channel to break.

    [0006] In order to solve the above problems, the 3rd Generation Partnership Project (3GPP) standard conference has discussed a High speed Downlink Packet Access (HSDPA) on the basis of adaptive modulation.

    [0007] In the quadrature phase shift keying (QPSK) modulation, a DTX bit can be allocated to one of In-Phase (I) and Quadrature (Q) axes in the IQ plane so that the transmission rate can be decreased by turning off the transmission power provided to the axis to which the DTX bit is allocated.

    [0008] Since the discussion on HSDPA started, the multirate modulation scheme such as the QAM (Quadrature Amplitude Modulation) that generates four bits out of one symbol has been adopted for flexible modulation, in which the DTX bit allocation as in the QPSK is not adopted. In the HSDPA of the 3GPP standard, a multirate modulation such as 16-QAM or 64-QAM as well as QPSK, is used. In the case of the multirate modulation, a problem is how to process the DTX bits. In this regard, WO 02/065723 A1 to Mitsubishi has proposed a DTX bit processing method in which DTX bits are grouped into one symbol and then mapped onto the origin of an IQ plane.

    [0009] FIG. 1A, FIG. 1B, FIG. 2A, and FIG. 2B illustrate the DTX bit processing method proposed by Mitsubishi. As shown in FIG. 1A, the empty region of a frame is allocated to a 4-bit DTX symbol and then the DTX symbol is mapped onto the origin of the IQ plane (see FIG. 1B). In FIG. 2A and FIG. 2B, the empty region of a frame is allocated to each 4 bit symbol to be transmitted by 2 bits so that only 4 symbol points of the IQ plane are used for transmission. Similar methods are proposed in EP 1 271 874 and EP 0 961 515.

    [0010] The above DTX bit processing method has a drawback in that this method may not be compatible with the currently developing system since this method requires modification of the current multiplexing scheme. Also, it is very complicated to implement the algorithm in which DTX bits are grouped in one symbol so as to be mapped onto the origin or 2 bits are inserted into each data symbol so that the data symbols can be transmitted using only four symbol points on the IQ plane.

    SUMMARY OF THE INVENTION



    [0011] A DTX bit processing method for a multi rate modulation scheme, a DTX bit processing system, and a transmitter of a base station modem are provided according to claims 1, 5, and 6, respectively.

    [0012] The mapping point is calculated by averaging the signal points in which the bits corresponding to the non-DTX bits of the symbol are identical with each other on the IQ plane. The mapping point is set in consideration of at least one of the number of the non-DTX bits, the number of the selected signal points, and the locations of the selected signal points on the IQ plane. The symbol is mapped onto an origin of the IQ plane, when all bits of the symbol are DTX bits.

    [0013] The symbol is mapped onto a signal point in which the bits are identical with the bits comprised in the symbol on the IQ plane when the symbol has no DTX bit. The mapping point is set in consideration of plus and minus symbols of the signal points on the IQ plane. In some embodiments, the mapping point is set in consideration of at least one of the number of the non-DTX bits, the number of the selected signal points, and the locations of the selected signal points on the IQ plane.

    [0014] In certain embodiments, the symbol is mapped onto an origin of the IQ Plane, when all bits of the symbol are DTX bits. The symbol is mapped onto a signal point of which the bits are identical with the bits comprised in the symbol on the IQ plane, when the symbol has no DTX bit. In one embodiment of the present invention, a DTX bit processing method reduces the transmission power consumption by mapping a symbol having DTX bits onto a predetermined signal point, on an IQ plane.

    [0015] These and other embodiments of the present invention will also become readily apparent to those skilled in the art from the following detailed description of the embodiments having reference to the attached figures, the invention not being limited to any particular embodiments disclosed.

    BRIEF DESCRIPTION OF THE DRAWINGS



    [0016] The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description serve to explain the principles of the invention.

    [0017] FIG. 1A illustrates a conventional method for inserting DTX bits into symbols in accordance with one or more embodiments;

    [0018] FIG. 1B illustrates how a symbol having DTX bits of FIG. 1A is mapped on an IQ plane in accordance with one or more embodiments;

    [0019] FIG. 2A illustrates a conventional method for inserting DTX bits into symbols in accordance with one or more embodiments;

    [0020] FIG. 2B illustrates how a symbol having DTX bits of FIG. 2A is mapped on an IQ plane in accordance with one or more embodiments;

    [0021] FIG. 3 is a schematic view illustrating a transmitter of a base station modem adopting a DTX bit processing method in accordance with one embodiment of the present invention;

    [0022] FIG. 4A is an exemplary constellation diagram of a 16-QAM in accordance with one embodiment;

    [0023] FIG. 4B illustrates how a symbol having DTX bits is mapped on an IQ plane in accordance with one embodiment of the present invention; and

    [0024] FIG. 5 is a flowchart illustrating a DTX bit processing method in accordance with one embodiment of the invention.

    [0025] Features, elements, and aspects of the invention that are referenced by the same numerals in different figures represent the same, equivalent, or similar features, elements, or aspects in accordance with one or more embodiments of the system.

    DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS



    [0026] Referring to FIG. 3, a transmitter of a base station modem comprises a transport channel (TrCH) multiplexer 10 for multiplexing radio frames from all TrCHs into a composite transport channel (CCTrCH); a DTX insertion module 20 for inserting DTX bits into the radio frames of the CCTrCH; a physical channel segmentation module 30 for segmenting the CCTrCH into different physical channels (PhCHs); an interleaver 40 for interleaving the segments; and a PhCH mapping module 50 for mapping the segments onto the corresponding PhCHs.

    [0027] FIG. 4A is a typical constellation diagram of a 16-QAM and FIG. 4B is a constellation diagram for illustrating how a symbol having DTX bits is mapped on an IQ plane in accordance with the present invention. As shown in FIG. 4A, 4 bits are allocated to determine a symbol in the 16-QAM (as a matter of course, 6 bits are to be allocated in the 64-QAM), for example. Accordingly, one to four DTX bits can be allocated to the symbol.

    [0028] In the multirate modulation of MQAM, 'M' is the exponentiation value of 2. Accordingly, 1 to M DTX bits can be inserted into one symbol. DTX bits can be positioned in the symbol modulated by MQAM according to the number of DTX bits. In some embodiments, the symbol in which M bits are DTX bits is mapped onto the origin of the IQ plane and the symbol including DTX bit(s) less than M are mapped onto a predetermined signal point, on an IQ plane. The IQ plane is defined by averaging the vectors of the signal points. The bits corresponding to the non-DTX bits of the symbol are identical with each other, in consideration of the quadrants to which the signal points are located, for example.

    [0029] Referring to FIG. 4B, when a symbol having, for example, a bit order of 1XX0 (X is DTX bit) is input, 4 signal points (e.g., 1000, 1010, 1100, and 1110) are selected on the IQ plane. The left most bit and the right most bit can be identical with each other. The vector values of the 4 signal points are averaged so as to obtain a mapping point (S). Accordingly, the symbol of 1xx0 is mapped onto the mapping point (S).

    [0030] In the same manner, when, for example, a symbol of 1XXX is input, eight signal points (i.e., 1011, 1001, 1010, 1000, 1110, 1100, 1111, and 1101) of which the left-most bit is one and the others are DTX bits are selected and averaged for calculating the mapping point (S). The mapping point (S) for the symbol of 1xxx is defined in consideration of the number of the non-DTX bits, the number of the selected signal points, and the locations of the selected signal points on the IQ plane so as to distinguish it from the mapping point for the symbol of 1xx0. In certain embodiments, the symbol in which all the bits are DTX bits is mapped onto the origin of the IQ plane. For example, 16QAM is adopted in one embodiment.

    [0031] FIG. 5 is a flowchart illustrating the DTX bit processing method in accordance with one embodiment of the present invention. In FIG. 5, when a 2^M bit QAM modulated signal is input to the DTX insertion module 20 from the TrCH multiplexer 10, the DTX insertion module 20 inserts DTX bits into the signal to be transmitted, if required. After passing through the DTX insertion module 20, the signal is segmented by the physical channel segmentation module 30, interleaved by the interleave 40 and then transmitted to the physical channel mapping module 50 (at step S106), for example.

    [0032] The physical channel mapping module 50 determines whether or not there exists DTX bit(s) in the input signal (step S102). In some embodiments, if there is a DTX bit in the symbol, the physical channel mapping module 50 selects the signal points in which the bit(s) corresponding to the non-DTX bit(s) of the symbol is/are identical with each other on the IQ plane (step S103) and averages the vectors of the signal points on the basis of the I and Q axes of the IQ plane so as to define a mapping point (S) (step S104). In this case the mapping point (S) is defined in consideration of the number of the non-DTX bits, the number of the selected signal points, and the locations of the selected signal points on the IQ plane.

    [0033] Subsequently, the physical channel mapping module 50 maps the symbols onto the mapping point (S) (step S105) and transmits the symbol in the power level associated with the mapping point (S) (step S106). The symbol in which all the bits are DTX bits is mapped onto the origin of the IQ plane.

    [0034] In certain embodiments, in the DTX bit processing method, the symbol having the DTX bit(s) is mapped onto a mapping point which requires a low transmission power lever so that it is possible to minimize the transmission power consumption without modifying the typical modulation scheme for the HSDPA system.

    [0035] Also, the DTX bit processing method of the present invention has an advantage in that the DTX bit processing algorithm can be simply implemented and easily applied to existing communication systems since this does not require any modification of the conventional modulation algorithm.

    [0036] The embodiments described above are to be considered in all aspects as illustrative only and not restrictive in any manner. Thus, other exemplary embodiments, system architectures, platforms, and implementations that can support various aspects of the invention may be utilized without departing from the essential characteristics described herein. These and various other adaptations and combinations of features of the embodiments disclosed are within the scope of the invention. The invention is defined by the claims.


    Claims

    1. A discontinuous transmission, abbreviated DTX, bit processing method for a multirate modulation scheme, comprising the steps of:

    - receiving (S101) a symbol consisting of a plurality of bits;

    - determining (S102) whether the symbol comprises at least one DTX bit;

    - mapping (S105) the symbol to a mapping point in an IQ plane of a modulation constellation, the modulation constellation defining a predetermined signal point in relation to each bit combination of a symbol having no DTX bits; and

    - transmitting (S106) the symbol at a power level of the mapping point;

    wherein the mapping point of the symbol is one of the predetermined signal points having an identical bit combination as the symbol if the determining step (S102) determines that the symbol has no DTX bits; and
    the mapping point of the symbol is calculated by vector averaging (S104) a plurality of said predetermined signal points having identical bits with the symbol in all non-DTX bit positions, if the determining step (S102) determines that the symbol comprises at least one DTX bit.
     
    2. The method of claim 1, wherein if the symbol comprises at least one DTX bit, the mapping point is set in consideration of at least one of the number of non-DTX bits in the symbol, the number of selected signal points, and the location of the selected signal points in the IQ plane.
     
    3. The method of claim 1 or 2, wherein if all the bits of the symbol are DTX bits, the symbol is mapped to an origin of the IQ plane.
     
    4. The method of any one of claims 1 to 3, wherein the mapping point is set in consideration of plus and minus symbols of the signal points in the IQ plane.
     
    5. A DTX bit processing system comprising means for carrying out a method as defined in any one preceding claim.
     
    6. A transmitter of a base station modem comprising:

    - a transport channel multiplexer (10) for multiplexing radio frames from a plurality of transport channels into a composite transport channel;

    - a DTX insertion module (20) for inserting DTX bits into the radio frames of the composite transport channel, wherein the DTX insertion module (20) comprises a DTX bit processing system as defined in claim 5;

    - a physical channel segmentation module (30) for segmenting the composite transport channel for different physical channels to produce a plurality of segments;

    - an interleaver (40) for interleaving the segments; and

    - a physical channel mapping module (50) for mapping the segments to the corresponding physical channels.


     


    Ansprüche

    1. Bitverarbeitungsverfahren für eine Mehrraten-Modulationstechnik mit diskontinuierlicher Übertragung, abgekürzt DTX, umfassend die Schritte:

    - Empfangen (S101) eines aus mehreren Bits bestehenden Symbols,

    - Feststellen (S102), ob das Symbol mindestens ein DTX-Bit enthält,

    - Abbilden (S105) des Symbols auf einen Abbildungspunkt in einer IQ-Ebene einer Modulationskonstellation, wobei die Modulationskonstellation für jede Bitkombination eines von DTX-Bits freien Symbols einen vorbestimmten Signalpunkt definiert, und

    - Übertragen (S106) des Symbols mit einer durch den Abbildungspunkt gegebenen Leistung,

    wobei im Fall der Feststellung durch den Feststellungsschritt (S102), dass das Symbol frei von DTX-Bits ist, der Abbildungspunkt ein solcher der vorbestimmten Signalpunkte ist, der eine identische Bitkombination wie das Symbol aufweist, und
    wobei im Fall der Feststellung durch den Feststellungsschritt (S102), dass das Symbol wenigstens ein DTX-Bit enthält, der Abbildungspunkt des Symbols durch vektorielle Durchschnittsbildung (S104) mehrerer solcher der vorbestimmten Signalpunkte berechnet wird, die an allen Nicht-DTX-Bitpositionen identische Bits wie das Symbol aufweisen.
     
    2. Verfahren nach Anspruch 1, wobei im Fall, dass das Symbol wenigstens ein DTX-Bit enthält, der Abbildungspunkt unter Berücksichtigung der Anzahl von Nicht-DTX-Bits in dem Symbol oder/und der Anzahl ausgewählter Signalpunkte oder/und der Lage der ausgewählten Signalpunkte in der IQ-Ebene festgelegt wird.
     
    3. Verfahren nach Anspruch 1 oder 2, wobei im Fall, dass alle Bits des Symbols DTX-Bits sind, das Symbol auf den Ursprung der großen IQ-Ebene abgebildet wird.
     
    4. Verfahren nach einem der Ansprüche 1 bis 3, wobei der Abbildungspunkt unter Berücksichtigung von Plus- und Minus-Symbolen der Signalpunkte in der IQ-Ebene festgelegt wird.
     
    5. DTX-Bitverarbeitungssystem mit Mitteln zur Durchführung eines Verfahrens nach einem der vorhergehenden Ansprüche.
     
    6. Sender eines Basisstationsmodems, umfassend:

    - einen Transportkanalmultiplexer (10) zum Multiplexieren von Funkrahmen mehrerer Transportkanäle auf einen Komposittransportkanal,

    - ein DTX-Einfügungsmodul (20) zum Einfügen von DTX-Bits in die Funkrahmen des Komposittransportkanals, wobei das DTX-Einfügungsmodul (20) ein DTX-Bitverarbeitungssystem gemäß Anspruch 5 umfasst,

    - ein Segmentierungsmodul (30) zum Segmentieren des Komposittransportkanals für unterschiedliche physikalische Kanäle, um so eine Mehrzahl Segmente zu erzeugen,

    - eine Verschachtelungsanordnung (40) zum Verschachteln der Segmente und

    - ein Abbildungsmodul (50) zum Abbilden der Segmente auf die entsprechenden physikalischen Kanäle.


     


    Revendications

    1. Procédé de traitement de bits en transmission discontinue, abrégée DTX, pour un schéma de modulation à débits multiples, comprenant les étapes de :

    - réception (S101) d'un symbole constitué d'une pluralité de bits ;

    - détermination (S102) si le symbole comprend au moins un bit DTX ;

    - mappage (S105) du symbole en un point de mappage dans un plan IQ d'une constellation de modulation, la constellation de modulation définissant un point de signal prédéterminé en relation à chaque combinaison de bits d'un symbole ne possédant pas de bits DTX ; et

    - transmission (S106) du symbole à un niveau de puissance du point de mappage ;

    dans lequel le point de mappage du symbole est l'un des points de signaux prédéterminés possédant une combinaison de bits identique au symbole si l'étape de détermination (S102) détermine que le symbole ne possède pas de bits DTX ; et
    le point de mappage du symbole est calculé par une pondération de vecteur (S104) d'une pluralité desdits points de signaux prédéterminés possédant des bits identiques avec le symbole dans tous les emplacements de bits non DTX, si l'étape de détermination (S102) détermine que le symbole comprend au moins un bit DTX.
     
    2. Procédé selon la revendication 1, dans lequel, si le symbole comprend au moins un bit DTX, le point de mappage est défini en considération d'au moins l'un du nombre de bits non DTX dans le symbole, du nombre de points de signaux sélectionnés, et de l'emplacement des points de signaux sélectionnés dans le plan IQ.
     
    3. Procédé selon la revendication 1 ou 2, dans lequel si tous les bits du symbole sont des bits DTX, le symbole est mappé sur une origine du plan IQ.
     
    4. Procédé selon l'une quelconque des revendications 1 à 3, dans lequel le point de mappage est défini en considération des symboles plus et moins des points de signaux dans le plan IQ.
     
    5. Système de traitement de bits DTX comprenant un moyen d'exécution d'un procédé selon l'une quelconque des revendications précédentes.
     
    6. Émetteur d'un modem de station de base comprenant :

    - un multiplexeur de canaux de transport (10) destiné à multiplexer des trames radio depuis une pluralité de canaux de transport en un canal de transport composite ;

    - un module d'insertion DTX (20) destiné à insérer des bits DTX dans les trames radio du canal de transport composite, dans lequel le module d'insertion DTX (20) comprend un système de traitement de bits DTX selon la revendication 5 ;

    - un module de segmentation de canal physique (30) destiné à segmenter le canal de transport composite pour différents canaux physiques pour produire une pluralité de segments ;

    - un entrelaceur (40) destiné à entrelacer les segments ; et

    - un module de mappage de canal physique (50) destiné à mapper les segments dans les canaux physiques correspondants.


     




    Drawing


























    Cited references

    REFERENCES CITED IN THE DESCRIPTION



    This list of references cited by the applicant is for the reader's convenience only. It does not form part of the European patent document. Even though great care has been taken in compiling the references, errors or omissions cannot be excluded and the EPO disclaims all liability in this regard.

    Patent documents cited in the description