(19)
(11) EP 1 469 367 A3

(12) EUROPEAN PATENT APPLICATION

(88) Date of publication A3:
06.07.2005 Bulletin 2005/27

(43) Date of publication A2:
20.10.2004 Bulletin 2004/43

(21) Application number: 04251107.1

(22) Date of filing: 27.02.2004
(51) International Patent Classification (IPC)7: G05F 1/565
(84) Designated Contracting States:
AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HU IE IT LI LU MC NL PT RO SE SI SK TR
Designated Extension States:
AL LT LV MK

(30) Priority: 15.04.2003 JP 2003110435

(71) Applicant: Mitsumi Electric Co., Ltd.
Tama-Shi, Tokyo (JP)

(72) Inventors:
  • Takano, Youichi, c/o Mitsumi Electric Co., Ltd.
    Atsugi-shi Kanagawa (JP)
  • Narita, Mitsufusa, c/o Mitsumi Electric Co., Ltd.
    Atsugi-shi Kanagawa (JP)

(74) Representative: Moir, Michael Christopher et al
Mathys & Squire, 120 Holborn
London EC1N 2SQ
London EC1N 2SQ (GB)

   


(54) Voltage regulator circuit with oscillation suppression


(57) A regulator circuit comprises a phase correcting circuit portion (40). The phase correcting circuit portion (40) comprises a current correcting transistor (M11) combined with an output transistor to form a current mirror circuit. An I-V converting resistor (R4) is connected to the current correcting transistor (M11) to convert a current flowing through the phase correcting circuit portion (40) into a feedback voltage which is proportional to an output voltage and independent of an output capacitor (Co). A phase correcting capacitor (C1) and a resistor (R5) correct the error signal according to the feedback voltage.






Search report