PARTIALLY PATTERNED LEAD FRAMES AND METHODS OF MAKING AND USING THE SAME IN SEMICONDUCTOR PACKAGING - Patent 1500130

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EP 1 500 130 A1

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(43)	Date of publication:
	26.01.2005 Bulletin 2005/04

(21)	Application number: 03733901.7

(22)	Date of filing: 28.04.2003

(51)	International Patent Classification (IPC)⁷: H01L 21/44, H01L 21/48, H01L 21/50, H01L 23/28, H01L 23/495

(86)	International application number:
	PCT/US2003/013046

(87)	International publication number:
	WO 2003/103038 (11.12.2003 Gazette 2003/50)

(84)	Designated Contracting States:
	AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HU IE IT LI LU MC NL PT RO SE SI SK TR
	Designated Extension States:
	AL LT LV MK

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Priority:

29.04.2002 US 134882
15.01.2003 US 342732

(71)	Applicant: Advanced Interconnect Technologies Limited
	Port Louis, Mauritius (MU)

(72)	Inventors:
	ISLAM, Shafidul Plano, TX 75025 (US) SAN ANTONIO, Romarico S.,Taman Duta Mas Indonesia 29433 (ID)

(74)	Representative: Lucas, Brian Ronald
	Lucas & Co.135 Westhall Road Warlingham,Surrey CR6 9HJ Warlingham,Surrey CR6 9HJ (GB)

(54)	PARTIALLY PATTERNED LEAD FRAMES AND METHODS OF MAKING AND USING THE SAME IN SEMICONDUCTOR PACKAGING