(19)
(11) EP 1 521 207 A8

(12) CORRECTED EUROPEAN PATENT APPLICATION

(48) Corrigendum issued on:
20.07.2005 Bulletin 2005/29

(43) Date of publication:
06.04.2005 Bulletin 2005/14

(21) Application number: 04255449.3

(22) Date of filing: 08.09.2004
(51) International Patent Classification (IPC)7G06K 19/07, G06K 19/077
(84) Designated Contracting States:
AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HU IE IT LI LU MC NL PL PT RO SE SI SK TR
Designated Extension States:
AL HR LT LV MK

(30) Priority: 11.09.2003 JP 2003319280

(71) Applicants:
  • Fec Co., Ltd.
    Ishikawa-ken (JP)
  • The Government of Malaysia
    62502 Putrajaya (MY)

(72) Inventors:
  • Sugimura, Shiro
    Kanazawa-shi Ishikawa-ken (JP)
  • Kobayashi, Hideki
    Kanazawa-shi Ishikawa-ken (JP)
  • Taniguchi, Shuhei
    Nomi-gun Ishikawa-ken (JP)

(74) Representative: Turner, James Arthur et al
D Young & Co 120 Holborn
London EC1N 2DY
London EC1N 2DY (GB)

   


(54) IC chip for identification


(57) Restrictions on the frequency of a carrier signal are removed. This invention comprises a power section for receiving the carrier signal and creating an internal voltage, a clock-generating section for creating an internal clock based on a clock pulse that is carried by the carrier signal, a memory section, a writing section for storing data that is carried on an optical signal in the memory section, and an output section for reading the data in the memory and load-modulating the carrier signal.