GROUNDED GATE AND ISOLATION TECHNIQUES FOR REDUCING DARK CURRENT IN CMOS IMAGE SENSORS - Patent 1563544

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EP 1 563 544 A1

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(43)	Date of publication:
	17.08.2005 Bulletin 2005/33

(21)	Application number: 03786643.1

(22)	Date of filing: 12.11.2003

(51)	International Patent Classification (IPC)⁷: H01L 27/146, H01L 27/148

(86)	International application number:
	PCT/US2003/035859

(87)	International publication number:
	WO 2004/044989 (27.05.2004 Gazette 2004/22)

(84)	Designated Contracting States:
	AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HU IE IT LI LU MC NL PT RO SE SI SK TR
	Designated Extension States:
	AL LT LV MK

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Priority:

12.11.2002 US 291728
12.11.2002 US 291772

(71)	Applicant: MICRON TECHNOLOGY, INC.
	Boise, ID 83707-0006 (US)

(72)	Inventors:
	MOULI, Chandra Boise, ID 83712 (US) RHODES, Howard Boise, ID 83706 (US)

(74)	Representative: Collins, John David
	Marks & Clerk90 Long Acre London WC2E 9RA London WC2E 9RA (GB)

(54)	GROUNDED GATE AND ISOLATION TECHNIQUES FOR REDUCING DARK CURRENT IN CMOS IMAGE SENSORS