(19)
(11) EP 1 564 813 A3

(12) EUROPEAN PATENT APPLICATION

(88) Date of publication A3:
10.10.2007 Bulletin 2007/41

(43) Date of publication A2:
17.08.2005 Bulletin 2005/33

(21) Application number: 05003091.5

(22) Date of filing: 14.02.2005
(51) International Patent Classification (IPC): 
H01L 27/148(2006.01)
(84) Designated Contracting States:
AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HU IE IS IT LI LT LU MC NL PL PT RO SE SI SK TR
Designated Extension States:
AL BA HR LV MK YU

(30) Priority: 16.02.2004 JP 2004038266

(71) Applicant: FUJIFILM Corporation
Minato-ku Tokyo (JP)

(72) Inventor:
  • Yamada, Tetsuo
    Taiwa-cho Kurokawa-gun Miyagi (JP)

(74) Representative: Hughes, Andrea Michelle 
Frank B. Dehn & Co. St Bride's House 10 Salisbury Square
London EC4Y 8JD
London EC4Y 8JD (GB)

   


(54) Solid state imaging device with increased vertical resolution in interlace scanning method


(57) A solid state imaging device comprises a semiconductor substrate defining a two-dimensional surface, a plurality of photoelectric conversion elements disposed in a light receiving area of said semiconductor substrate in a plurality of rows and columns, an electric charge read-out device that reads out signal electric charges accumulated in said plurality of photoelectric conversion elements in interlace by dividing the signal electric charges in a plurality of fields, each field at least including the signal electric charges accumulated in the vertically adjacent photoelectric conversion elements corresponding to one color, and a vertical adding device that adds, for each field, the read-out signal electric charges divided into the plurality of fields. A solid state imaging device that can increase vertical resolution at a time of an interlace operation is provided.







Search report