(19)
(11) EP 1 565 994 A1

(12)

(43) Date of publication:
24.08.2005 Bulletin 2005/34

(21) Application number: 03774851.4

(22) Date of filing: 15.10.2003
(51) International Patent Classification (IPC)7H04B 1/707
(86) International application number:
PCT/US2003/032757
(87) International publication number:
WO 2004/036783 (29.04.2004 Gazette 2004/18)
(84) Designated Contracting States:
AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HU IE IT LI LU MC NL PT RO SE SI SK TR
Designated Extension States:
AL LT LV MK

(30) Priority: 15.10.2002 US 418188 P

(71) Applicant: Tensorcomm Incorporated
Westminster, CO 80234 (US)

(72) Inventors:
  • NARAYAN, Anand, P.
    Boulder, CO 80302 (US)
  • JAIN, Prashant
    Northglenn, CO 80233 (US)
  • OLSON, Eric, S.
    Boulder, CO 80301 (US)

(74) Representative: Barnfather, Karl Jon et al
Withers & Rogers LLP Goldings House, 2 Hays Lane
London SE1 2HW
London SE1 2HW (GB)

   


(54) CHIP LEVEL PHASE ADJUSTMENT