(19)
(11) EP 1 643 550 A3

(12) EUROPEAN PATENT APPLICATION

(88) Date of publication A3:
21.03.2007 Bulletin 2007/12

(43) Date of publication A2:
05.04.2006 Bulletin 2006/14

(21) Application number: 05255765.9

(22) Date of filing: 16.09.2005
(51) International Patent Classification (IPC): 
H01L 23/04(2006.01)
H05K 9/00(2006.01)
 H01L 23/10(2006.01)
H01P 1/16(2006.01)
(84) Designated Contracting States:
AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HU IE IS IT LI LT LU LV MC NL PL PT RO SE SI SK TR
Designated Extension States:
AL BA HR MK YU

(30) Priority: 17.09.2004 JP 2004271667

(71) Applicant: NTT DoCoMo, Inc.
Tokyo 100-6150 (JP)

(72) Inventors:
  • Koizumi, Daisuke, c/o NTT DoCoMo Inc. I.P. Dept.
    Chiyoda-ku, Tokyo 100-6150 (JP)
  • Satoh, Kei, c/o NTT DoCoMo Inc. I.P. Dept.
    Chiyoda-ku, Tokyo 100-6150 (JP)
  • Narahashi, Shoichi, c/o NTT DoCoMo Inc. I.P. Dept.
    Chiyoda-ku, Tokyo 100-6150 (JP)
  • Masamura, Tatsuro, c/o NTT DoCoMo Inc. I.P. Dept.
    Chiyoda-ku, Tokyo 100-6150 (JP)

(74) Representative: Maury, Richard Philip 
Marks & Clerk 90 Long Acre
London WC2E 9RA
London WC2E 9RA (GB)

   


(54) A planar circuit housing


(57) A planar circuit housing (300) for containing a planar circuit (120) is disclosed. The planar circuit housing (300) comprises a support portion (341) for supporting edges of the planar circuit (120), the support portion (341) being provided on at least one housing internal surface substantially perpendicular to the planar circuit substrate (120); an upper cavity (380) in the housing (300) above the planar circuit (120); and a lower cavity (382) in the housing (300) below the planar circuit (120), the lower cavity (382) having the same sizes as the upper cavity (380) in directions parallel with the planar circuit substrate (120).







Search report