(19)
(11) EP 1 652 229 A1

(12)

(43) Date of publication:
03.05.2006 Bulletin 2006/18

(21) Application number: 04744304.9

(22) Date of filing: 04.08.2004
(51) International Patent Classification (IPC): 
H01L 21/762(1995.01)
(86) International application number:
PCT/IB2004/002693
(87) International publication number:
WO 2005/013355 (10.02.2005 Gazette 2005/06)
(84) Designated Contracting States:
AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HU IE IT LI LU MC NL PL PT RO SE SI SK TR

(30) Priority: 04.08.2003 FR 0309597
29.01.2004 US 766207

(71) Applicant: S.O.I.Tec Silicon on Insulator Technologies
38190 Bernin (FR)

(72) Inventors:
  • SCHWARZENBACH, Walter
    F-38330 Saint Nazaire les Eymes (FR)
  • MALEVILLE, Christophe
    F-38660 La Terrasse (FR)
  • BEN MOHAMED, Nadia
    F-38140 Renage (FR)

(74) Representative: Collin, Jérôme et al
Cabinet Régimbeau 20, rue de Chazelles
75847 Paris Cedex 17
75847 Paris Cedex 17 (FR)

   


(54) METHOD OF DETACHING A SEMICONDUCTOR LAYER