(57) Systems for displaying images are provided. A representative system comprises a signal driving circuit comprising a plurality of shift (SR1...SRN) registers connected in series and controlled only by a first clock (CLK1) and a second clock (CLK2), generating corresponding driving pulses in turn in response to a start pulse (STP). Each shift register comprises a pulse generation unit with a first clock input terminal receiving one of the first (AT) and the second clocks (BT) and a first power terminal (P1) coupled to a first power voltage (VDD), and a leakage protection unit coupled to the pulse generation unit, electrically separating the first power voltage from the received clock at the first clock input terminal.