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<ep-patent-document id="EP06008131A1" file="EP06008131NWA1.xml" lang="en" country="EP" doc-number="1847901" kind="A1" date-publ="20071024" status="n" dtd-version="ep-patent-document-v1-1">
<SDOBI lang="en"><B000><eptags><B001EP>ATBECHDEDKESFRGBGRITLILUNLSEMCPTIESILTLVFIROMKCYALTRBGCZEEHUPLSKBAHRISYU........</B001EP><B005EP>J</B005EP><B007EP>DIM360 (Ver 1.5  21 Nov 2005) -  1100000/0</B007EP></eptags></B000><B100><B110>1847901</B110><B120><B121>EUROPEAN PATENT APPLICATION</B121></B120><B130>A1</B130><B140><date>20071024</date></B140><B190>EP</B190></B100><B200><B210>06008131.2</B210><B220><date>20060419</date></B220><B250>en</B250><B251EP>en</B251EP><B260>en</B260></B200><B400><B405><date>20071024</date><bnum>200743</bnum></B405><B430><date>20071024</date><bnum>200743</bnum></B430></B400><B500><B510EP><classification-ipcr sequence="1"><text>G05F   1/59        20060101AFI20060925BHEP        </text></classification-ipcr></B510EP><B540><B541>de</B541><B542>Eingangsabfrageleitung für Low-Headroom-Regler</B542><B541>en</B541><B542>Input sense line for low headroom regulators</B542><B541>fr</B541><B542>Ligne de capteur d'entrée pour les régulateurs de dégagement</B542></B540><B590><B598>1</B598></B590></B500><B700><B710><B711><snm>Infineon Technologies AG</snm><iid>03894611</iid><irf>IO060402PEP</irf><adr><str>St. Martin-Strasse 53</str><city>81669 München</city><ctry>DE</ctry></adr></B711></B710><B720><B721><snm>Grewing, Christian</snm><adr><str>Trädgardsvägen 79</str><city>19146 Sollentuna</city><ctry>SE</ctry></adr></B721><B721><snm>Einerman, Wenche</snm><adr><str>Farkostvägen 2</str><city>18135 Lidingö</city><ctry>SE</ctry></adr></B721><B721><snm>Emericks, Anders</snm><adr><str>Näckrosvägen 20</str><city>16937 Solna</city><ctry>SE</ctry></adr></B721></B720><B740><B741><snm>Zimmermann, Tankred Klaus</snm><sfx>et al</sfx><iid>00087401</iid><adr><str>Schoppe, Zimmermann, Stöckeler &amp; Zinkler 
Patentanwälte 
Postfach 246</str><city>82043 Pullach bei München</city><ctry>DE</ctry></adr></B741></B740></B700><B800><B840><ctry>AT</ctry><ctry>BE</ctry><ctry>BG</ctry><ctry>CH</ctry><ctry>CY</ctry><ctry>CZ</ctry><ctry>DE</ctry><ctry>DK</ctry><ctry>EE</ctry><ctry>ES</ctry><ctry>FI</ctry><ctry>FR</ctry><ctry>GB</ctry><ctry>GR</ctry><ctry>HU</ctry><ctry>IE</ctry><ctry>IS</ctry><ctry>IT</ctry><ctry>LI</ctry><ctry>LT</ctry><ctry>LU</ctry><ctry>LV</ctry><ctry>MC</ctry><ctry>NL</ctry><ctry>PL</ctry><ctry>PT</ctry><ctry>RO</ctry><ctry>SE</ctry><ctry>SI</ctry><ctry>SK</ctry><ctry>TR</ctry></B840><B844EP><B845EP><ctry>AL</ctry></B845EP><B845EP><ctry>BA</ctry></B845EP><B845EP><ctry>HR</ctry></B845EP><B845EP><ctry>MK</ctry></B845EP><B845EP><ctry>YU</ctry></B845EP></B844EP></B800></SDOBI>
<abstract id="abst" lang="en">
<p id="pa01" num="0001">The invention relates to a voltage regulator circuit 1 for providing a regulated output voltage. The regulator circuit 1 comprises an input pad 2, an output pad 3 and a first active device 6 for regulating the output voltage. The voltage regulator circuit is characterised in that a second active device 7 is arranged between the input pad 2 and output pad 3. The first active device 6 and the second active device 7 are connected in parallel between the input pad 2 and output pad 3. The invention accounts for voltage drops on the input line.
<img id="iaf01" file="imgaf001.tif" wi="98" he="105" img-content="drawing" img-format="tif"/></p>
</abstract><!-- EPO <DP n="1"> -->
<description id="desc" lang="en">
<heading id="h0001"><b>Field of the invention</b></heading>
<p id="p0001" num="0001">The invention relates to the field of voltage regulators, and in particular to a voltage regulator having an improved layout as defined in claim 1.</p>
<heading id="h0002"><b>Background of the invention</b></heading>
<p id="p0002" num="0002">Linear voltage regulators are available as integrated circuits and provide a regulated output voltage adjusting for variations in a supply voltage. Further, the regulated output voltage of a linear voltage regulator should also be independent of the load current. All linear regulators require an input voltage that is at least some minimum amount higher than the desired output voltage. This headroom, i.e. the input-to-output voltage drop, is specified for a given regulator. However, the regulator should not require a great amount of overhead in voltage or current in order to function properly, since a regulator having a small minimum required voltage across it dissipates as little internal power as possible and thus has the highest efficiency. Low headroom regulators provide a minimum of "wasted" current and show a high efficiency.</p>
<p id="p0003" num="0003">For low voltage power supplies sense lines can be connected between sense terminals of the regulator to measure the voltage immediately at the load and by this compensate for any voltage drop on the load lines. The nominal output voltage always refers to the actual output terminals and compensation of the voltage drop on the load lines is generally restricted to a maximum of 5% of the nominal voltage and has to be considered when choosing a supply.<!-- EPO <DP n="2"> --></p>
<p id="p0004" num="0004">For regulators with high load current and low headroom an output sense line is thus state of the art. The large area of the active device requires substantial wire lines to provide the necessary connections, and such wire lines will cause some voltage drop. The voltage at the output pad will be taken into the regulation circuitry rather than the voltage at the active device, thereby taking the voltage drop on the output line into account.</p>
<p id="p0005" num="0005">However, this prior art way of combating voltage drops along supply lines caused by wire and/or printed circuit resistance is insufficient in some cases.</p>
<p id="p0006" num="0006">It would therefore be desirable to provide an improved voltage regulator for handling voltage drops on the circuit wire lines.</p>
<heading id="h0003"><b>Summary of the invention</b></heading>
<p id="p0007" num="0007">It is an object of the invention to provide a voltage regulator with an optimized design presenting an improved performance.</p>
<p id="p0008" num="0008">It is another object of the invention to improve the performance of the regulator circuit by taking voltage drops on the input line into account. Further, the voltage drop on input line should be compensated for while still increasing the load current.</p>
<p id="p0009" num="0009">These objects, among others, are achieved by a voltage regulator circuit as claimed in the characterising part of claim 1.</p>
<p id="p0010" num="0010">In accordance with the invention, a voltage regulator is provided comprising an input pad, an output pad and a first active device for regulating the output voltage. The voltage regulator further comprises a second active device that is<!-- EPO <DP n="3"> --> arranged between the input pad and output pad. The first and second active devices are thus connected in parallel between the input pad and output pad of the circuit. The inventive layout of the device provides a means for taking voltage drops on the input line into account and compensating for it by providing an additional path for the load current. Further, the layout is simple in that it does not require difficult wire connections or larger number of components. A cost-efficient and improved design for a voltage regulator is thereby provided.</p>
<p id="p0011" num="0011">In accordance with an embodiment of the invention, the second active device of the voltage regulator circuit is connected directly between the input pad and output pad, whereas the first active device is placed in an active device area farther away from the input pad. This physical division of the active device transistors provide a cost-efficient solution providing an improved performance of the regulator. More specifically, the regulator provides an increased possible load current for a given headroom.</p>
<p id="p0012" num="0012">In accordance with another embodiment of the invention, the first active device has a higher resistance than the second active device. Thereby the second active device is not affected by voltage drops on the input line to same extent as the first active device. Suitable ratios of the resistance of the second device and the resistance of the first device comprise about 1:10 or 1:50.</p>
<p id="p0013" num="0013">In accordance with another embodiment of the invention, the voltage regulator circuit is arranged to provide load currents of more than 250 mA, and a headroom of more than 300 mV. Thereby, the voltage regulator circuit is suitable for providing power to a radio frequency integrated circuit.<!-- EPO <DP n="4"> --></p>
<p id="p0014" num="0014">Further characteristics of the invention and advantages thereof will be evident from the detailed description of a preferred embodiment of the present invention given hereinafter and the accompanying figure 1, which is only given by way of illustration, and thus are not limitative of the present invention.</p>
<heading id="h0004"><b>Brief description of the drawings</b></heading>
<p id="p0015" num="0015">
<ul id="ul0001" list-style="none" compact="compact">
<li>Figure 1 illustrates schematically an embodiment of the present invention.</li>
</ul></p>
<heading id="h0005"><b>Detailed description of preferred embodiments</b></heading>
<p id="p0016" num="0016">In order to provide a thorough understanding of the present invention, a brief overview of a typical voltage regulator is given in the following. Generally, a regulator comprises three main parts: a voltage reference to calibrate the output voltage, a pass element to adjust the current delivered to the load, and some kind of feedback mechanism to respond to errors at the output of the regulator. A voltage regulator is arranged to maintain a constant voltage output irrespective of input voltage and load current. Most voltage regulators operate by comparing the actual output voltage to some internal fixed reference voltage. Any difference is amplified and used to control the regulation element, i.e. a negative feedback loop. If the output voltage is too low, the regulation element is commanded to produce a higher voltage. If the output voltage is too high, the regulation element is commanded to produce a lower voltage. In this way, the output voltage is held roughly constant.</p>
<p id="p0017" num="0017">The headroom, also called dropout voltage, of a regulator circuit is defined as the minimum voltage drop required across the regulator for enable it to maintain a desired output voltage.<!-- EPO <DP n="5"> --></p>
<p id="p0018" num="0018">Figure 1 illustrates schematically an embodiment of the invention. A voltage regulator circuit 1 in accordance with the invention comprises an input pad 2 and an output pad 3 in a conventional manner. Further, a conventional error amplifier 8, for example an operational amplifier, and output sense line 9 are provided. As was explained in the introductory part of the description, the voltage drop on the output line, such voltage drop indicated at 5, is taken into account by means of the regulation circuitry, that is, by means of the feedback loop. For high load currents the voltage drop of the input line will also decrease the headroom of the active device of the regulators and should be taken into account.</p>
<p id="p0019" num="0019">There could be a voltage drop also on the input line, such a voltage drop illustrated at 4, and this voltage drop is taken into account by means of the present invention. The input line voltage drop is particularly important to consider in applications requiring high load currents and regulator circuits having low headroom. The voltage drop on the input line limits the maximum possible load current of the regulator. In the prior art, additional pads are used to lower other parasitic resistances instead, in order to compensate for this input line voltage drop.</p>
<p id="p0020" num="0020">Regulating elements, or in the following called active device transistors, are used for regulating the output current. In accordance with the invention, the output load current is increased by arranging the active device transistors in an innovative way. The main active device, indicated in the figure by reference numeral 6, is placed in conventional manner in an active device area some distance away from the input pad 2. However, an auxiliary transistor, also herein denoted input sense line active transistor, is arranged directly between the input pad 2 and the output pad 3. This<!-- EPO <DP n="6"> --> auxiliary transistor is indicated in the figure by reference numeral 7. The auxiliary transistor 7 increases the possible load current by creating an additional path from the input pad 2 to the output pad 3. This additional path is, as is shown in the figure, a parallel path for the load current. Thus, the main active device 6 and the auxiliary transistor 7 are connected in parallel and share a portion of the total current.</p>
<p id="p0021" num="0021">The parasitic resistance of the auxiliary transistor 7 is smaller than the parasitic resistance of the main active device 6. The ratio between the resistance of the auxiliary transistor 7 and the main active device 6 could, for example, be approximately 1:10, or 1:50 or 1:100 depending on the specific application. It is realised that other ratios can be implemented as well.</p>
<p id="p0022" num="0022">The auxiliary transistor 7 is connected directly between the input pad 2 and output pad 3, whereas the main active device 6 is placed in an active device area. There may occur a voltage drop on the input line 4, for example generated by changes in the load current. If this voltage drop is such that the input to output voltage difference falls below the working point or quiescent point for the main active device 6, the auxiliary transistor 7 supplies some of the current. Stated differently, any voltage drop in the input bond-wire will be compensated for by means of the auxiliary transistor 7.</p>
<p id="p0023" num="0023">The resistance of the input line determines the amount of current sharing. That is, if the load current generates a voltage drop on the input line 4 that will decrease the headroom of the main active device 6, then the auxiliary transistor 7 takes some of the current. Thereby the possible<!-- EPO <DP n="7"> --> load current of the voltage regulator circuit 1 is increased for a specific, given headroom.</p>
<p id="p0024" num="0024">In the following an example of the invention is given, utilising exemplary values. In the example the main active device 6 has a resistance of 1 Ω and the auxiliary transistor 7 has a resistance of 0,10 Ω, giving a 1:10 ratio of the resistances. Should a voltage drop occur on the input line, causing the current of the main active device 6 to fall, for example from 100 mA to 80 mA, then the auxiliary transistor 7 provides the remaining 20 mA. This is because a voltage drop on the input line does not affect the auxiliary transistor 7 to same extent. That is, the auxiliary transistor 7 cuts in when the working point is lowered for the main active device 6, since the parasitic resistance of the auxiliary transistor 7 is lower than for the main active device 6.</p>
<p id="p0025" num="0025">The main active device 7 comprises any required number of transistors. The active device transistors are preferably CMOS (Complementary Metal-oxide semiconductor) transistors, although other types of transistors are conceivable.</p>
<p id="p0026" num="0026">The inventive layout of the voltage regulator is suitable for providing output currents up to, for example, 250 mA and a headroom of more than 300 mV. Further, the voltage regulator circuit 1 is suitable in arrangements for providing a regulated voltage of for example 5 V.</p>
<p id="p0027" num="0027">The above-described voltage regulator circuit can be utilized in a wide range of applications, and in particular for wireless communication applications. For example, the voltage regulator circuit in accordance with the invention may be arranged to provide power to radio frequency integrated circuits (RFICs). In portable electronic equipment, such as cellular phones and other handheld electronic devices, an<!-- EPO <DP n="8"> --> efficient voltage regulation is desirable for prolonging the battery life.</p>
<p id="p0028" num="0028">In summary, the present invention provides a voltage regulator circuit having an innovative layout, whereby a number of advantages are achieved. By means of the voltage regulator circuit the load current can be increased for given headroom. The invention thus provides an improved voltage regulator with an inventive, yet simple, way of taking voltage drops on the circuit wire lines into account.</p>
<p id="p0029" num="0029">In the preceding detailed description, the invention is described with reference to specific exemplary embodiments thereof. Various modifications and changes may be made thereto without departing from the scope of the invention as set forth in the claims. The specification and drawing are, accordingly, to be regarded in an illustrative rather than a restrictive sense.</p>
</description><!-- EPO <DP n="9"> -->
<claims id="claims01" lang="en">
<claim id="c-en-0001" num="0001">
<claim-text>A voltage regulator circuit (1) for providing a regulated output voltage, said regulator circuit (1) comprising an input pad (2), an output pad (3) and a first active device (6) for regulating the output voltage, <b>characterised in that</b> a second active device (7) is arranged between the input pad (2) and output pad (3), wherein said first active device (6) and said second active device (7) are connected in parallel between said input pad (2) and output pad (3).</claim-text></claim>
<claim id="c-en-0002" num="0002">
<claim-text>The voltage regulator circuit (1) as claimed in claim 1, wherein said second active device (7) is connected directly between the input pad (2) and output pad (3), and said first active device (6) is placed in an active device area farther away from said input pad (2).</claim-text></claim>
<claim id="c-en-0003" num="0003">
<claim-text>The voltage regulator circuit (1) as claimed in claim 1 or 2, wherein said first active device (6) has a higher resistance than said second active device (7).</claim-text></claim>
<claim id="c-en-0004" num="0004">
<claim-text>The voltage regulator circuit (1) as claimed in claim 3, wherein the ratio of the resistance of the second device (7) and the resistance of the first device (6) is approximately 1:10.</claim-text></claim>
<claim id="c-en-0005" num="0005">
<claim-text>The voltage regulator circuit (1) as claimed in claim 3, wherein the ratio of the resistance of the second device (7) and the resistance of the first device (6) is approximately 1:50.</claim-text></claim>
<claim id="c-en-0006" num="0006">
<claim-text>The voltage regulator circuit (1) as claimed in any of the preceding claims, wherein the circuit (1) is arranged to provide load currents up to 250 mA.<!-- EPO <DP n="10"> --></claim-text></claim>
<claim id="c-en-0007" num="0007">
<claim-text>The voltage regulator circuit (1) as claimed in any of the preceding claims, wherein said voltage regulator circuit (1) is arranged to provide a regulated voltage of 5 V.</claim-text></claim>
<claim id="c-en-0008" num="0008">
<claim-text>The voltage regulator circuit (1) as claimed in any of the preceding claims, wherein said voltage regulator circuit (1) is arranged to provide power to a radio frequency integrated circuit.</claim-text></claim>
</claims><!-- EPO <DP n="11"> -->
<drawings id="draw" lang="en">
<figure id="f0001" num=""><img id="if0001" file="imgf0001.tif" wi="145" he="162" img-content="drawing" img-format="tif"/></figure>
</drawings>
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