HARDWARE ACCELERATION SYSTEM FOR LOGIC SIMULATION USING SHIFT REGISTER AS LOCAL CACHE - Patent 1934845

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EP 1 934 845 A2

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(43)	Date of publication:
	25.06.2008 Bulletin 2008/26

(21)	Application number: 06803124.4

(22)	Date of filing: 07.09.2006

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International Patent Classification (IPC):

G06F 17/50^(2006.01)

(86)	International application number:
	PCT/US2006/034865

(87)	International publication number:
	WO 2007/037935 (05.04.2007 Gazette 2007/14)

(84)	Designated Contracting States:
	AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HU IE IS IT LI LT LU LV MC NL PL PT RO SE SI SK TR
	Designated Extension States:
	AL BA HR MK RS

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Priority:

28.09.2005 US 238505
30.11.2005 US 291164

(71)	Applicant: Liga Systems, Inc.
	Sunnyvale, CA 94089 (US)

(72)	Inventors:
	VERHEYEN, Henry, T. San Jose, CA 95120 (US) WATT, William San Jose, CA 95120 (US)

(74)	Representative: McLeish, Nicholas Alistair Maxwell
	Boult Wade Tennant Verulam Gardens 70 Gray's Inn Road London WC1X 8BT London WC1X 8BT (GB)

(54)	HARDWARE ACCELERATION SYSTEM FOR LOGIC SIMULATION USING SHIFT REGISTER AS LOCAL CACHE