SEMICONDUCTOR DEVICE HAVING A SEMICONDUCTOR-ON-INSULATOR CONFIGURATION AND A SUPERLATTICE AND ASSOCIATED METHODS - Patent 2016621

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EP 2 016 621 A1

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(43)	Date of publication:
	21.01.2009 Bulletin 2009/04

(21)	Application number: 07761837.9

(22)	Date of filing: 03.05.2007

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International Patent Classification (IPC):

H01L 29/15^(2006.01)
H01L 29/786^(2006.01)
H01L 29/10^(2006.01)

H01L 21/84^(2006.01)
H01L 27/12^(2006.01)

(86)	International application number:
	PCT/US2007/068159

(87)	International publication number:
	WO 2007/131119 (15.11.2007 Gazette 2007/46)

(84)	Designated Contracting States:
	AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HU IE IS IT LI LT LU LV MC MT NL PL PT RO SE SI SK TR
	Designated Extension States:
	AL BA HR MK RS

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Priority:

05.05.2006 US 381835
05.05.2006 US 381850

(71)	Applicant: Mears Technologies, Inc.
	Waltham, MA 02451 (US)

(72)	Inventors:
	KREPS, Scott, A. Waltham, MA 02451 (US) RAO, Kalipatnam, Vivek Grafton, Massachusetts 01519 (US)

(74)	Representative: Ferreccio, Rinaldo
	c/o Botti & Ferrari S.r.l. Via Locatelli 5 20124 Milano 20124 Milano (IT)

(54)	SEMICONDUCTOR DEVICE HAVING A SEMICONDUCTOR-ON-INSULATOR CONFIGURATION AND A SUPERLATTICE AND ASSOCIATED METHODS