1. Field of the Invention
[0001] Embodiments of the present invention relate to an organic light emitting display
and a method for driving the same.
2. Discussion of Related Art
[0002] Recently, various flat panel displays having a lighter weight and a smaller volume
than that of a cathode ray tube, have been developed. The flat panel displays include
a liquid crystal display, a field emission display, a plasma display panel, an organic
light emitting display, etc.
[0003] Among others, an organic light emitting display has various advantages such as an
excellent color reproducibility, a slimness, etc. so that its applications are rapidly
expanding to a PDA, an MP3, etc. in addition to a cellular phone.
[0004] The organic light emitting display displays an image using an organic light emitting
diode (OLED) whose brightness is determined corresponding to the amount of input current.
[0005] The organic light emitting diode includes red, green, or blue light emitting layer
located between an anode electrode and a cathode electrode and has brightness determined
according to the amount of current flowing between the anode electrode and the cathode
electrode.
[0006] At this time, the red, green and blue light emitting layer are formed of different
materials, respectively, and thus a separate gamma is applied to each of them.
SUMMARY OF THE INVENTION
[0007] It is an aspect of embodiments according to the present invention to provide a driver
circuit for an organic light emitting display in which gamma can be applied in accordance
with color regardless of the sequence of data output from a data driver, even if a
separate gamma by color is used, an an organic light emitting display comprising such
a driver circuit. Accordingly, a first aspect of the invention provides a driver circuit
as set forth in claim 1. Preferred embodiments are subject of the dependent claims
2 through 14. A second aspect of the invention provides an organic light emitting
display comprising the driver circuit of the first inventive aspect as set forth in
claim 15.
BRIEF DESCRIPTION OF THE DRAWINGS
[0008] The accompanying drawings, together with the specification illustrate exemplary embodiments
of the present invention, and, together with the description, serve to explain the
principles of the present invention.
[0009] FIG. 1A is a structure view of an organic light emitting display according to an
embodiment of the present invention;
[0010] FIG. 1B is a structure view of an organic light emitting display according to an
embodiment of the present invention;
[0011] FIG. 2 is a structure view showing an arrangement of pixels of a pixel unit of the
organic light emitting display of FIG. 1;
[0012] FIG. 3 is a circuit diagram showing a gamma correction unit employed in the organic
light emitting display according to an embodiment of the present invention;
[0013] FIG. 4 is a circuit diagram showing a first embodiment of a gamma conversion unit
employed in the organic light emitting display according to an embodiment of the present
invention;
[0014] FIG. 5 is a circuit diagram showing a second embodiment of a gamma conversion unit
employed in the organic light emitting display according to an embodiment of the present
invention; and
[0015] FIG. 6 is a circuit diagram showing a third embodiment of a gamma conversion unit
employed in the organic light emitting display according to an embodiment of the present
invention.
DETAILED DESCRIPTION
[0016] Hereinafter, exemplary embodiments according to the present invention will be described
with reference to the accompanying drawings.
[0017] FIG. 1A and 1B are a structure view of an organic light emitting display according
to an embodiment of the present invention. Referring to FIG. 1A and 1B, the organic
light emitting display includes a pixel unit 100, a data driver 200, a scan driver
300, a gamma correction unit 400, and a gamma conversion unit 500. and the data driver
200 and the gamma conversion unit 500 are positioned above the pixel unit 100 or below
the pixel unit 100.
[0018] The pixel unit 100 includes a plurality of pixels 101, each of which includes an
organic light emitting diode(not shown) emitting light in accordance with the flow
of current. Also, the pixel unit 100 includes n scan lines S1, S2, ..., Sn-1, and
Sn formed in a row direction and transferring scan signals, and m data lines D1, D2,
..., Dm-1, and Dm formed in a column direction and transferring data signals.
[0019] Also, the pixel unit 100 is driven by receiving first power and second power. Therefore,
the pixel unit 100 emits light to display an image by current flowing in an organic
light emitting diode by the scan signals, the data signals, the light emitting signals,
the first power, and the second power. The plurality of pixels also include red, green
and blue sub-pixels.
[0020] The data driver 200 generates data signals using image signals (R, G, and B data)
having red, green, and blue components. The data driver 200 is coupled to the data
lines D1, D2, ... Dm-1, and Dm in the pixel unit 100 via output channels outputting
data signals to apply the data signals to the pixel unit 100. As for the output channels
of the data driver to output the data signals, 1
st, 4
th, 7
th, 10
th, etc. output channels are applied with red gamma, 2
nd, 5
th, 8
th, 11
th, etc. output channels are applied with green gamma, and 3
rd, 6
th, 9
th, 12
th, etc. output channels are applied with blue gamma.
[0021] The scan driver 300 generates scan signals and is coupled to the scan lines S1, S2,
... Sn-1, and Sn to transfer the scan signals to a specific row of the pixel unit
100. A pixel 101 having received a scan signal receives a data signal output from
the data driver 200, so that the pixel 101 receives voltage corresponding to the data
signal.
[0022] The gamma correction unit 400 adjusts the voltage ratio of a data signal to a gray
scale. Also, a separate gamma is employed for each of red, green, and blue because
of different light emitting efficiencies of red, green, and blue light emitting layers.
For example, as for expressing gray scales from 0 to 63, the voltage of a data signal
corresponding to a 30 gray scale is set to 3.0V in red, 3.1 V in green, and 3.2V in
blue because of different efficiencies of red, green, and blue.
[0023] The gamma conversion unit 500 allows a red gamma to be applied to red data signals
transferred to a red pixel, a green gamma to be applied to green data signals transferred
to a green pixel, and a blue gamma to be applied to blue data signals transferred
to a blue pixel. That is, a data signal applied with the red gamma is transferred
to the red pixel of the pixel unit, a data signal applied with the green gamma is
transferred to the green pixel thereof, and a data signal applied with the blue gamma
is transferred to the blue pixel thereof, regardless of the output channels of the
data driver 200, outputting the data signals. The gamma conversion unit 500 operates
according to gamma conversion signals gs.
[0024] FIG. 2 is a structure view showing an arrangement of pixels of a pixel unit of the
organic light emitting display of FIG. 1A and 1B. Referring to FIG. 2, one pixel 101
of the pixel unit 100 includes three sub-pixels, which include red, green, and blue
sub-pixels 101R, 1010, and 101B. The respective sub-pixels 101R, 101G, and 101B are
coupled to the data lines to receive the data signals.
[0025] Also, the red, green, and blue sub-pixels 101R, 1010, and 101B are positioned in
each pixel 101 in order from left to right.
[0026] The data driver 200 is coupled to the pixel unit 100 and may output data signals
in two manners: a first case in which red, green, and blue data signals are output
by the sequence of 1
st, 2
nd, 3
rd, etc. output channels of the data driver 200, and a second case in which blue, green,
and red data signals are output by the sequence of 1
st, 2
nd, 3
rd, etc. output channels of the data driver 200. One of the two cases as above is selected
according to whether the data driver 200 is positioned above the pixel unit 100 or
below the pixel unit 100, or whether the pixel unit 100 is a front light-emitting
type or a rear light-emitting type. Thus, known data drivers may only be used for
either type of pixel units.
[0027] In the first case, a first output channel is coupled with a pixel applied with a
red gamma, receiving a red data signal, and expressing red. A second output channel
is coupled with a pixel applied with a green gamma, receiving a green data signal,
and expressing green. A third output channel is coupled with a pixel applied with
a blue gamma, receiving a blue data signal, and expressing blue. In the second case,
a first output channel is coupled with a pixel applied with a red gamma, receiving
a blue data signal, and expressing blue. A second output channel is coupled with a
pixel applied with a green gamma, receiving a green data signal, and expressing green.
A third output channel is coupled with a pixel applied with a blue gamma, receiving
a red data signal, and expressing red.
[0028] Therefore, in the first case, the pixels expressing red, green and blue are applied
with a red, green and blue gamma, thereby displaying brightness proper for each color.
In the second case, however, the pixels expressing red, green and blue are applied
with a blue, green and red gamma, and thus the brightness proper for each color is
not expressed.
[0029] In order to solve the problem, the gamma conversion unit 500 is coupled between the
data driver 20 and the pixel unit 10, thereby allowing a data signal applied with
a red gamma to be transferred to the pixel expressing red, allowing a data applied
with green gamma to be transferred to the pixel expressing green, and allowing a data
signal applied with blue gamma to be transferred to the pixel expressing blue.
[0030] FIG. 3 is a circuit diagram showing a gamma correction unit employed in an organic
light emitting display according to an embodiment of the present invention. Referring
to FIG. 3, there are three gamma correction units 400 to be applied to red, green
and blue data signals.
[0031] Each gamma correction unit 400 includes a register unit 60, a ladder resistor 61,
an amplitude control register 62, a curve control register 63, a first selector 64
to sixth selector 69, and a gray scale voltage amplifier 70.
[0032] The register unit 60 stores a proper resister set value for red if the gamma correction
unit 400 is a red gamma correction unit, stores a proper resister set value for green
if the gamma correction unit 400 is a green gamma correction unit, and stores a proper
resister set value for blue if the gamma correction unit 400 is a blue gamma correction
unit. In other words, when the gamma correction unit 400 is coupled to the red pixel
to perform gamma correction, the register unit 60 stores a register set value proper
for the red pixel. When the gamma correction unit 400 is coupled to the green pixel
to perform gamma correction, the register unit 60 stores a register set value proper
for the green pixel. When the gamma correction unit 400 is coupled to the blue pixel
to perform gamma correction, the register unit 60 stores a register set value proper
for the blue pixel.
[0033] Among the register values stored in the register unit 60, the upper 10 bits are input
to the amplitude control register 62 and the lower 16 bits are input to the curve
control register 63, respectively, thereby being selected as a register set value.
[0034] The ladder resistor 61 has a configuration in which a plurality of variable resistors
are coupled to each other in series between the uppermost level voltage VHI and the
lowermost level voltage VLO, and a plurality of gray scale voltages are generated
through the ladder resistor 61.
[0035] The amplitude control register 62 outputs 3-bit register set values to the first
selector 64, and 7-bit register set values to the second selector 65. At this time,
the number of selectable gray scales may be increased by increasing the number of
the set bits, and a different gray scale voltage may be selected by changing the register
set values.
[0036] The curve control register 63 outputs 4-bit register set values to the third selector
66 to the sixth selector 69, respectively. At this time, the register set values may
be changed, and the selectable gray voltage may be controlled according to the register
set values.
[0037] The amplitude control register 62 is input with the upper 10 bits register signals,
and the curve control register 63 is input with the lower 16 bits register signals.
[0038] The first selector 64 selects a gray scale voltage corresponding to a 3-bit register
set value in the amplitude control register 62, among a plurality of gray scale voltages
distributed through the ladder resistor 61, and outputs the gray scale voltage as
the uppermost gray scale voltage.
[0039] The second selector 65 selects a gray scale voltage corresponding to a 7-bit register
set value in the amplitude control register 62, among a plurality of gray scale voltages
distributed through the ladder resistor 61, and outputs the gray scale voltage as
the lowermost gray scale voltage.
[0040] The third selector 66 distributes a voltage between the gray scale voltage output
from the first selector 64 and the gray scale voltage output from the second selector
65 into a plurality of gray scale voltages through a plurality of resistance columns
and selects a gray scale voltage corresponding to a 4-bit register set value to be
output.
[0041] The fourth selector 67 distributes a voltage between the gray scale voltage output
from the first selector 64 and the gray scale voltage output from the third selector
66 into a plurality of gray scale voltages through a plurality of resistance columns
and selects a gray scale voltage corresponding to a 4-bit register set value to be
output.
[0042] The fifth selector 68 selects and outputs a gray scale voltage corresponding to a
4-bit register set value among gray scale voltages between the first selector 64 and
the fourth selector 67.
[0043] The sixth selector 69 selects and outputs a gray scale voltage corresponding to a
4-bit register set value among gray scale voltages between the first selector 64 and
the fifth selector 68. A curve of an intermediate gray scale can be adjusted according
to the register set values of the curve control register 63 through the operations
as above, making it possible to adjust gamma properties with ease according to respective
properties of light emitting elements. In order to allow the gamma curve property
to become convex downwardly, a potential difference between gray scales is set to
increase as a lower gray scale is represented. To the contrary, in order to allow
the gamma curve property to become convex upwardly, the resistance value of each ladder
resistor 61 is set to allow a potential difference between gray scales to be reduced
as a lower gray scale is represented.
[0044] The gray scale voltage amplifier 70 outputs a plurality of gray scale voltages each
corresponding to a plurality of gray scales to be displayed on the pixel unit 100.
In FIG. 2, the output of the gray scale voltages corresponding to 64 gray scales has
been represented.
[0045] FIG. 4 is a circuit diagram showing a first embodiment of a gamma conversion unit
employed in the organic light emitting display according to an embodiment of the present
invention. Referring to FIG. 4, a gamma conversion unit 500 includes a first transistor
M1, a second transistor M2, a third transistor M3, and a fourth transistor M4. It
is illustrated that the first transistor M1 and the fourth transistor M4 are implemented
as PMOS transistors, and the second transistor M2 and the third transistor M3 are
implemented as NMOS transistors. However, if the first transistor M1 and the fourth
transistor M4 are implemented as NMOMS transistors, the second transistor M2 and the
third transistor M3 may be implemented as PMOS transistors.
[0046] A source of the first transistor M1 is coupled to a first channel of a data driver
200, and a drain thereof is coupled to a first data line D1. A gate thereof is coupled
to a gamma conversion signal line GS.
[0047] A source of the second transistor M2 is coupled to the first channel of the data
driver 200, and a drain thereof is coupled to a third data line D3. A gate thereof
is coupled to the gamma conversion signal line GS.
[0048] A source of the third transistor M3 is coupled to a third channel CH3 of the data
driver 200, and a drain thereof is coupled to the first data line D1. A gate thereof
is coupled to the gamma conversion signal line GS.
[0049] A source of the fourth transistor M4 is coupled to the third channel CH3 of the data
drier 200, and a drain thereof is coupled to the third data line D3. A gate thereof
is coupled to the gamma conversion signal line GS.
[0050] A second channel CH2 of the data driver 200 is directly coupled to a second data
line D2.
[0051] If a gamma conversion signal in a low state is transferred through the gamma conversion
signal line GS, the first transistor M1 and the fourth transistor M4 turn on, and
the second transistor M2 and the third transistor M3 turn off. In other words, the
first channel CH1 of the data driver 200 is coupled to the first data line D1, the
second channel CH2 of the data driver 200 is coupled to the second data line D2, and
the third channel CH3 of the data driver 200 is coupled to the third data line D3.
[0052] If a gamma conversion signal in a high state is transferred through the gamma conversion
signal line GS, the first transistor M1 and the fourth transistor M4 turn off, and
the second transistor M2 and the third transistor M3 turn on. In other words, the
first channel CH1 of the data driver 200 is coupled to the third data line D3, the
second channel CH2 of the data driver 200 is coupled to the second data line D2, and
the third channel CH3 of the data driver 200 is coupled to the first data line D 1.
[0053] Therefore, if the gamma conversion signal transferred through the gamma conversion
signal line GS is in a low state, red data is transferred to the first data line D1,
green data is transferred to the second data line D2, and blue data is transferred
to the third data line D3. If the gamma conversion signal transferred through the
gamma conversion signal line GS is in a high state, blue data is transferred to the
first data line D1, green data is transferred to the second data line D2, and red
data is transferred to the third data line D3.
[0054] Through the operations as above, a red sub-pixel 101R of the pixel unit 100 receives
a data signal applied with the red gamma, a green sub-pixel 101G thereof receives
a data signal applied with the green gamma, and a blue sub-pixel 101B thereof receives
a data signal applied with the blue gamma.
[0055] FIG. 5 is a circuit diagram showing a second embodiment of a gamma conversion unit
employed in the organic light emitting display according to an embodiment of the present
invention. Referring to FIG. 5, a gamma conversion unit 500 includes a first transistor
M1, a second transistor M2, a third transistor M3, a fourth transistor M4, and a fifth
transistor M5. Also, the first transistor M1, the third transistor M3, and the fifth
transistor M5 are implemented as PMOS transistors, and the second transistor M2 and
the fourth transistor M4 are implemented as NMOS transistors. Also, if the first transistor
M1, the third transistor M3, and the fifth transistor M5 are implemented as NMOS transistors,
the second transistor M2 and the fourth transistor M4 may be implemented as PMOS transistors.
[0056] A source of the first transistor M1 is coupled to a first channel CH1 of a data driver
200, and a drain thereof is coupled to a first node N1. A gate thereof is coupled
to a gamma conversion signal line GS 1.
[0057] A source of the second transistor M2 is coupled to a third channel CH3 of the data
driver 200, and a drain thereof is coupled to a second node N2. A gate thereof is
coupled to the gamma conversion signal line GS 1.
[0058] A source of the third transistor M3 is coupled to the first node N1, and a drain
thereof is coupled to a first data line D1. A gate thereof is coupled to a second
gamma conversion signal line GS2.
[0059] A source of the fourth transistor M4 is coupled to the second node N2, and a drain
thereof is coupled to a third data line D3. A gate thereof is coupled to the second
gamma conversion signal line GS2.
[0060] A source of the fifth transistor M5 is coupled to the first node N1, and a drain
thereof is coupled to the second node N2. A gate thereof is coupled to a third gamma
conversion signal line GS3.
[0061] A second channel CH2 of the data driver 200 is directly coupled to a second data
line D2.
[0062] If red, green, and blue data are output from the first channel CH1, the second channel
CH2, and the channel CH3, and red, green, and blue pixels are coupled to the first
data line D1, the second data line D2, and the third data line D3, the transistors
operate as follows.
[0063] First, if a first gamma conversion signal and a second gamma conversion signal are
in a low state, and a third gamma conversion signal is in a high state, the first
transistor and the third transistor turn on, and the second transistor, the fourth
transistor, and the fifth transistor turn off. In such a state, the red data output
from the first channel CH1 is transferred to the first data line D1. Then, the red
data is transferred to the red pixel.
[0064] If a first gamma conversion signal, a second gamma conversion signal, and a third
gamma conversion signal are in a high state, the first transistor M1, the third transistor
M3, and the fifth transistor M5 turn off, and the second transistor M2 and the fourth
transistor M4 turn on. In such a state, the blue date output from the third channel
CH3 is transferred to the third data line D3. Then, the blue data is transferred to
the blue pixel.
[0065] At this time, the second channel CH2 is directly coupled to the second data line
D2, so that the green data is transferred to the green pixel.
[0066] If blue, green, and red data are output from the first channel CH1, the second channel
CH2, and the channel CH3, and red, green, and blue pixels are coupled to the first
data line D1, the second data line D2, and the third data line D3, the transistors
operate as follows.
[0067] First, if a first gamma conversion signal and a third gamma conversion signal are
in a low state, and a second gamma conversion signal is in a high state, the first
transistor M1, the fourth transistor M4, and the fifth transistor M5 turn on, and
the second transistor M2 and the third transistor M3 turn off. In such a state, the
blue data output from the first channel CH1 is transferred to the third data line
D3 via the first transistor M1, the fifth transistor M5, and the fourth transistor
M4. Then, the blue data is thereby transferred to the blue pixel.
[0068] If a first gamma conversion signal is in a high state, and a second gamma conversion
signal and a third gamma conversion signal are in a low state, the second transistor
M2, the third transistor M3, and the fifth transistor M5 turn on, and the first transistor
M1 and the fourth transistor M4 turn off. In such a state, the red date output from
the third channel CH3 is transferred to the first data line D1 via the second transistor
M2, the fifth transistor M5, and the third transistor M3. Then, the red data is thereby
transferred to the red pixel.
[0069] At this time, the second channel CH2 is directly coupled to the second data line
D2, so that the green data is transferred to the green pixel.
[0070] Through the operations as above, a red sub-pixel 101R of the pixel unit 100 receives
a data signal applied with the red gamma, a green sub-pixel 101G thereof receives
a data signal applied with the green gamma, and a blue sub-pixel 101B thereof receives
a data signal applied with the blue gamma.
[0071] FIG. 6 is a circuit diagram showing a third embodiment of a gamma conversion unit
employed in the organic light emitting display according to an embodiment of the present
invention. Referring to FIG. 6, a gamma conversion unit 500 includes a first transistor
M1, a second transistor M2, a third transistor M3, and a fourth transistor M4. Although
it is illustrated that the first transistor M1 to the fourth transistor M4 are implemented
as PMOS transistors, the first transistor M1 to the fourth transistor M4 may also
be implemented as NMOS transistors.
[0072] A source of the first transistor M1 is coupled to a first channel CH1 of a data driver
200, and a drain thereof is coupled to a first data line D1. A gate thereof is coupled
to a second gamma conversion signal line GS2.
[0073] A source of the second transistor M2 is coupled to the first channel CH1 of the data
driver 200, and a drain thereof is coupled to a third data line D3. A gate thereof
is coupled to a first gamma conversion signal line GS 1.
[0074] A source of the third transistor M3 is coupled to a third channel CH3 of the data
driver 200, and a drain thereof is coupled to the first data line D1. A gate thereof
is coupled to the first gamma conversion signal line GS 1.
[0075] A source of the fourth transistor M4 is coupled to the third channel CH3 of the data
drier 200, and a drain thereof is coupled to the third data line D3. A gate thereof
is coupled to the second gamma conversion signal line GS2.
[0076] A second channel CH2 of the data driver 200 is directly coupled to a second data
line D2.
[0077] If a gamma conversion signal in a low state is transferred through the second gamma
conversion signal line GS2, the first transistor M1 and the fourth transistor M4 turn
on. If a gamma conversion signal in a high state is transferred through the first
gamma conversion signal line GS1, the second transistor M2 and the third transistor
M3 turn off. In other words, the first channel CH1 of the data driver 200 is coupled
to the first data line D1, the second channel CH2 of the data driver 200 is coupled
to the second data line D2, and the third channel CH3 of the data driver 200 is coupled
to the third data line D3.
[0078] If a gamma conversion signal in a high state is transferred through the second gamma
conversion signal line GS2, the first transistor M1 and the fourth transistor M4 turn
off, and if a gamma conversion signal in a low state is transferred through the first
gamma conversion signal line GS1, the second transistor M2 and the third transistor
M3 turn on. In other words, the first channel CH1 of the data driver 200 is coupled
to the third data line D3, the second channel CH2 of the data driver 200 is coupled
to the second data line D2, and the third channel CH3 of the data driver 200 is coupled
to the first data line D1.
[0079] Therefore, if the gamma conversion signal transferred through the second gamma conversion
signal line GS2 is in a low state and the gamma conversion signal transferred through
the first gamma conversion signal line GS 1 is in a high state, a red data is transferred
to the first data line D1, a green data is transferred to the second data line D2,
and a blue data is transferred to the third data line D3. If the gamma conversion
signal transferred through the second gamma conversion signal line GS2 is in a high
state and the gamma conversion signal transferred through the first gamma conversion
signal line GS 1 is in a low state, a blue data is transferred to the first data line
D1, a green data is transferred to the second data line D2, and a red data is transferred
to the third data line D3.
[0080] Through the operations as above, a red sub-pixel 101R of the pixel unit 100 receives
a data signal applied with the red gamma, a green sub-pixel 101G thereof receives
a data signal applied with the green gamma, and a blue sub-pixel 101B thereof receives
a data signal applied with the blue gamma.
1. A driver circuit for an organic light emitting display including a display region
(100) comprising a plurality of pixels (101), each pixel (101) comprising at least
two sub-pixels (R, G, B) having different colors, the driver circuit comprising:
a data driver (200) adapted to sequentially receive video data (Vdata) and to output
data signals to a plurality of signal lines (CH1...CHm); and
a data signal switch having a plurality of inputs connected to the signal lines (CH1...CHm)
and a control input, the data signal switch being adapted to transmit the data signals
to a plurality of outputs grouped into a plurality of output groups each of which
comprising as many outputs as the number of sub-pixels (R, G, B) in each pixel (101)
and to switch the data signals between two of the outputs of each output group in
accordance with a data switching signal received at the control input.
2. The driver circuit of claim 1, further comprising a gamma correction unit for providing
red, green and blue gamma data to the data driver, wherein the data driver is configured
to receive red, green and blue image data, and to apply the red, green and blue gamma
data, respectively, to the red, green and blue image data to generate the data signals.
3. The driver circuit of one of the claims 1 or 2, wherein the at least two sub-pixels
(R, G, B) comprise red, green and blue sub-pixels, and wherein the data signal switch
is configured to switch the data signals applied to the red and blue sub-pixels in
accordance with the data switching signal.
4. The driver circuit of one of the preceding claims, wherein the data signal switch
comprises a plurality of switch units, each switch unit comprising a first switch
and a second switch each having a first terminal coupled to a first input of the data
signal switch and a third switch and a fourth switch each having a first terminal
coupled to a second input of the data signal switch, and wherein the first and third
switches each have a second terminal coupled to a first output of a corresponding
one of the output groups and the second and fourth switches each have a second terminal
coupled to a second output of the corresponding one of the output groups.
5. The driver circuit of claim 4, wherein the first, second, third and fourth switches
are configured to receive the data switching signal and to switch the data signal
from the first input and the data signal from the second input between the first and
second outputs of the corresponding one of the output groups.
6. The driver circuit of one of the claims 4 or 5, wherein the first and fourth switches
comprise first type transistors and the second and third switches comprise second
type transistors.
7. The driver circuit of one of the claims 1 through 3, wherein the data signal switch
comprises a plurality of switch units, each switch unit comprising first and third
switches coupled in series between a first output of a corresponding output group
and a corresponding first input of the data signal switch, second and fourth switches
coupled in series between a second output of the corresponding output group and a
corresponding second input of the data signal switch, and a fifth switch having a
first terminal coupled between the first and third switches and a second terminal
coupled between the second and fourth switches.
8. The driver circuit of claim 7, wherein the data switching signal comprises a first
data switching signal to be applied to the first and second switches, a second data
switching signal to be applied to the third and fourth switches, and a third data
switching signal to be applied to the fifth switch.
9. The driver circuit of one of the claims 7 or 8, wherein the first, third and fifth
switches are first type transistors and the second and fourth switches are second
type transistors.
10. The driver circuit of one of the claims 8 or 9, wherein when the first data switching
signal has a low level, the second data switching signal has a high level and the
third data switching signal has a low level, the data signal from the first signal
line is applied to the second data line.
11. The driver circuit of one of the claims 8 through 10, wherein when the first data
switching signal has a high level, the second data switching signal has a low level
and the third data switching signal has a low level, the data signal from the second
signal line is applied to the first data line.
12. The driver circuit of one of the claims 1 through 3, wherein the data signal switch
comprises a plurality of switch units, each switch unit comprising a first switch
coupled between a corresponding first input and a first output of a corresponding
output group, a second switch coupled between the corresponding first input and a
second output of the corresponding output group, a third switch coupled between a
corresponding second input and the first output, and a fourth switch coupled between
the corresponding second input and the second output of the corresponding output group,
wherein the data switching signal comprises a first data switching signal to be applied
to the second and third switches and a second data switching signal to be applied
to the first and fourth switches.
13. The driver circuit of claim 12, wherein the first data selection signal and the second
data selection signal are configured such that the second data selection signal is
at a high level when the first data selection signal is at a low level and the second
data selection signal is at a low level when the first data selection signal is at
a high level.
14. The driver circuit of claim 13, wherein the first, second, third and fourth switches
comprise P-type transistors.
15. An organic light emitting display comprising a display region (100), a scan driver
(300), a gamma conversion unit (500), and a driver circuit according to one of the
preceding claims.