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<ep-patent-document id="EP10006024B9W1" file="EP10006024W1B9.xml" lang="en" country="EP" doc-number="2224488" kind="B9" correction-code="W1" date-publ="20120321" status="c" dtd-version="ep-patent-document-v1-4">
<SDOBI lang="en"><B000><eptags><B001EP>......DE....FR....IT................................................................................</B001EP><B005EP>J</B005EP><B007EP>DIM360 Ver 2.15 (14 Jul 2008) -  2999001/0</B007EP></eptags></B000><B100><B110>2224488</B110><B120><B121>CORRECTED EUROPEAN PATENT SPECIFICATION</B121></B120><B130>B9</B130><B132EP>B1</B132EP><B140><date>20120321</date></B140><B150><B151>W1</B151><B155><B1551>de</B1551><B1552>Beschreibung</B1552><B1551>en</B1551><B1552>Description</B1552><B1551>fr</B1551><B1552>Description</B1552><B1551>de</B1551><B1552>Ansprüche EN</B1552><B1551>en</B1551><B1552>Claims EN</B1552><B1551>fr</B1551><B1552>Revendications EN</B1552></B155></B150><B190>EP</B190></B100><B200><B210>10006024.3</B210><B220><date>20050725</date></B220><B240><B241><date>20100610</date></B241></B240><B250>en</B250><B251EP>en</B251EP><B260>en</B260></B200><B300><B310>2004221981</B310><B320><date>20040729</date></B320><B330><ctry>JP</ctry></B330></B300><B400><B405><date>20120321</date><bnum>201212</bnum></B405><B430><date>20100901</date><bnum>201035</bnum></B430><B450><date>20111102</date><bnum>201144</bnum></B450><B452EP><date>20110421</date></B452EP><B480><date>20120321</date><bnum>201212</bnum></B480></B400><B500><B510EP><classification-ipcr sequence="1"><text>H01L  27/148       20060101AFI20110329BHEP        </text></classification-ipcr></B510EP><B540><B541>de</B541><B542>Festkörper-Bildaufnahmevorrichtung, Herstellungsverfahren und Ansteuerverfahren dazu, und Kamera</B542><B541>en</B541><B542>Solid-state imaging device, production method and drive method thereof, and camera</B542><B541>fr</B541><B542>Capteur d'image à l'état solide, procédé de fabrication et méthode de commande, et caméra</B542></B540><B560><B561><text>EP-A- 0 495 503</text></B561><B561><text>EP-A- 1 014 700</text></B561><B561><text>US-A- 5 912 482</text></B561><B561><text>US-A1- 2002 024 066</text></B561><B562><text>PATENT ABSTRACTS OF JAPAN vol. 2002, no. 4, 4 August 2002 (2002-08-04) &amp; JP 2001 352050 A (SONY CORP), 21 December 2001 (2001-12-21)</text></B562></B560></B500><B600><B620><parent><pdoc><dnum><anum>05016095.1</anum><pnum>1622202</pnum></dnum><date>20050725</date></pdoc></parent></B620></B600><B700><B720><B721><snm>Kanbe, Hideo</snm><adr><str>c/o Sony Corporation
1-7-1 Konan 
Minato-ku</str><city>Tokyo, 108-0075</city><ctry>JP</ctry></adr></B721></B720><B730><B731><snm>Sony Corporation</snm><iid>101002650</iid><irf>61759</irf><adr><str>1-7-1 Konan 
Minato-ku</str><city>Tokyo 108-0075</city><ctry>JP</ctry></adr></B731></B730><B740><B741><snm>Müller - Hoffmann &amp; Partner</snm><iid>100061044</iid><adr><str>Patentanwälte 
Innere Wiener Strasse 17</str><city>81667 München</city><ctry>DE</ctry></adr></B741></B740></B700><B800><B840><ctry>DE</ctry><ctry>FR</ctry><ctry>IT</ctry></B840><B880><date>20100901</date><bnum>201035</bnum></B880></B800></SDOBI><!-- EPO <DP n="1"> -->
<description id="desc" lang="en">
<heading id="h0001">BACKGROUND OF THE INVENTION</heading>
<heading id="h0002">1. Field of the Invention</heading>
<p id="p0001" num="0001">The present invention relates to a camera, a solid-state imaging device used therefor such as a charge coupled device (CCD) type solid-state imaging device, and a method thereof.</p>
<heading id="h0003">2. Description of the Related Art</heading>
<p id="p0002" num="0002">To achieve a larger angle of view and transfer at a high-speed rate of a CCD solid-state imaging device, there are demanded a lowering a resistance of transfer electrode. It is because such the transfer electrode is generally composed as a distributed constant circuit of an RC, and a high resistance of the transfer electrode will result in non-sharpness (dulling) and delay of a transfer pulse applied by the transfer electrode to<!-- EPO <DP n="2"> --> disturb a transfer of CCD charges. Then, transfer electrodes and wiring bus lines have been made to be low resistance.</p>
<p id="p0003" num="0003">A technique of attaining a low-resistance transfer electrode is that, for example, when the transfer electrode is composed of polysilicon, an impurity is introduced to polysilicon to make the resistance low. Alternately, the polysilicon is made to be a thick film to obtain a low-resistance sheet. In those cases, it is expected an improvement up to only several tens of percentage both in the thickness and the resistance.</p>
<p id="p0004" num="0004">As another method of attaining a low-resistance transfer electrode, there is also known a method of using material having a low resistance for the transfer electrode instead of polysilicon. As the material to be used, tungsten silicide (WSi) is well known. In the case used WSi, the resistance is expected to become lower by about one order of magnitude.</p>
<p id="p0005" num="0005">For the case where the resistance has to be lowered by more than one order of magnitude, there has been proposed a configuration of forming a transfer electrode of the CCD itself by polysilicon and using material having a lower resistance than that of above explained WSi, such as aluminum, as a shunt wiring (for example, refer to the following publications: Japanese Patent No. <patcit id="pcit0001" dnum="JP3123068B"><text>3123068</text></patcit>,<!-- EPO <DP n="3"> --> Japanese Unexamined Patent Publication No. <patcit id="pcit0002" dnum="JP7283387A"><text>7-283387</text></patcit>, Japanese unexamined Patent Publication No. <patcit id="pcit0003" dnum="JP7226496A"><text>7-226496</text></patcit>, Japanese Unexamined Patent Publication No. <patcit id="pcit0004" dnum="JP8236743A"><text>8-236743</text></patcit>, and Japanese unexamined Patent Publication No. <patcit id="pcit0005" dnum="JP2003060819A"><text>2003-60819</text></patcit>).</p>
<p id="p0006" num="0006">Actually, most of the techniques so far have applied a method of providing a shunt wiring along a vertical transfer CCD. Such the shunt wiring in the vertical direction suffers from the disadvantages that the transfer mode is limited and multi-phase driving used for interleaving transfer of pixels is hard to be realized.</p>
<p id="p0007" num="0007">Furthermore, a configuration of connecting transfer electrodes made by polysilicon over several pixels in the crossing direction becomes also necessary. Although a sufficient thickness of polysilicon has to be secured and the polysilicon itself has to have a low resistance, for example, for performing high-speed driving, work of making pixels finer has a trade-off relationship with work of making the polysilicon film thicker. It is because when the polysilicon film becomes thicker, a height of light shading mask to be formed thereon becomes high, so that eclipse of light (meaning that a light to be irradiated on pixels is blocked by a light shading mask) becomes large when pixels become finer.</p>
<p id="p0008" num="0008">A CCD solid-state imaging device with finer pixels<!-- EPO <DP n="4"> --> has been developed besides realization of a larger angle of view thereof, and a size of one pixel has become 2 µm or so nowadays. Although there are various challenges in realizing finer pixels, to maintain and improve sensitive characteristics is the most significant one.</p>
<p id="p0009" num="0009">In this case, since an aperture area of a light receiving portion is reduced due to the miniaturization of pixels, it is required the configuration of an upper layer portion of pixels, such as an on-chip lens, has to be optimized to improve the focusing property. However, an incident light to the light receiving portion is blocked by the transfer electrode itself, so that there has been a proposal of reducing a thickness and projections of the transfer electrode.</p>
<p id="p0010" num="0010">As a proposal for reducing the projections, instead of the vertical CCD configuration of forming a transfer electrode by two or three layers of polysilicon, a single-layer transfer electrode configuration of forming the same by one polisilicon layer has been proposed (for example, refer to Japanese Unexamined Patent Publication No. <patcit id="pcit0006" dnum="JP2003060819A"><text>2003-60819</text></patcit>).</p>
<p id="p0011" num="0011">However, the circumstances are that a CCD with a larger angle of view and a CCD with high-speed transfer, etc. are actually hard to be realized only by the well-known single-layer transfer electrode configuration, and<!-- EPO <DP n="5"> --> an eclipse of an incident light cannot be sufficiently reduced.</p>
<p id="p0012" num="0012">Document <patcit id="pcit0007" dnum="US20020024066A1"><text>US 2002/0024066 A1</text></patcit> relates to a solid-state image pickup device which includes pixels disposed in a matrix manner. Vertical transfer registers for transferring accumulated signal electric charges are provided for pixel columns. Shunt wires are provided which are connected to transfer electrodes of the vertical transfer registers. The shunt wires extend in order to intersect with the vertical transfer registers and are connected to bus lines outside an image pickup area. The shunt wires extend in horizontal direction and are connected to output buffers. An image pickup area is divided in each case into four portions. Two portions are disposed at an upper half of the image pickup area, signal electric charges of which are transferred in an upper direction in vertical transfer registers to a first plurality of horizontal transfer registers. The other two portions of the image pickup area form a lower half thereof. Signal electric charges formed therein are transferred in the lower direction in vertical transfer registers to a second and lower plurality of horizontal transfer registers disposed below the image pickup area. For each sensor forming a pixel a plurality of shunt wires is provided which are connected to rectangular loop-shaped wires which are configured to carry first to fourth driving pulses.</p>
<p id="p0013" num="0013">Document <patcit id="pcit0008" dnum="US5912482A"><text>US 5,912,482</text></patcit> relates to a solid-state image pickup device which is capable of reducing pattern noise. Photoelectric converting sections as well as vertical charge transfer sections and horizontal charge transfer sections are provided. In addition a shunt wire is provided which is electrically connected to a third vertical charge transfer electrode of the vertical charge transfer sections. The shunt wire is in each case assigned to a plurality of first and second vertical charge transfer electrodes. The shunt wire is electrically connected to a final vertical charge transfer electrode which is positioned in a vertical charge transfer direction formed beneath a variety of first and second vertical charge transfer electrodes.</p>
<heading id="h0004">SUMMARY OF THE INVENTION</heading>
<p id="p0014" num="0014">It is desired to provide a solid-state imaging device for reducing blocking of an incident light at a circumferential portion of a light receiving portion and attaining a larger angle of view and high-speed driving.<!-- EPO <DP n="6"> --><!-- EPO <DP n="7"> --></p>
<p id="p0015" num="0015">The object underlying the present invention is achieved by a solid-state imaging device according to independent claim 1, by a method for producing a solid-state image device according to independent claim 6, a driving method for a solid-state imaging device according to independent claim 9. Preferred embodiments of the claimed subject matter are within the scope of the respective dependent claims.<!-- EPO <DP n="8"> --></p>
<p id="p0016" num="0016">In the solid-state imaging device of the present invention as above, a transfer pulse can be transferred to the first transfer electrodes, the second transfer electrodes and the third transfer electrodes on the transfer channels via low-resistance wirings, so that non-sharpness (dulling) and delay of the transfer pulse can be prevented.</p>
<p id="p0017" num="0017">Also, the transfer pulse can be transmitted via the low-resistance wiring, a film thickness of the first transfer electrode, the second transfer electrode and the third transfer electrode can be made thin. Consequently, heights of the first transfer electrode, the second transfer electrode, the third transfer electrode and low-resistance wiring at the circumferential portion of the light receiving portion can be made low.</p>
<p id="p0018" num="0018">According to the solid-state imaging device of the present invention, it is possible to reduce an eclipse (blocking) of an incident light at the circumferential portion of the light receiving portions, and a larger angle of view and high-speed driving can be achieved.<!-- EPO <DP n="9"> --></p>
<heading id="h0005">BRIEF DESCRIPTION OF DRAWINGS</heading>
<p id="p0019" num="0019">These and other objects and features of the present invention will become clearer from the following description of the preferred embodiments given with<!-- EPO <DP n="10"> --> reference to the attached drawings, in which:
<ul id="ul0001" list-style="none" compact="compact">
<li><figref idref="f0001">FIG. 1</figref> is a view of the basic configuration of a camera according to an embodiment of the present invention;</li>
<li><figref idref="f0002">FIG. 2</figref> is a plan view of a key part of a pixel portion in a solid-state imaging device according to a first example that is useful for understanding the invention;</li>
<li><figref idref="f0003">FIG. 3A</figref> is a sectional view along a line A-A' in <figref idref="f0002">FIG. 2</figref>, and <figref idref="f0003">FIG. 3B</figref> is a sectional view along a line B-B' in <figref idref="f0002">FIG. 2</figref>;</li>
<li><figref idref="f0004">FIG. 4</figref> is a sectional view of a step of producing the solid-state imaging device according to the first example that is useful for understanding the invention;</li>
<li><figref idref="f0005">FIG. 5</figref> is a sectional view of a step of producing the solid-state imaging device according to the first example that is useful for understanding the invention;</li>
<li><figref idref="f0006">FIG. 6</figref> is a sectional view of a step of producing the solid-state imaging device according to the first example that is useful for understanding the invention;</li>
<li><figref idref="f0007">FIG. 7</figref> is a sectional view of a step of producing the solid-state imaging device according to the first example that is useful for understanding the invention; and</li>
<li><figref idref="f0008">FIG. 8</figref> is a plan view of a key part of a pixel portion in a solid-state imaging device according to an embodiment.</li>
</ul><!-- EPO <DP n="11"> --></p>
<heading id="h0006">DESCRIPTION OF THE PREFERRED EMBODIMENT</heading>
<p id="p0020" num="0020">Below, preferred embodiments of a camera and a solid-state imaging device used therefor and a method of producing the same of the present invention will be explained with reference to the drawings.</p>
<heading id="h0007"><u>First example that is useful for understanding the invention</u></heading>
<p id="p0021" num="0021"><figref idref="f0001">FIG. 1</figref> is a schematic view of a camera of an example that is useful for understanding the invention.</p>
<p id="p0022" num="0022">The camera shown in <figref idref="f0001">FIG. 1</figref> includes an optical lens system 41, a charge-coupled device (CCD) 42, a CCD driver 43 and a signal processor 44.</p>
<p id="p0023" num="0023">The optical lens system 41 may include an objective lens, and an automatic-focusing and/or automatic exposure adjusting lens and mechanism. The optical lens system 41 may include a shutter and a stop. The optical lens system 41 receives a light of an image and outputs the same to the CCD 42 to be focused thereat.</p>
<p id="p0024" num="0024">The CCD 42 and the CCD driver 43 cooperate to convert the incident light to the CCD 42 to an electric signal.</p>
<p id="p0025" num="0025">The signal processor 44 receives the converted electric signal indicating the image and carries out the image processing to recover the image, for example. Details of the CCD 42 and CCD driver 43 will be described.<!-- EPO <DP n="12"> --></p>
<p id="p0026" num="0026">As an example of the CCD 42 shown in <figref idref="f0001">FIG. 1</figref>, a four-phase driving operation is performed by cooperation of the CCD 42 and the CCD driver 43, which will be explained later on. A four-phase driving CCD will be explained as an example.</p>
<p id="p0027" num="0027"><figref idref="f0002">FIG. 2</figref> is a plan view of a main portion of a pixel portion of a solid-state imaging device, as an example of the CCD 42 in <figref idref="f0001">FIG. 1</figref>. A four-phase driving CCD will be explained as an example. The CCD 42 and the CCD driver 43 cooperate to perform the four-phase drive operation, described later.</p>
<p id="p0028" num="0028">In the pixel portion, light receiving portions 1 composing a pixel are arranged. A plurality of the light receiving portions are arranged in a horizontal direction H and in a vertical direction V, not illustrated. The light receiving portion 1 is composed of a photodiode, generates a signal charge in accordance with an incident light quantity and accumulates for a certain period.</p>
<p id="p0029" num="0029">Transfer channels 2 extending in the vertical direction are arranged adjacent to the light receiving portions in the horizontal direction. The transfer channel 2 is provided to extend between light receiving portions 1 arranged in the horizontal direction. The transfer channel 2 generates a distributed potential for<!-- EPO <DP n="13"> --> transferring signal charges in the vertical direction V.</p>
<p id="p0030" num="0030">A transfer electrode 3 is arranged on the transfer channel 2 extending in the vertical direction V. The transfer electrode 3 is divided into a first transfer electrode 3a and a second transfer electrode 3b in the view of a layout shape. Note that when it is not necessary to separate the first transfer electrode 3a from second transfer electrode 3b, they are simply referred to as the transfer electrode 3. A single-layer transfer electrode configuration is applied, wherein the first transfer electrode 3a and the second transfer electrode 3b are formed in the same layer. The transfer layer 3 is formed, for example, by polysilicon. It is preferable that the transfer electrode 3 has a thin film thickness of, for example, 200 nm or thinner to prevent an eclipse of the incident light.</p>
<p id="p0031" num="0031">The above first transfer electrode 3a and the second transfer electrode 3b are alternately and repeatedly arranged in the vertical direction in the transfer channel 2. The transfer electrodes 3 and the transfer channels 2 explained above compose a so-called vertical transfer portion arranged in common for each line of the light receiving portions 1 arranged in the vertical direction.<!-- EPO <DP n="14"> --></p>
<p id="p0032" num="0032">The first transfer electrodes 3a are connected in the horizontal direction H by extending between light receiving portions 1 arranged in the vertical direction. When composing a pixel of 2 µm × 2 µm or so, a width W1 of a part of the first transfer electrode 3a between the light receiving portions 1 is 0.45 µm or so.</p>
<p id="p0033" num="0033">Each second transfer electrode 3b is isolated on the transfer channel 2, that is, separated and not connected in the horizontal direction H. The second transfer electrodes 3b are arranged adjacent to the light receiving portion 1.</p>
<p id="p0034" num="0034">Two shunt wirings 4 extending in the horizontal direction H are arranged in the first transfer electrode 3a over an insulation film. The shunt wirings 4 are formed by tungsten having a lower resistance than that of polysilicon forming the transfer electrode 3. The shunt wirings 4 correspond to the low-resistance wirings. The number of the shunt wirings 4 corresponds to the number of the transfer electrodes arranged for one light receiving portion 1 and is two. A width W2 of one shunt wiring is, for example, 0.12 µm, and a width W3 between the two shunt wirings is, for example, 0.16 µm. The shunt wirings 4 are divided into shunt wirings 4a and shunt wirings 4b depending on a destination of the connection. Note that<!-- EPO <DP n="15"> --> when it is not necessary to separate the shunt wiring 4a from the shunt wiring 4b, it will be simply referred to as a shunt wiring 4.</p>
<p id="p0035" num="0035">The shunt wiring 4a is connected to the first transfer electrodes 3a by connecting portions 5 on the transfer channel 2. The shunt wiring 4b is connected to the second transfer electrodes 3b by connecting portions 5 on the transfer channel 2.</p>
<p id="p0036" num="0036">The first transfer electrodes 3a and the second transfer electrodes 3b alternately and repeatedly arranged on the transfer channel 2 in the vertical direction V are supplied with transfer pulses of four phases having different phases øV1, øV2, øV3 and øV4 along the vertical direction through the shunt wirings 4. The voltage of the transfer pulses øV1 to øV4 are, for example, -7V to 0V.</p>
<p id="p0037" num="0037">In addition to the transfer pulses øV1 and øV3, the floating type second transfer electrodes 3b adjacent to the light receiving portion 1 are supplied with a read-out pulse øR for transferring signal charges accumulated in the light receiving portion 1 to the transfer channels 2 through the shunt wirings 4b. The voltage of the read-out pulse øR is, for example +12V to +15V.</p>
<p id="p0038" num="0038"><figref idref="f0003">FIG. 3A</figref> is a sectional view along the line A-A' in <figref idref="f0002">FIG. 2</figref>, and <figref idref="f0003">FIG. 3B</figref> is a sectional view along the line B-B'<!-- EPO <DP n="16"> --> in <figref idref="f0002">FIG. 2</figref>. Note that the configuration of an upper layer portion above the light shading mask 6 is shown in <figref idref="f0003">FIG. 3A</figref>, while that is omitted in <figref idref="f0003">FIG. 3B</figref> for simplifying the drawing.</p>
<p id="p0039" num="0039">A semiconductor substrate 10, for example, made of n-type silicon is used. In the semiconductor substrate 10, a p-type well 11 is formed. In the p-type well 1, an n-type region 12 is formed, and a p-type region 13 is formed at a position closer to the surface side than the position of the n-type region 12. A photodiode formed by the pn-junction of the n-type region 12 and the p-type well 11 composes the light receiving portion 1. As a result, the p-type region 13 is formed closer to the surface side comparing with the n-type region 12, a buried photodiode having a reduced dark current is formed.</p>
<p id="p0040" num="0040">A p-type well 14 is formed adjacent to the n-type region 12, and the transfer channel 2 formed by an n-type region is formed in the p-type well 14. A p-type channel stop portion 16 for preventing flowing of signal charges between adjacent light receiving portions 1 is formed. In the illustrated example, between the light receiving portion 1 and the transfer channel 2 on the left side of the light receiving portion 1 becomes a reading gate portion 17. Accordingly, the transfer electrode 3<!-- EPO <DP n="17"> --> controls a potential distribution of the reading gate portion 17, and signal charges of the light receiving portion 1 is read by the transfer channel 2 on the left side.</p>
<p id="p0041" num="0041">In the semiconductor substrate 10 formed with a variety of semiconductor regions, transfer electrodes 3 made by polysilicon are formed via a gate insulation film 20. A film thickness of the transfer electrode 3 is, for example, 0.1 µm.</p>
<p id="p0042" num="0042">An insulation film 21, for example, made of oxide silicon is formed to cover the transfer electrodes 3. In the transfer electrodes 3, shunt wirings 4, for example, made of tungsten are formed via the insulation film 21. A film thickness of the shunt wirings 4 is, for example, 0.1 µm. The insulation film 21 is formed with apertures at connecting portions 5, and the shunt wirings 4 and the transfer electrodes 3 are connected at the connecting portions 5.</p>
<p id="p0043" num="0043">An interlayer insulation film 22, for example, made of oxide silicon is formed to cover the shunt wirings 4. A light shading mask 6 for covering the transfer electrodes 3 and the shunt wirings 4 is formed via the insulation film 21 and the interlayer insulation film 22. The light shading mask 6 is formed with opening portions 6a above the light receiving portions 1.<!-- EPO <DP n="18"> --></p>
<p id="p0044" num="0044">An interlayer insulation film 23, for example, made of phosphosilicate glass (PSG) or borophosphosilicate glass (BPSG) film is formed to cover allover the light shading mask 6, and thus the surface is flattened.</p>
<p id="p0045" num="0045">On the interlayer insulation film 23, an inner-layer lens, for example, made of oxide silicon or nitride silicon is formed, and a flattening film 25 is formed further thereon. The flattening film 25 is, for example, formed of a resin having a high light transmittance to a visible light.</p>
<p id="p0046" num="0046">On the flattening film 25, a plurality of kinds of color filters 26 for transmitting lights in predetermined wavelength regions are formed. The color filters 26 are colored to be any of red (R), green (G) and blue (B) as primary colors and, for example, any of yellow (Ye), cyan (Cy), magenta (M) and green (G), etc. as complementary colors.</p>
<p id="p0047" num="0047">On the color filters 26, an on-chip lens 27 is formed. The on-chip lens 27 is formed by a light transmitting material, such as a negative photosensitive resin.</p>
<p id="p0048" num="0048">Next, an operation of the solid-state imaging device according to the above example that is useful for understanding the invention will be explained.</p>
<p id="p0049" num="0049">An incident light is converged by the on-chip lens<!-- EPO <DP n="19"> --> 27, and only a light in a predetermined wavelength range transmits because of the color filter 26. The light transmitted through the color filter 26 is further collected by the inner-layer lens 24 and guided to the light receiving portion 1.</p>
<p id="p0050" num="0050">When the light of the image, for example, is irradiated to the light receiving portion 1, signal charges (electrons in the present example) in accordance with the incident light quantity are generated by photoelectric conversion and accumulated for a certain period in the n-type region 12 of the light receiving portion 1. When the read-out pulse øR is supplied to the second transfer electrodes 4b (refer to <figref idref="f0002">FIG. 2</figref>) through the shunt wirings 4b, a potential distribution of the read-out gate portion 17 changes and signal charges in the n-type region 12 are read out to the transfer channel 2.</p>
<p id="p0051" num="0051">After the signal charges are read out to the transfer channel 2, the four-phase transfer pulses øV1 to øV4 are supplied to the transfer electrodes 3 arranged in the vertical direction V via the shunt wirings 4. The potential distribution of the transfer channel 2 is controlled by the four-phase transfer pulses øV1 to øV4, and then the signal charges are transferred in the vertical direction V.<!-- EPO <DP n="20"> --></p>
<p id="p0052" num="0052">While not illustrated, after the signal charges are transferred in the vertical direction V, they are transferred in the horizontal direction by a horizontal transfer portion, converted to a voltage in accordance with a signal charge amount thereof by an outputting portion and output.</p>
<p id="p0053" num="0053">Next, a method of producing the solid-state imaging device according to the example that is useful for understanding the invention explained above will be explained with reference to sectional views of steps in <figref idref="f0004 f0005 f0006 f0007">FIG. 4 to FIG. 7</figref>. The sectional views of steps in <figref idref="f0004 f0005 f0006 f0007">FIG. 4 to FIG. 7</figref> are sectional views corresponding to <figref idref="f0003">FIG. 3A</figref>.</p>
<p id="p0054" num="0054">As shown in <figref idref="f0004">FIG. 4A</figref>, in the semiconductor substrate 10 formed by n-type silicon, the p-type well 11, n-type region 12, p-type region 13, n-type transfer channels 2, p-type wells 14 and p-type channel stop portions 16 are formed by the ion implantation method. Note that the ion implantation may be performed in a state where an oxide silicon film, etc. is formed on the semiconductor substrate 10. When forming an oxide silicon film, etc., it is removed after the ion implantation.</p>
<p id="p0055" num="0055">Next, as shown in <figref idref="f0004">FIG. 4B</figref>, the gate insulation film 20, for example, formed of oxide silicon is formed on the semiconductor substrate 10 by the thermal oxidization method or chemical vapor deposition (CVD) method.<!-- EPO <DP n="21"> --> Continuously, on the gate insulation film 20, polysilicon is deposited by the CVD method and processed by dry etching, so that the transfer electrodes 3 are formed. Note that a polysilicon film thickness is preferably 200 nm or thinner in the case of a pixel of 2 µm × 2 µm to reduce an eclipse of light.</p>
<p id="p0056" num="0056">Next, as shown in <figref idref="f0005">FIG. 5A</figref>, the insulation film 21 formed by oxide silicon, etc. for covering the transfer electrodes 3 is formed by the CVD method. Continuously, the insulation film 21 at positions to be connecting portions 5 is removed, so that the transfer electrodes 3 are partially exposed on (or above) the transfer channel 2.</p>
<p id="p0057" num="0057">Next, as shown in <figref idref="f0005">FIG. 5B</figref>, for example, a tungsten film is formed on the insulation films 21 by the sputtering method or CVD method, and the tungsten film is processed by the dry etching, so that shunt wirings 4 are formed.</p>
<p id="p0058" num="0058">Next, as shown in <figref idref="f0006">FIG. 6A</figref>, oxide silicon films, etc. are deposited by the CVD method, so that interlayer insulation films 22 for covering the transfer electrodes 3 and the shunt wirings 4 are formed.</p>
<p id="p0059" num="0059">Next, as shown in <figref idref="f0006">FIG. 6B</figref>, a tungsten film is formed by the sputtering method or CVD method, the tungsten film is processed by the dry etching to cover<!-- EPO <DP n="22"> --> the transfer electrode 3 and shunt wiring 4, so that the light shading mask 6 having an opening portion 6a on (or above) the light receiving portion 1 is formed.</p>
<p id="p0060" num="0060">Next, as shown in <figref idref="f0007">FIG. 7A</figref>, a BPSG film or a PSG film is deposited by the CVD method to form the interlayer insulation film 23. After the deposition, by performing reflow processing, a surface of the interlayer insulation film 23 becomes flattened. In the reflow processing, the temperature becomes as high as 800°C or higher, so that it is configured to be resistive to a high temperature by not using aluminum but using tungsten for the shunt wirings 4 and light shading mask 6.</p>
<p id="p0061" num="0061">Next, as shown in <figref idref="f0007">FIG. 7B</figref>, above the light receiving portion 1, the inner-layer lens 24 is formed on the interlayer insulation film 23. For forming the inner-layer lens 24, a light transmitting film of oxide silicon or nitride silicon, etc. is deposited, for example, by the plasma CVD method first, then, a resist film having a convex lens shape is formed by the resist film application, patterning and reflow processing, and finally, by performing etching under a condition that etching selectivity of the resist film and the light transmitting film becomes approximately 1, the inner-layer lens 24 is formed. After forming the inner-layer lens 24, the flattening film 25, for example, made of a<!-- EPO <DP n="23"> --> resin having a high light transmittance to a visible light is formed.</p>
<p id="p0062" num="0062">As the following steps, the color filters are formed, for example, by a staining method. Then, a light transmitting resin, such as a negative photosensitive resin, is deposited on the color filters 26, and etching using as a mask a resist pattern having a convex lens shape is performed in the same way as in the inner-layer lens 24 so as to form the on-chip lens 27. From the above steps, the solid-state imaging device is produced.</p>
<p id="p0063" num="0063">Next, an effect of the solid-state imaging device explained above will be explained.</p>
<p id="p0064" num="0064">A single-layer transfer electrode configuration of forming the first transfer electrodes 3a and the second transfer electrodes 3b by one polysilicon layer is applied. Then, on the first transfer electrodes 3a connected in the horizontal direction, the two shunt wirings 4a and 4b extending in the horizontal direction are formed and connected to the first transfer electrodes 3a and the second transfer electrodes 3b on the transfer channels 2.</p>
<p id="p0065" num="0065">Since the four-phase transfer pulses øV1 to øV4 can be supplied to the first transfer electrodes 3a and the<!-- EPO <DP n="24"> --> second transfer electrodes 3b on the transfer channels 2 via the low-resistance shunt wirings 4a and 4b extending in the horizontal direction, it is possible to reduce non-sharpness (dulling) and delay of the transfer pulses. As a result, it is possible to realize a larger angle of view and high-speed driving.</p>
<p id="p0066" num="0066">Also, since the transfer pulses are supplied to all transfer electrodes 3 of the pixel portion by the shunt wirings 4a and 4b, the transfer electrodes 3 having the single-layer configuration do not have to be far low resistance, so that it may be made thinner comparing with that in the case of the related art. Also, since tungsten composing the shunt wirings 4a and 4b has a lower resistance than that of polysilicon by two order (digits) or so, they can be made thinner. For example, the transfer electrodes 3 and the shunt wirings 4 may be made thin as 200 nm or thinner, respectively. Consequently, a height of the light shading mask 6 covering the transfer electrodes 3 and shunt wirings 4 and surrounding the light receiving portion 1 can be lowered, so that an eclipse of the incident light by the light shading mask 6 can be reduced.</p>
<p id="p0067" num="0067">Also, since the shunt wirings 4a and 4b extend in the horizontal direction, the shunt wirings 4a and 4b are connected to all the first transfer electrodes 3a or all<!-- EPO <DP n="25"> --> the second transfer electrodes 3b arranged in the horizontal direction on the transfer channels 2. Therefore, the transfer mode is not limited and it is possible to respond to interleaving transfer of pixels, etc.</p>
<p id="p0068" num="0068">Furthermore, since the first transfer electrodes 3a are provided under the shunt wirings 4a and 4b extending in the horizontal direction, when the read-out pulse øR is supplied to the floating type second transfer electrodes 3b through the shunt wirings 4b, the potential distribution of the semiconductor substrate 10 under the shunt wirings 4b is not affected due to the blocking effect by the first transfer electrodes 3a as the lower layer. Therefore, color mixture phenomenon between light receiving portions 1 arranged in the vertical direction can be prevented.</p>
<heading id="h0008">[Embodiment]</heading>
<p id="p0069" num="0069">An example of the four-phase driving CCD was explained in the first example that is useful for understanding the invention, while in the present embodiment, an example of a six-phase driving or three-phase driving CCD, wherein the CCD 42 and the CCD driver 43 cooperate for performing three-phase driving, will be explained. <figref idref="f0008">FIG. 8</figref> is a plan view of a main part of a pixel portion in a solid-state imaging device according to the embodiment. Note that the same reference<!-- EPO <DP n="26"> --> numbers are given to the same components as those in <figref idref="f0002">FIG. 2</figref> and explanations thereof will be omitted.</p>
<p id="p0070" num="0070">In the transfer channel 2 extending in the vertical direction V, the transfer electrodes 3 made by single-layer polysilicon are arranged. In the present embodiment, the transfer electrodes 3 includes third transfer electrodes 3c in addition to the first transfer electrodes 3a and the second transfer electrodes 3b. A film thickness of the transfer electrodes 3 is preferably thin as, for example, 200 nm or thinner to prevent an eclipse of an incident light.</p>
<p id="p0071" num="0071">The first transfer electrodes 3a, the second transfer electrodes 3b and the third transfer electrodes 3c are alternately and repeatedly arrange in the vertical direction on the transfer channels 2. The transfer electrodes 3 and the transfer channels 2 compose a so-called vertical transfer portion arranged in common for each line of the light receiving portions 1 arranged in the vertical direction V.</p>
<p id="p0072" num="0072">The first transfer electrodes 3a are connected in the horizontal direction H by extending between the light receiving portions 1 arranged in the vertical direction, and each of the second transfer electrode 3b has an isolated shape on the transfer channel 2, that is, it is not connected in the horizontal direction H and has a<!-- EPO <DP n="27"> --> separated shape, which are the same as those in the first example that is useful for understanding the invention.</p>
<p id="p0073" num="0073">The third transfer electrode 3c also have an isolated shape on the transfer channel 2, that is, not connected in the horizontal direction H and have a separated shape in the same way as the second transfer electrode 3b. The third transfer electrodes 3c are arranged adjacent to the light receiving portion 1.</p>
<p id="p0074" num="0074">In the transfer electrodes 3a, three shunt wirings 4 extending in the horizontal direction H are formed via an insulation film. The shunt wirings 4 are formed by tungsten having a lower resistance than that of polysilicon composing the transfer electrodes 3 and correspond to the low-resistance wirings of the present invention. The shunt wirings 4 include three kinds of shunt wirings 4a, 4b and 4c.</p>
<p id="p0075" num="0075">The shunt wirings 4a are connected to the first transfer electrodes 3a by connecting portions 5 on the transfer channels 2. The shunt wirings 4b are connected to the second transfer electrodes 3b by connecting portions 5 on the transfer channels 2. The shunt wirings 4c are connected to the third transfer electrodes 3c by connecting portions 5 on the transfer channels 2.</p>
<p id="p0076" num="0076">When realizing six-phase driving, six-phase transfer pulses øV1<b>,</b> øV2, øV3, øV4, øV5 and øV6 having<!-- EPO <DP n="28"> --> different phases are supplied along the vertical direction to the first transfer electrodes 3a, the second transfer electrodes 3b and the third transfer electrodes 3c arranged alternately and repeatedly in the vertical direction V via the shunt wirings 4 on the transfer channels 2. Among them, a read-out pulse øR is supplied to the two transfer electrodes 3b and 3c adjacent to a pixel through the shunt wirings 4b and 4c.</p>
<p id="p0077" num="0077">When realizing three-phase driving, the three-phase transfer pulses øV1, øV2 and øV3 having different phases are supplied along the vertical direction to the first transfer electrodes 3a, the second transfer electrodes 3b and the third transfer electrodes 3c are arranged alternately and repeatedly in the vertical direction V via the shunt wirings 4 on the transfer channels 2. Among them, the read-out pulse øR is supplied, for example, to one of third transfer electrode 3c adjacent to a pixel through the shunt wirings 4c.</p>
<p id="p0078" num="0078">As explained above, by adding the floating type third transfer electrode 3c and providing the three shunt wirings extending on the first transfer electrodes 3a, the three-phase driving or the six-phase driving of the solid-state imaging device can be realized.</p>
<p id="p0079" num="0079">The solid-state imaging device according to the present embodiment has the same effects as those in the<!-- EPO <DP n="29"> --> first example that is useful for understanding the invention.</p>
<p id="p0080" num="0080">For example, in the above embodiment and first example, examples of the three-phase driving, four-phase driving and six-phase driving were explained, but two-phase driving may be also achieved. In the case of the two-phase driving, a layout of the transfer electrodes 3 and shunt wirings 4 is the same as that in the first example. The two-phase driving can be realized by changing the transfer pulses ø3 to ø1 and ø4 to ø2, and by giving potential gradient to the transfer channel 2 under the transfer electrodes 3a and 3b. Also, more than six-phase driving may be also realized. In this case, it can be realized only by adding floating type transfer electrodes and increasing the number of shunt wirings.</p>
<p id="p0081" num="0081">Furthermore, the solid-state imaging device of the present invention can be also applied to an interline transfer type solid-state imaging device and a frame interline transfer type solid-state imaging device. A variety of modifications of the present invention may be made on the configuration of upper layers of the light shading mask 6. The values and materials, etc, mentioned in the above embodiments are just examples and the present invention is not limited to those.</p>
</description><!-- EPO <DP n="30"> -->
<claims id="claims01" lang="en">
<claim id="c-en-01-0001" num="0001">
<claim-text>A solid-state imaging device (42),<br/>
comprising:
<claim-text>- a plurality of light receiving portions (1) arranged in a first direction (H) and a second direction (V) perpendicular to the first direction (H);</claim-text>
<claim-text>- a plurality of transfer channels (2) extending in the second direction (V), each being arranged between the neighboring light receiving portions (1);</claim-text>
<claim-text>- a plurality of first transfer electrodes (3a) arranged on said transfer channels (2), the neighboring first transfer electrodes (3a) positioned at both sides of the light receiving portion (1) being connected in the first direction (H); and</claim-text>
<claim-text>- a plurality of second transfer electrodes (3b) arranged in the same layer of said first transfer electrodes (3a), on said transfer channel (2);</claim-text>
wherein
<claim-text>- low-resistance wirings (4, 4a, 4b, 4c) are provided extending over said first transfer electrode (3a) in the first direction (H), and having a lower resistance than those of said first transfer electrodes (3a) and said second transfer electrodes (3b),</claim-text>
<b>characterized in that</b>
<claim-text>- the solid-state imaging device further comprises third transfer electrodes (3c) arranged in the same layer of said first transfer electrodes (3a) and said second transfer electrodes (3b), on said transfer channels (2) in the first direction (H); and</claim-text>
<claim-text>- three low-resistance wirings (4, 4a, 4b, 4c) are arranged by extending over each of said first transfer electrodes (3a) in the first direction (H), each of said three low-resistance wirings (4, 4a, 4b, 4c) being connected to either said first transfer electrodes (3a), said second transfer electrodes (3b) or third transfer electrodes (3c) on said transfer channels (2) by a connecting portion (5), and each of said three transfer electrodes (3a, 3b, 3c) being connected only to one of said low-resistance wirings (4, 4a, 4b, 4c) through said connection portion (5); and the number of said low-resistance wirings (4, 4a, 4b, 4c) is in 1:1 correspondence to the number of transfer electrodes (3a, 3b, 3c).</claim-text></claim-text></claim>
<claim id="c-en-01-0002" num="0002">
<claim-text>A solid-state imaging device (42) as set forth in claim 1,<br/>
wherein the respective second transfer electrodes (3b) on said transfer channels (2) are separated and not connected in the horizontal direction (H).</claim-text></claim>
<claim id="c-en-01-0003" num="0003">
<claim-text>A solid-state imaging device (42) as set forth in claim 1,<br/>
wherein said second and third transfer electrodes (3b, 3c) are supplied through said low-resistance wirings (4b, 4c) with a read-out voltage (∅V2, ∅V4) for<!-- EPO <DP n="31"> --> reading signal charges accumulated in said light receiving portions (1) out to the transfer channels (2).</claim-text></claim>
<claim id="c-en-01-0004" num="0004">
<claim-text>A solid-state imaging device (42) as set forth in claim 1,<br/>
wherein the respective third transfer electrodes (3c) on said transfer channels (2) are separated and not connected in the horizontal direction (H).</claim-text></claim>
<claim id="c-en-01-0005" num="0005">
<claim-text>A solid-state imaging device (42) as set forth in claim 1,
<claim-text>- wherein said first transfer electrodes (3a) and second transfer electrodes (3b) are formed of polysilicon, and</claim-text>
<claim-text>- wherein said low-resistance wirings (4, 4a, 4b, 4c) are formed of tungsten.</claim-text></claim-text></claim>
<claim id="c-en-01-0006" num="0006">
<claim-text>A method of producing a solid-state imaging device (42), according to any one of the preceding claims 1 to 5,<br/>
comprising steps of:
<claim-text>- forming the plurality of light receiving portions (1) in the first direction (H) and the second direction (V);</claim-text>
<claim-text>- forming the transfer channels (2) extending in the second direction (V) arranging each of the transfer channel between the neighboring light receiving portions (1);</claim-text>
<claim-text>- forming the first transfer electrodes (3a) on said transfer channels (2), the neighboring first transfer electrodes (3a) positioned at both sides of the light receiving portion (1) being connected in the first direction (H).</claim-text>
<claim-text>- forming the second transfer electrodes (3b) on said transfer channels (2) in the same layer of said first transfer electrodes (3a), and</claim-text>
<claim-text>- forming low-resistance wirings (4, 4a, 4b, 4c) extending over said first transfer electrode (3a) in the first direction (H), and having a lower resistance than those of said first transfer electrodes (3a) and said second transfer electrodes (3b),</claim-text>
<b>characterized in</b>
<claim-text>- forming third transfer electrodes (3c) on said transfer channels (2), in a layer formed by the same steps of forming said first transfer electrodes (3a) and said second transfer electrodes (3b),</claim-text>
<claim-text>- three low-resistance wirings (4, 4a, 4b, 4c) being arranged by extending over each of said first transfer electrodes (3a) in the first direction (H), each of said three low-resistance wirings (4, 4a, 4b, 4c) being connected to either said first transfer electrodes (3a), said second transfer electrodes (3b) or third transfer electrodes (3c) on said transfer channels (2) by a connecting portion (5), and each of said three transfer electrodes (3a, 3b, 3c) being connected<!-- EPO <DP n="32"> --> only to one of said low-resistance wirings (4, 4a, 4b, 4c) through said connection portion (5), and the number of said low-resistance wirings (4, 4a, 4b, 4c) being in 1:1 correspondence to the number of transfer electrodes (3a, 3b, 3c).</claim-text></claim-text></claim>
<claim id="c-en-01-0007" num="0007">
<claim-text>A method according to claim 6,<br/>
wherein the respective second transfer electrodes (3b) on said transfer channels (2) are separated and not connected in the horizontal direction (H).</claim-text></claim>
<claim id="c-en-01-0008" num="0008">
<claim-text>A method according to claim 6,
<claim-text>- wherein said first transfer electrodes (3a) and second transfer electrodes (3b) are formed of polysilicon; and</claim-text>
<claim-text>- wherein said low-resistance wirings (4, 4a, 4b, 4c) are formed of tungsten.</claim-text></claim-text></claim>
<claim id="c-en-01-0009" num="0009">
<claim-text>A driving method of a solid-state imaging device (42) according to claims 1 or 5,<br/>
<b>characterized in that</b><br/>
said low-resistance wirings (4, 4a, 4b, 4c) are provided for driving the solid-state imaging device (42), connected either to said first transfer electrodes (3a), said second transfer electrodes (3b) or said third transfer electrodes (3c) on said transfer channels (2) by the connecting portion (5), by a three-phase driving or a six-phase driving.</claim-text></claim>
<claim id="c-en-01-0010" num="0010">
<claim-text>A camera, comprising:
<claim-text>- an optical lens; and</claim-text>
<claim-text>- a solid-state imaging device (42) according to any one of claims 1 to 5 for converting an image obtained through the optical lens to an electric signal.</claim-text></claim-text></claim>
</claims><!-- EPO <DP n="33"> -->
<claims id="claims02" lang="de">
<claim id="c-de-01-0001" num="0001">
<claim-text>Festkörper-Abbildungsvorrichtung (42), die enthält:
<claim-text>- mehrere Lichtempfangsabschnitte (1), die in einer ersten Richtung (H) und in einer zweiten Richtung (V) senkrecht zu der ersten Richtung (H) angeordnet sind;</claim-text>
<claim-text>- mehrere Übertragungskanäle (2), die in der zweiten Richtung (V) verlaufen und wovon jeder zwischen den benachbarten Lichtempfangsabschnitten (1) angeordnet ist;</claim-text>
<claim-text>- mehrere erste Übertragungselektroden (3a), die in den Übertragungskanälen (2) angeordnet sind, wobei die benachbarten ersten Übertragungselektroden (3a), die auf beiden Seiten des Lichtempfangsabschnitts (1) positioniert sind, in der ersten Richtung (H) verbunden sind; und</claim-text>
<claim-text>- mehrere zweite Übertragungselektroden (3b), die in der gleichen Schicht der ersten Übertragungselektroden (3a) in dem Übertragungskanal (2) angeordnet sind; wobei</claim-text>
<claim-text>- niederohmige Verdrahtungen (4, 4a, 4b, 4c) vorgesehen sind, die in der ersten Richtung (H) über der ersten Übertragungselektrode (3a) verlaufen und einen niedrigeren Widerstand als jene der ersten Übertragungselektroden (3a) und der zweiten Übertragungselektroden (3b) besitzen,</claim-text>
<b>dadurch gekennzeichnet, dass</b>
<claim-text>- die Festkörper-Abbildungsvorrichtung ferner dritte Übertragungselektroden (3c) enthält, die in der gleichen Schicht der ersten Übertragungselektroden (3a) und der zweiten Übertragungselektroden (3b) in den Übertragungskanälen (2) in der ersten Richtung (H) angeordnet sind; und</claim-text>
<claim-text>- drei niederohmige Verdrahtungen (4, 4a, 4b, 4c) angeordnet sind, indem sie in der ersten Richtung (H) über jede der ersten Übertragungselektroden (3a) verlaufen, jede der drei niederohmigen Verdrahtungen (4, 4a, 4b, 4c) durch einen Verbindungsabschnitt (5) mit irgendeiner der ersten Übertragungselektroden (3a), der zweiten Übertragungselektroden (3b) oder der dritten Übertragungselektroden (3c) in den Übertragungskanälen (2) verbunden ist und jede der drei Übertragungselektroden (3a, 3b, 3c) durch den Verbindungsabschnitt<!-- EPO <DP n="34"> --> (5) mit nur einer der niederohmigen Verdrahtungen (4, 4a, 4b, 4c) verbunden ist; und</claim-text>
die Anzahl der niederohmigen Verdrahtungen (4, 4a, 4b, 4c) in einer 1:1-Entsprechung zur Anzahl der Übertragungselektroden (3a, 3b, 3c) steht.</claim-text></claim>
<claim id="c-de-01-0002" num="0002">
<claim-text>Festkörper-Abbildungsvorrichtung (42) nach Anspruch 1,<br/>
wobei die jeweiligen zweiten Übertragungselektroden (3b) in den Übertragungskanälen (2) in der horizontalen Richtung (H) getrennt und nicht verbunden sind.</claim-text></claim>
<claim id="c-de-01-0003" num="0003">
<claim-text>Festkörper-Abbildungsvorrichtung (42) nach Anspruch 1,<br/>
wobei die zweiten und dritten Übertragungselektroden (3b, 3c) durch die niederohmigen Verdrahtungen (4b, 4c) mit einer Auslesespannung (ØV2, ØV4) zum Auslesen der in den Lichtempfangsabschnitten (1) akkumulierten Signalladungen zu den Übertragungskanälen (2) versorgt werden.</claim-text></claim>
<claim id="c-de-01-0004" num="0004">
<claim-text>Festkörper-Abbildungsvorrichtung (42) nach Anspruch 1,<br/>
wobei die jeweiligen dritten Übertragungselektroden (3c) in den Übertragungskanälen (2) in der horizontalen Richtung (H) getrennt und nicht verbunden sind.</claim-text></claim>
<claim id="c-de-01-0005" num="0005">
<claim-text>Festkörper-Abbildungsvorrichtung (42) nach Anspruch 1,
<claim-text>- wobei die ersten Übertragungselektroden (3a) und die zweiten Übertragungselektroden (3b) aus Polysilizium ausgebildet sind, und</claim-text>
<claim-text>- wobei die niederohmigen Verdrahtungen (4, 4a, 4b, 4c) aus Wolfram ausgebildet sind.</claim-text></claim-text></claim>
<claim id="c-de-01-0006" num="0006">
<claim-text>Verfahren zum Herstellen einer Festkörper-Abbildungsvorrichtung (42) nach einem der vorhergehenden Ansprüche 1 bis 5,<br/>
das die folgenden Schritte enthält:
<claim-text>- Bilden der mehreren Lichtempfangsabschnitte (1) in der ersten Richtung (H) und in der zweiten Richtung (V);</claim-text>
<claim-text>- Bilden der Übertragungskanäle (2), die in der zweiten Richtung (V) verlaufen, und Anordnen jedes der Übertragungskanäle zwischen den benachbarten Lichtempfangsabschnitten (1);<!-- EPO <DP n="35"> --></claim-text>
<claim-text>- Bilden der ersten Übertragungselektroden (3a) in den Übertragungskanälen (2), wobei die benachbarten ersten Übertragungselektroden (3a), die auf beiden Seiten des Lichtempfangsabschnitts (1) positioniert sind, in der ersten Richtung (H) verbunden werden,</claim-text>
<claim-text>- Bilden der zweiten Übertragungselektroden (3b) in den Übertragungskanälen (2) in der gleichen Schicht der ersten Übertragungselektroden (3a), und</claim-text>
<claim-text>- Bilden niederohmiger Verdrahtungen (4, 4a, 4b, 4c), die in der ersten Richtung (H) über der ersten Übertragungselektrode (3a) verlaufen und einen niedrigeren Widerstand als jene der ersten Übertragungselektroden (3a) und der zweiten Übertragungselektroden (3b) besitzen,</claim-text>
<b>gekennzeichnet durch</b>
<claim-text>- Bilden dritter Übertragungselektroden (3c) in den Übertragungskanälen (2) in einer <b>durch</b> die gleichen Schritte des Bildens der ersten Übertragungselektroden (3a) und der zweiten Übertragungselektroden (3b) gebildeten Schicht,</claim-text>
<claim-text>- drei niederohmige Verdrahtungen (4, 4a, 4b, 4c), die angeordnet werden, indem sie in der ersten Richtung (H) über jede der ersten Übertragungselektroden (3a) verlaufen, wobei jede der drei niederohmigen Verdrahtungen (4, 4a, 4b, 4c) <b>durch</b> einen Verbindungsabschnitt (5) mit irgendeiner der ersten Übertragungselektroden (3a), der zweiten Übertragungselektroden (3b) oder der dritten Übertragungselektroden (3c) in den Übertragungskanälen (2) verbunden wird und wobei jede der drei Übertragungselektroden (3a, 3b, 3c) <b>durch</b> den Verbindungsabschnitt (5) mit nur einer der niederohmigen Verdrahtungen (4, 4a, 4b, 4c) verbunden wird; und</claim-text>
die Anzahl der niederohmigen Verdrahtungen (4, 4a, 4b, 4c) in einer 1:1-Entsprechung zur Anzahl der Übertragungselektroden (3a, 3b, 3c) steht.</claim-text></claim>
<claim id="c-de-01-0007" num="0007">
<claim-text>Verfahren nach Anspruch 6,<br/>
wobei die jeweiligen zweiten Übertragungselektroden (3b) in den Übertragungskanälen (2) in der horizontalen Richtung (H) getrennt und nicht verbunden sind.<!-- EPO <DP n="36"> --></claim-text></claim>
<claim id="c-de-01-0008" num="0008">
<claim-text>Verfahren nach Anspruch 6,
<claim-text>- wobei die ersten Übertragungselektroden (3a) und die zweiten Übertragungselektroden (3b) aus Polysilizium gebildet werden, und</claim-text>
<claim-text>- wobei die niederohmigen Verdrahtungen (4, 4a, 4b, 4c) aus Wolfram gebildet werden.</claim-text></claim-text></claim>
<claim id="c-de-01-0009" num="0009">
<claim-text>Ansteuerverfahren einer Festkörper-Abbildungsvorrichtung (42) nach den Ansprüchen 1 oder 5,<br/>
<b>dadurch gekennzeichnet, dass</b><br/>
die niederohmigen Verdrahtungen (4, 4a, 4b, 4c), die durch den Verbindungsabschnitt (5) mit irgendeiner der ersten Übertragungselektroden (3a), der zweiten Übertragungselektroden (3b) oder der dritten Übertragungselektroden (3c) in den Übertragungskanälen (2) verbunden sind, für die Ansteuerung der Festkörper-Abbildungsrichtung (42) durch eine Dreiphasen- Ansteuerung oder eine Sechsphasen-Ansteuerung vorgesehen sind.</claim-text></claim>
<claim id="c-de-01-0010" num="0010">
<claim-text>Kamera, die enthält:
<claim-text>- eine optische Linse; und</claim-text>
<claim-text>- eine Festkörper-Abbildungsvorrichtung (42) nach einem der Ansprüche 1 bis 5 zum Umsetzen eines durch die optische Linse erhaltenen Bildes in ein elektrisches Signal.</claim-text></claim-text></claim>
</claims><!-- EPO <DP n="37"> -->
<claims id="claims03" lang="fr">
<claim id="c-fr-01-0001" num="0001">
<claim-text>Dispositif de formation d'image à semi-conducteurs (42), comprenant :
<claim-text>- une pluralité de parties de réception de lumière (1) agencées dans une première direction (H) et une deuxième direction (V) perpendiculaire à la première direction (H) ;</claim-text>
<claim-text>- une pluralité de canaux de transfert (2) s'étendant dans la deuxième direction (V), chacun étant agencé entre les parties de réception de lumière (1) voisines ;</claim-text>
<claim-text>- une pluralité de premières électrodes de transfert (3a) agencées sur lesdits canaux de transfert (2), les premières électrodes de transfert (3a) voisines positionnées des deux côtés de la partie de réception de lumière (1) étant connectées dans la première direction (H) ; et</claim-text>
<claim-text>- une pluralité de deuxièmes électrodes de transfert (3b) agencées dans la même couche que lesdites premières électrodes de transfert (3a), sur lesdits canaux de transfert (2) ;</claim-text>
dans lequel
<claim-text>- des câblages à faible résistance (4, 4a, 4b, 4c) sont prévus s'étendant sur ladite première électrode de transfert (3a) dans la première direction (H), et ayant une résistance plus faible que ceux desdites premières électrodes de transfert (3a) et desdites deuxièmes électrodes de transfert (3b),</claim-text>
<b>caractérisé en ce que</b>
<claim-text>- le dispositif de formation d'image à semi-conducteurs comprend en outre des troisièmes électrodes (3c) agencées dans la même couche que lesdites premières électrodes de transfert (3a) et lesdites deuxièmes électrodes de transfert (3b), sur lesdits canaux de transfert (2) dans la première direction (H) ; et<!-- EPO <DP n="38"> --></claim-text>
<claim-text>- trois câblages à faible résistance (4, 4a, 4b, 4c) sont agencés en s'étendant sur chacune desdites premières électrodes de transfert (3a) dans la première direction (H), chacun desdits trois câblages à faible résistance (4, 4a, 4b, 4c) étant connecté soit auxdites premières électrodes de transfert (3a), soit auxdites deuxièmes électrodes de transfert (3b), soit aux troisièmes électrodes de transfert (3c) sur lesdits canaux de transfert (2) par une partie de connexion (5), et chacune desdites trois électrodes de transfert (3a, 3b, 3c) n'étant connectée qu'à l'un desdits câblages à faible résistance (4, 4a, 4b, 4c) par l'intermédiaire de ladite partie de connexion (5) ; et</claim-text>
le nombre desdits câblages à faible résistance (4, 4a, 4b, 4c) est dans une correspondance 1:1 avec le nombre d'électrodes de transfert (3a, 3b, 3c).</claim-text></claim>
<claim id="c-fr-01-0002" num="0002">
<claim-text>Dispositif de formation d'image à semi-conducteurs (42) selon la revendication 1,<br/>
dans lequel les deuxièmes électrodes de transfert (3b) respectives sur lesdits canaux de transfert (2) sont séparées et ne sont pas connectées dans la direction horizontale (H).</claim-text></claim>
<claim id="c-fr-01-0003" num="0003">
<claim-text>Dispositif de formation d'image à semi-conducteurs (42) selon la revendication 1,<br/>
dans lequel lesdites deuxièmes et troisièmes électrodes de transfert (3b, 3c) reçoivent, par l'intermédiaire desdits câblages à faible résistance (4b, 4c), une tension de lecture (ØV2, ØV4) pour extraire les charges de signal accumulées dans lesdites parties de réception de lumière (1) vers les canaux de transfert (2).</claim-text></claim>
<claim id="c-fr-01-0004" num="0004">
<claim-text>Dispositif de formation d'image à semi-conducteurs (42) selon la revendication 1,<br/>
<!-- EPO <DP n="39"> -->dans lequel les troisièmes électrodes de transfert (3c) respectives sur lesdits canaux de transfert (2) sont séparées et ne sont pas connectées dans la direction horizontale (H).</claim-text></claim>
<claim id="c-fr-01-0005" num="0005">
<claim-text>Dispositif de formation d'image à semi-conducteurs (42) selon la revendication 1,
<claim-text>- dans lequel lesdites premières électrodes de transfert (3a) et deuxièmes électrodes de transfert (3b) sont constituées de silicium polycristallin, et</claim-text>
<claim-text>- dans lequel lesdits câblages à faible résistance (4, 4a, 4b, 4c) sont constitués de tungstène.</claim-text></claim-text></claim>
<claim id="c-fr-01-0006" num="0006">
<claim-text>Procédé de fabrication d'un dispositif de formation d'image à semi-conducteurs (42), selon l'une quelconque des revendications 1 à 5 précédentes,<br/>
comprenant les étapes consistant à :
<claim-text>- former la pluralité de parties de réception de lumière (1) dans la première direction (H) et la deuxième direction (V) ;</claim-text>
<claim-text>- former les canaux de transfert (2) s'étendant dans la deuxième direction (V) en agençant chacun des canaux de transfert entre les parties de réception de lumière (1) voisines ;</claim-text>
<claim-text>- former les premières électrodes de transfert (3a) sur lesdits canaux de transfert (2), les premières électrodes de transfert (3a) voisines positionnées des deux côtés de la partie de réception de lumière (1) étant connectées dans la première direction (H) ;</claim-text>
<claim-text>- former les deuxièmes électrodes de transfert (3b) sur lesdits canaux de transfert (2) dans la même couche que lesdites premières électrodes de transfert (3a) ; et</claim-text>
<claim-text>- former des câblages à faible résistance (4, 4a, 4b, 4c) s'étendant sur ladite première électrode de transfert (3a)<!-- EPO <DP n="40"> --> dans la première direction (H), et ayant une résistance plus faible que ceux desdites premières électrodes de transfert (3a) et desdites deuxièmes électrodes de transfert (3b),</claim-text>
<b>caractérisé par</b>
<claim-text>- la formation de troisièmes électrodes de transfert (3c) sur lesdits canaux de transfert (2), dans une couche formée par les mêmes étapes de formation desdites premières électrodes de transfert (3a) et desdites deuxièmes électrodes de transfert (3b),</claim-text>
<claim-text>- trois câblages à faible résistance (4, 4a, 4b, 4c) étant agencés en s'étendant sur chacune desdites premières électrodes de transfert (3a) dans la première direction (H), chacun desdits trois câblages à faible résistance (4, 4a, 4b, 4c) étant connecté soit auxdites premières électrodes de transfert (3a), soit auxdites deuxièmes électrodes de transfert (3b), soit aux troisièmes électrodes de transfert (3c) sur lesdits canaux de transfert (2) par une partie de connexion (5), et chacune desdites trois électrodes de transfert (3a, 3b, 3c) n'étant connectée qu'à l'un desdits câblages à faible résistance (4, 4a, 4b, 4c) par l'intermédiaire de ladite partie de connexion (5), et</claim-text>
le nombre desdits câblages à faible résistance (4, 4a, 4b, 4c) étant dans une correspondance 1:1 avec le nombre d'électrodes de transfert (3a, 3b, 3c).</claim-text></claim>
<claim id="c-fr-01-0007" num="0007">
<claim-text>Procédé selon la revendication 6,<br/>
dans lequel les deuxièmes électrodes de transfert (3b) respectives sur lesdits canaux de transfert (2) sont séparées et ne sont pas connectées dans la direction horizontale (H).</claim-text></claim>
<claim id="c-fr-01-0008" num="0008">
<claim-text>Procédé selon la revendication 6,<!-- EPO <DP n="41"> -->
<claim-text>- dans lequel lesdites premières électrodes de transfert (3a) et deuxièmes électrodes de transfert (3b) sont constituées de silicium polycristallin, et</claim-text>
<claim-text>- dans lequel lesdits câblages à faible résistance (4, 4a, 4b, 4c) sont constitués de tungstène.</claim-text></claim-text></claim>
<claim id="c-fr-01-0009" num="0009">
<claim-text>Procédé de commande d'un dispositif de formation d'image à semi-conducteurs (42) selon les revendications 1 ou 5,<br/>
<b>caractérisé en ce que</b><br/>
lesdits câblages à faible résistance (4, 4a, 4b, 4c) sont prévus pour commander le dispositif de formation d'image à semi-conducteurs (42), connectés soit auxdites premières électrodes de transfert (3a), soit auxdites deuxièmes électrodes de transfert (3b), soit auxdites troisièmes électrodes de transfert (3c) sur lesdits canaux de transfert (2) par la partie de connexion (5), par une commande à trois phases ou une commande à six phases.</claim-text></claim>
<claim id="c-fr-01-0010" num="0010">
<claim-text>Caméra comprenant :
<claim-text>- une lentille optique ; et</claim-text>
<claim-text>- un dispositif de formation d'image à semi-conducteurs (42) selon l'une quelconque des revendications 1 à 5 pour convertir une image obtenue par la lentille optique en un signal électrique.</claim-text></claim-text></claim>
</claims>
<drawings id="draw" lang="en">
<figure id="f0001" num="1"><img id="if0001" file="imgf0001.tif" wi="113" he="109" img-content="drawing" img-format="tif"/></figure><!-- EPO <DP n="42"> -->
<figure id="f0002" num="2"><img id="if0002" file="imgf0002.tif" wi="165" he="132" img-content="drawing" img-format="tif"/></figure><!-- EPO <DP n="43"> -->
<figure id="f0003" num="3A,3B"><img id="if0003" file="imgf0003.tif" wi="146" he="172" img-content="drawing" img-format="tif"/></figure><!-- EPO <DP n="44"> -->
<figure id="f0004" num="4A,4B"><img id="if0004" file="imgf0004.tif" wi="130" he="141" img-content="drawing" img-format="tif"/></figure><!-- EPO <DP n="45"> -->
<figure id="f0005" num="5A,5B"><img id="if0005" file="imgf0005.tif" wi="132" he="157" img-content="drawing" img-format="tif"/></figure><!-- EPO <DP n="46"> -->
<figure id="f0006" num="6A,6B"><img id="if0006" file="imgf0006.tif" wi="125" he="158" img-content="drawing" img-format="tif"/></figure><!-- EPO <DP n="47"> -->
<figure id="f0007" num="7A,7B"><img id="if0007" file="imgf0007.tif" wi="128" he="161" img-content="drawing" img-format="tif"/></figure><!-- EPO <DP n="48"> -->
<figure id="f0008" num="8"><img id="if0008" file="imgf0008.tif" wi="151" he="183" img-content="drawing" img-format="tif"/></figure>
</drawings>
<ep-reference-list id="ref-list">
<heading id="ref-h0001"><b>REFERENCES CITED IN THE DESCRIPTION</b></heading>
<p id="ref-p0001" num=""><i>This list of references cited by the applicant is for the reader's convenience only. It does not form part of the European patent document. Even though great care has been taken in compiling the references, errors or omissions cannot be excluded and the EPO disclaims all liability in this regard.</i></p>
<heading id="ref-h0002"><b>Patent documents cited in the description</b></heading>
<p id="ref-p0002" num="">
<ul id="ref-ul0001" list-style="bullet">
<li><patcit id="ref-pcit0001" dnum="JP3123068B"><document-id><country>JP</country><doc-number>3123068</doc-number><kind>B</kind></document-id></patcit><crossref idref="pcit0001">[0005]</crossref></li>
<li><patcit id="ref-pcit0002" dnum="JP7283387A"><document-id><country>JP</country><doc-number>7283387</doc-number><kind>A</kind></document-id></patcit><crossref idref="pcit0002">[0005]</crossref></li>
<li><patcit id="ref-pcit0003" dnum="JP7226496A"><document-id><country>JP</country><doc-number>7226496</doc-number><kind>A</kind></document-id></patcit><crossref idref="pcit0003">[0005]</crossref></li>
<li><patcit id="ref-pcit0004" dnum="JP8236743A"><document-id><country>JP</country><doc-number>8236743</doc-number><kind>A</kind></document-id></patcit><crossref idref="pcit0004">[0005]</crossref></li>
<li><patcit id="ref-pcit0005" dnum="JP2003060819A"><document-id><country>JP</country><doc-number>2003060819</doc-number><kind>A</kind></document-id></patcit><crossref idref="pcit0005">[0005]</crossref><crossref idref="pcit0006">[0010]</crossref></li>
<li><patcit id="ref-pcit0006" dnum="US20020024066A1"><document-id><country>US</country><doc-number>20020024066</doc-number><kind>A1</kind></document-id></patcit><crossref idref="pcit0007">[0012]</crossref></li>
<li><patcit id="ref-pcit0007" dnum="US5912482A"><document-id><country>US</country><doc-number>5912482</doc-number><kind>A</kind></document-id></patcit><crossref idref="pcit0008">[0013]</crossref></li>
</ul></p>
</ep-reference-list>
</ep-patent-document>
