Pixel circuit, display using the same and driving method for the same

Description

Field of the Invention

[0001] The present invention is related to the structure and the driving method of a pixel circuit of a display and in particular to driving the pixel circuit and method compensating the threshold voltage variations of driving transistor thereof.

Prior Art

[0002] There has been tremendous growth in information technology during this century and almost all computing devices require varied sizes and high quality displays. For over 50 years, "cathode ray tubes" (CRTs) have been the dominant display technology providing high quality, brightness, contrast ratio, speed and resolution. Although, CRTs are excellent displays, the main disadvantage is their bulkiness. Integration of CRTs into small mobile devices was expensive and difficult. The solution to this problem was the development of Flat Panel Displays (FPDs). Active Matrix Organic Light Emitting Diode (AMOLED) panel displays have emerged as one of the next-generation flat panel displays. AMOLEDs offer many advantages over Liquid Crystal Displays (LCD), such as self-emitting nature, fast response time, light weight, wide viewing angle and thinner devices. AMOLED displays have been implemented with amorphous silicon (a-Si), polycrystalline silicon, organic or other driving backplane.

[0003] Currently most of the AMOLED displays use polysilicon thin-film transistors (poly-Si TFTs) due to their higher carrier mobility, higher current capability, and better switching behavior over other thin-film technologies. On the other hand, a-Si or organic TFTs even with lower mobility, are cost effective solutions.

[0004] TFTs operation can be divided into three working modes: cut-off, linear and saturation modes. For example, the drain current of an n-channel TFT can be represented with the following expressions for each working mode:






Where µ is the effective surface mobility of the carriers; C_ox is the gate oxide capacitance per unit area;
W is the effective gate mask width; L is the effective gate mask length; V_eff is the effective gate voltage, equal to the difference between the gate to source voltage V_gs and the transistor threshold voltage V_thn, V_eff = V_gs-V_thn;
Id_off is the drain current when the TFT is operating in the cut-off mode;
Id_linear is the drain current when the TFT is operating in the linear mode;
Id_sat is the drain current when the TFT is operating in the saturation mode.

[0005] The above expressions indicate the important role of the threshold voltage in TFT operation. The threshold voltage is determined by the gate and insulator materials, the gate oxide material thickness and the channel doping concentration. The major TFT disadvantage is the threshold voltage variation from device to device due to the channel material structure and fabrication process. In case of polysilicon TFTs, during the fabrication process, the amorphous silicon film is turned to polysilicon film by excimer laser annealing. Annealing process generates grain boundaries (GB) along the TFT channel. The grain boundaries are discontinuities for the carrier transport and their random distribution within the channel cause threshold voltage variation from device to device, even if the devices are implemented on the same wafer. Threshold voltage variation impacts the TFT drain current, since the drain current is a second order function of threshold voltage when the TFT operates in saturation mode and the TFT operation point shifts from the desired position. This means that the output drain current can not be well-controlled. The pixels using such TFT drivers will have irregular display uniformity (mura) due to threshold voltage variation, because driving TFTs supplied with the same data signal will produce different driving current and different OLED luminance. Similar is the behavior of amorphous and organic or other types of TFTs.

[0006] Apart from the threshold voltage variation, mobility variations are also observed in TFT large area electronics. However, the variation in transistor threshold voltage affects the device performance more seriously than the mobility variation in AMOLED driver circuits, as confirmed with measurements by V. Vaidya et al., "Comparison of pentacene and amorphous silicon AMOLED display driver circuits", IEEE Transactions on Circuits and Systems-I: Regular papers, Vol. 55, NO. 5, June 2008. Therefore, the threshold voltage shift poses a design constrain for the AMOLED backplanes.

[0007] The problem of threshold voltage variations was observed in the first generation of drivers using only two transistors. FIG. 1 shows the configuration of a conventional 2T1C AMOLED pixel 100. AMOLED panel is an array including a plurality of pixels, scan lines and data lines, as well as power supply VDD and VEE as shown in FIG. 2. Scan lines voltages are provided from external row driving circuits and data lines voltages are provided by column driving circuits. The pixels, each one including an organic light emitting diode (OLED) or other electroluminescent device as the light emitting device of the pixel, emits light when a certain amount of current pass through it, are coupled to power supply voltages VDD and VEE, and to external driving circuits via corresponding Scan lines and Data lines. In addition, each pixel includes two TFTs and a storage capacitor as shown in FIG.1. The first TFT 102 is a switch, where the gate and drain/source electrodes are coupled to the Scan Line signal 12 and the Data Line signal 14, respectively. The second TFT 104 is the driving TFT, where the gate electrode is coupled to the switch TFT 102 source/drain path and the source electrode to the power supply voltage VDD. The storage capacitor C_s 106 is coupled between the gate of the driving TFT 104 and the power supply voltage VDD, which keeps the gate voltage of the driving TFT 104 constant until the next frame period. The OLED 108 is coupled between the drain of the driving TFT 104 and the power supply voltage VEE.

[0008] An operation of the conventional AMOLED pixel will de described. FIG. 2 illustrates the pixels array architecture for an AMOLED display. The programming of the pixels array is made by row - at-a time, meaning that refreshing of the pixels configuration is implemented row by row and it is controlled by two external generated signals; a scan signal is generated from row driving circuits and data signal is generated from column driving circuits. The programming procedure includes the steps: First, the scan voltage from the scan line 12 turns "ON" the switch TFT 102. Then, the data signal is delivered via the turned-on switch TFT 102 to the driving TFT 104 gate node and the storage capacitor 106, producing a corresponding to the data signal driving current from the driving TFT 104 to the OLED 108, causing OLED to illuminate in response to the driving current.

[0009] The problem with pixel circuit of prior art is the driving TFT threshold voltage variation and the incapability of pixel circuit to compensate this variation. As a result, the threshold voltage variation causes large variation of current, resulting finally in non uniformity of illumination. To overcome this issue, many pixel circuits have been proposed.

[0010] G.R. Chaji, P. Servati and A. Nathan,[ELECTRONICS LETTERS, 14th April 2005 Vol. 41 No. 8], developed a driving scheme for a-Si AMOLED pixel where two thin film transistors (2T) and one capacitor (1C) are used, which needs a complicated signaling scheme with first three programming cycles before the driving period.

[0011] Similarly in the US Pat. No.7167169 B2, Pub. Date Jan.23, 2007, entitled "Active matrix OLED voltage drive pixel circuit", the 2T1C driving scheme needs a very complicated signaling scheme.

[0012] Also, in the US Pat. No.2005/0105031 A1, Pub. Date May 19, 2005 entitled "Pixel structure of display and driving method thereof" and in US Pat. No. 7,071,932 B2, Pub. Date Jul. 4, 2006, threshold voltage variations are compensated in a pixel with 3T1C driving circuit demanding a complicated signaling scheme.

[0013] Another implementation of a pixel driving circuit using 5T1C, entitled " A New Voltage-Modulated AMOLED Pixel Design Compensating for Threshold Voltage Variation in Poly-Si TFTs", published in IEEE ELECTRON DEVICE LETTERS, VOL. 25, NO. 10, OCTOBER 2004, by Sang-Hoon Jung, Woo-Jin Nam, and Min-Koo Han, in order to compensate the threshold voltage variations needs two Scan signals and a time interval to reset the previous data value stored in the capacitor.

[0014] In prior work, the most common compensation method is the increase of the gate voltage of the driving TFT by one threshold voltage. In this way, the effective gate voltage V_eff will be independent of the threshold voltage V_th and the produced current will be stable, i.e.


Where V_gs is the gate to source voltage of the TFT, V_ref is a reference or data voltage.

[0015] In order to achieve this, an additional circuit block coupled to the gate node of the driving TFT was required for producing and adding the threshold voltage to the gate node. The additional circuit part with the control signals is a dynamic component affecting the column and row drivers' architecture of the AMOLED, since complex signaling is needed. Also, more than one capacitors will be included increasing the real silicon area and the response time. Therefore, the prior work pixels and methods for suppressing the threshold voltage variations have many design difficulties, leading to limited applications and performance.

[0016] Document EP-A-1 193 676 further discloses a compensation TFT that is used in order to reduce the variation of the supplied current to each organic EL element. The compensation TFT is of the opposite type of channel with respect to the driving TFT, that means the compensation TFT is p-channel in case of an n-channel driving TFT or the inverse. Therefore, by having the compensation TFT in diode-connected configuration, the opposite sign threshold voltage of the driving TFT can be produced. The opposite sign threshold voltage is applied to the source terminal of the driving TFT.

[0017] This method is based on the assumption that two opposite type of TFTs are sharing the same characteristics, like the threshold voltage. In TFT technology with the inherit threshold voltage variations, it is very difficult to control the threshold voltage, especially when this has to be applied to different types of transistors. Therefore, the variations of the EL supply current may be high, leading to a poor performance of the pixel and the whole display. Furthermore, n-type and p-type transistors have different aging behavior meaning that even if they share the same absolute threshold voltage value, this characteristic will be modified as time pass. Finally, the fabrication cost will increase because in case of the existence of two different types of transistors more masks and fabrication steps have to be added.

[0018] In document US 2005/168415 A1, there is further disclosed an external compensation circuit that is used in order to reduce the impact of the threshold voltage variations. The external compensation circuit consists of a diode-connected transistor with the same conductivity as the pixel's driving transistor. The same compensation circuit is used for all pixels belonging at the same column and it is activated during the writing period of each pixel.

[0019] This method is based on the assumption that the compensation transistor has the same electrical characteristics, like the threshold voltage, with all the pixels driving transistors of the same column. This configuration is very unlikely to be achieved due to the threshold voltage variations. Especially, when the transistors are not fabricated close enough, the variations will increase due to the crystallization process. Furthermore, the performance of the pixels will be degraded since the compensation method is applied per column and not per pixel. Finally, the use of the same compensation circuit for more than one pixel can lead to other undesired effects, like the cross-talking between neighbor pixels.

[0020] Document US2004/183758A1 actually discloses a "mirror" transistor is used to extract the threshold voltage which is used to increase the gate voltage of the driving transistor by this value. On the other hand, the invention set out below uses a "mirror" transistor to extract the threshold voltage which is delivered to the source terminal of the driving transistor. This means that for said document, the data voltage is somehow programmed depending on the extracted threshold voltage (Vg = VDATA + Vth) while for the proposed one is the supply voltage is threshold voltage programmable (Vs = Vdd - Vth). This impacts the speed of the pixels and it is expected that the proposed one will be much faster compared to said document. This is occurs because the depended on the threshold voltage data voltage according to said document requires additional components (transistors, lines and capacitors) to lie on the data path resulting in increased time response. On the contrary, according to the invention set out below the minimum number of components exists on the data path and consequently the proposed pixel will have the minimum time response and maximum speed.

SUMMARY OF THE INTENTION

[0021] The present invention discloses a pixel circuit, an image display using the same and a driving method thereof, which presents advantages compared to the existing ones for suppressing the threshold voltage variation of thin film transistors and producing a stable threshold - independent current in the pixel.

[0022] The pixel circuit according to the present invention comprises:

• a data line for supplying a data voltage,
• a scan line for supplying a control signal,
• a first bias current line for supplying a constant current,
• a second bias current line for supplying a constant current,
• a switch transistor having a gate terminal coupled to the scan line, a first terminal coupled to the data line and a second terminal,
• a driving transistor having a gate terminal connected to the second terminal of the switching transistor,
• a first power supply voltage line and a second power supply voltage line, wherein the first one is the more positive one in case of a p-type implementation, and the second one is the more positive one in case of a n-type implementation, the implementation type being defined by the type of the driving transistor,
• a capacitor having a first terminal and a second terminal, wherein the first one is coupled to the gate of the driving transistor and the second terminal is coupled to the more positive power supply voltage line of the first and second power supply voltage lines, for maintaining the data voltage supplied to the gate of the driving transistor during a predetermined time,
• a current-controlled light emitting device means, for emitting light the brightness of which corresponds to the current applied, which is connected between the drain terminal of the driving transistor and the second power supply voltage line, adapted to generate light so as display image and
• a threshold voltage cancellation circuit.

[0023] Said pixel circuit is remarkable in that said threshold voltage cancellation circuit is implemented with the same type of transistors as the said driving transistor and has four terminals, whereof the first terminal is connected to the first power supply voltage line, the second terminal is connected to the source terminal of the driving transistor, the third terminal is connected to the first bias current line and the fourth terminal is connected to the second bias current line, said threshold voltage cancellation circuit being adapted to provide via the second terminal an output voltage value to the source of said driving transistor which is such that a predetermined current is supplied to the light emitting means,

• in that said threshold voltage cancellation circuit comprises :

  an opposite sign threshold voltage value extractor providing at its output terminal a voltage equal to the opposite sign threshold voltage value of the said driving transistor, and

  a buffer comprising an input terminal and an output terminal, the input terminal of the buffer is connected to the output terminal of the opposite sign threshold voltage value extractor and the output of the buffer is connected to the source of said driving transistor via the second terminal of said threshold voltage cancellation circuit, the buffer providing at its output terminal an output voltage, wherein the difference between the output voltage of the buffer and the opposite sign threshold voltage is a constant voltage,

  wherein said buffer sources the said predetermined current of the driving transistor in the p-type implementation, while sinks the said predetermined current of the driving transistor in the n-type implementation,

• in that said opposite sign threshold voltage value extractor comprises an extractor transistor, having its source terminal connected to the input terminal of the buffer and to said first bias current line via the third terminal of the opposite sign threshold voltage value extractor and its drain and gate terminal connected together to the second power supply line, and
• in that the switching transistor is either of a p-type implementation or a n-type implementation and all other transistors of the pixel circuit are of the same type, either of a p-type implementation or a n-type implementation, and
• in that said extractor transistor has the same electrical characteristics as the driving transistor, wherein the electrical characteristics are defined by the width and the length of the transistor.

[0024] According to a preferred embodiment of the invention, said buffer comprises two transistors of the same type as the driving transistor, whereas the gate terminal of the first transistor of the said buffer is connected to the output terminal of the said opposite sign threshold voltage value extractor, the source terminal is connected to the source terminal of the said driving transistor and its drain terminal is connected to the said second bias current line, and the gate terminal of the second transistor is connected to the said second bias current line, the source terminal of the second transistor is connected to the first power supply line and the drain terminal of the second transistor is connected to the source terminal of the said driving transistor.

[0025] The present invention also proposes a method for driving a pixel circuit as defined above comprising the steps of:

supplying the threshold voltage cancellation circuit with the first and second bias current, providing at its output a voltage value, which is equal to the said extractor transistor threshold voltage and the said second power supply voltage line, with the source terminal of the driving transistor connected to the output terminal of the said threshold voltage compensation circuit, providing a predetermined potential to the source terminal of the driving transistor, whereas

the said predetermined potential is constant and equal to the opposite sign value threshold voltage of the driving transistor and the said second power supply voltage line voltage, because the said extractor transistor and the driving transistor are implemented with the same type of transistors with the same dimensions and electrical characteristics, and

the gate terminal of the said driving transistor is applied with the said data line voltage and the source terminal is biased to the predetermined constant potential, resulting in the difference between the said voltage value of the gate terminal and the said predetermined voltage of the source terminal of the driving transistor being a constant ensuring that the current through the light emitting means is made independent from the threshold voltage of the driving transistor and its threshold voltage variations.

[0026] According to a preferred embodiment of the method of the invention, said threshold voltage variations cancellation circuit is continuously in a conductive state, providing a predetermined constant voltage continuously.

[0027] According to a further preferred embodiment of the method of the invention, the driving current through the light emitting device means is made independent from the first and second constant bias current variations.

[0028] The present invention also proposes a matrix display array comprising the pixel circuit as set out above.

BRIEF DESCRIPTION OF THE DRAWINGS

[0029] Fig. 1 shows the prior art pixel driving circuit.

[0030] Fig. 2 shows the prior work AMOLED architecture

[0031] Fig. 3 shows the block diagram of the pixel circuit of an embodiment of the invention

[0032] Fig. 4 shows the p-type implementation of the pixel circuit according to an embodiment of the invention

[0033] Fig. 5 shows the n-type implementation of the pixel circuit according to an embodiment of the invention

[0034] Fig. 6 shows the "threshold voltage variation cancellation circuit" block diagram according to an embodiment of the invention

[0035] Fig. 7 shows the p-type implementation of the opposite sign threshold voltage value extractor

[0036] Fig. 8 shows the n-type implementation of the opposite sign threshold voltage value extractor

[0037] Fig. 9 shows the p-type implementation of the buffer implemented by a Flipped Voltage Follower circuit

[0038] Fig. 10 shows the n-type implementation of the buffer implemented by a Flipped Voltage Follower circuit

[0039] Fig. 11 shows the complete p-type implementation pixel circuit according to an embodiment of the invention

[0040] Fig. 12 shows the complete n-type implementation pixel driving circuit according to an embodiment of the invention

[0041] Fig. 13 shows an active matrix display architecture using the proposed pixel circuit for p-type (n-type) implementation with I_bias1 and I_bias2 (I_bias11 and I_bias22) bias currents.

DETAILED DESCRIPTION OF THE INVENTION

[0042] The main disadvantage of the TFT technology is the variation of the threshold voltage from device to device, even if the devices are implemented on the same wafer. Therefore, the produced drain current is not well-controlled and the analog circuit design is a very difficult task. In order to overcome this disadvantage, the common method used for the design of analog circuits is to increase the TFT gate voltage by one threshold voltage and the produced drain current would be threshold voltage independent.

[0043] For an n-type implementation, the effective voltage V_eff of an-channel TFT is equal to:

[0044] If the TFT is working in the saturation mode, the drain current expression is given by:

[0045] If the gate voltage is increased by a threshold voltage, the effective gate voltage is equal to:

[0046] The drain current Id_satn is equal to:


Where V_thn is the TFT threshold voltage, V_ref is the reference or data voltage, µ is the mobility of the carriers, C_ox is the gate capacitance of the TFT and W and L are the width and length of the TFT respectively.

[0047] From the above expression, it is seen that if the gate voltage is increased by one threshold voltage, the produced drain current will be independent of the threshold voltage. The source voltage is kept constant, not affecting the above expressions.

[0048] Embodiments of the invention are related to a pixel circuit, an image display using the pixel, and a driving method for the pixel, and more particularly, the present invention is related to a pixel circuit, a display using the pixel, and a driving method for the light emitting element of the pixel, in which compensation is made for variation in the threshold voltage (V_th) of a drive transistor.

[0049] The invention might be discussed in the context of a general light emitting device (EL device), and for simplicity it will be considered an organic light emitting diode (OLED) as a light emitting device.

In case of an n-channel TFT:

[0050] Instead of increasing the gate voltage as it was described in the prior work, the source voltage is decreased by one threshold voltage V_thn, i.e. the voltage at the source node of the TFT is

[0051] If a voltage V_ref is applied to the gate electrode of the TFT, the effective voltage is equal to:

and the drain current is given by:

[0052] The above expression shows that the drain current is threshold voltage independent. In a similar way, in case of p-type TFT the above analysis is valid considering that all voltages, V_eff, V_gs and V_th have negative values, the source voltage is increased by one opposite sign threshold voltage, as described in a following embodiment. A pixel circuit is designed thereof.

[0053] FIG. 3 illustrates a pixel circuit according to an embodiment of the invention. Pixel circuit 200 compensates the threshold voltage variations of the driving transistor 202, so that the drain current feeding the OLED 206 is stable and insensitive to the threshold voltage variations. Pixel circuit 200 comprises a switch transistor 210, a driving TFT 202, a threshold voltage variations cancellation circuit 20 and an OLED 206.

[0054] The first terminal of the switch TFT 210 is coupled to the Data Line 14, the second terminal is coupled to the gate electrode of the driving TFT 202 and the third terminal, (its gate), is coupled to the Scan Line 12. The source electrode of the driving TFT 202 is coupled to the first terminal (the output) of the threshold voltage variation cancellation circuit 20 and the drain electrode of the driving TFT 202 is coupled to the first terminal of the OLED 206. The second terminal of the threshold voltage variation cancellation circuit 20 is coupled to a first external power supply, Power Supply 1. The second terminal of the OLED 206 is coupled to a second external power supply, Power Supply 2. The pixel comprises also a storage capacitor 204, with the first terminal coupled to the gate of the driving TFT 202 and the second terminal coupled to the higher external power supply, V_supply-high, which can be either Power Supply 1 or Power Supply 2.

[0055] Fig. 4 illustrates a p-type implementation of the pixel circuit 200, where all thin film transistors (TFTs) used for the driving circuit are p-channel TFTs according to an embodiment of the invention. The first terminal of the switch TFT 4210 is coupled to the Data Line 14, the second terminal is coupled to the gate of the driving TFT 4202 and the third terminal, (its gate), is coupled to the Scan Line 12. The driving TFT 4202 can include a p-type TFT with the gate electrode coupled to the second terminal of the switch TFT 4210, the source electrode coupled to the threshold voltage variation cancellation circuit 20 and the drain electrode to a first terminal of the OLED 4206. The second terminal of the threshold voltage variation cancellation circuit 20 is coupled to Power Supply 1. The pixel circuit, also, includes a storage capacitor 4204 with the first terminal coupled to the gate electrode of the driving TFT and the second terminal coupled to the Power Supply 1, which corresponds to the higher power line for the p-channel implementation. The first terminal of the OLED 4206 is coupled to the drain of the driving TFT 4202 and the second terminal of the OLED is coupled to the Power Supply 2, which in this p-type implementation can be the lower power supply or ground. OLED 4206 illuminates in response to the current flowing through it.

[0056] When the Scan Voltage (V_scan) from the Scan line 12 is pulled low, switch TFT 4210 is turned "ON" and the Data Voltage (V_data) from the Data line 14 is being transferred through switch TFT 4210 in the pixel and which in turn is stored in the storage capacitor 4204. When the Data Voltage is stored in the storage capacitor 4204, the Scan Voltage is pulled low and the switch TFT 4210 is turned "OFF". The Data Voltage is then applied to the gate node of the driving TFT 4202. The storage capacitor 4204 ensures that the gate voltage of the driving TFT 4202 is kept constant during a frame time. Driving TFT 4202 will be working in the saturation mode and the produced drain current will cause the illumination of OLED 4206 and the drain current Id_satp of the TFT is:


Where V_thp is the threshold voltage of the p-channel TFT 4202 and V_s is the voltage of the source node of the driving TFT 4202.

[0057] The source node of driving TFT 4202 is coupled to the threshold voltage variation cancellation circuit 20, the later providing an output voltage which is the sum of the threshold voltage and a constant given by:

where V_ct is a constant voltage independent of the TFT_s threshold voltage V_thp.

[0058] Since V_out = V_s, the drain current of the driving transistor 4202 and then the current driving the OLED is given by:

[0059] The above expression shows that the current flowing through the OLED device 4206 is independent of the driving TFT threshold voltage, considering that the threshold voltage variation cancellation circuit 20 provides at its output a threshold voltage equal to the threshold voltage of the driving TFT 4202.

[0060] Fig. 5 illustrates an n-type implementation of the pixel driving circuit and the OLED, where all transistors used for the driving circuit are n-channel TFTs according to an embodiment of the invention. Switch TFT 5210 and driving TFT 5202 can include n-type TFTs. The first terminal of the switch TFT 5210 is coupled to the Data Line 14, the second terminal is coupled to the gate of the driving TFT 5202 and the third terminal (gate) is coupled to the Scan Line 12. The driving TFT 5202 has a gate electrode coupled to the second terminal of the switch TFT 5210, a source electrode coupled to the first terminal (output) of the threshold voltage variation cancellation circuit 20 and the drain electrode coupled to the first terminal of the OLED 5206. The pixel circuit, also, includes a storage capacitor 5204 with the first terminal coupled to the gate electrode of the driving TFT and the second terminal coupled to the Power Supply 2, which corresponds to the higher power supply, for the n-type implementation. The first terminal of the OLED 5206 is coupled to the drain of the driving TFT 5202 and the second terminal of the OLED 5206 is coupled to the Power Supply 2. The second terminal of the threshold voltage variation cancellation circuit 20 is coupled to Power Supply 1, which in this n-type implementation can be the lower power supply or ground. OLED 5206 illuminate in response to the current flowing through it.

[0061] When the scan voltage from the Scan Line 12 is pulled high, the switch TFT 5210 is turned "ON" and the data voltage V_data from the Data Line 14 is stored to the storage capacitor 5204. The storage capacitor 5204 ensures that the gate voltage of the driving TFT 5202 is kept constant during a frame time. The gate voltage of the driving TFT 5202 will be equal to the stored data voltage V_data and the driving TFT will be working in the saturation mode, producing a drain current equal to:

[0062] The threshold voltage variation cancellation circuit 20 produces an output voltage, which is the sum of the threshold voltage and a constant given by


Where V_ct1 is independent of the threshold voltage V_thn.

[0063] Since the output voltage of the threshold voltage variation cancellation circuit 20 is equal to the source voltage of the driving TFT 5202 (V_out = V_s), the drain current of the driving TFT is:

[0064] The above expression shows that the current flowing through the OLED device 5206 is a function of the Data Voltage (V_data) and a constant voltage (V_ct1) which both are independent of the driving TFT threshold voltage.

[0065] Fig. 6 shows the block diagram of the threshold voltage variation cancellation circuit 20, having two terminals, the first one 170 being connecting at the power supply 1 either positive or negative/ground the second one 70 being its output. This circuit may include an opposite sign threshold voltage extractor 40 and a buffer 30 with high source or sinking current capability depending on the specifications of the used light emitting device. The opposite sign threshold voltage extractor 40 feeds the buffer 30 with a voltage equal to the threshold voltage of opposite sign, which is considered to be equal to the threshold voltage of the driving transistor 202. At the output 70 of the buffer 30 and then of the threshold voltage variation cancellation circuit 20, a linear function of the threshold voltage of opposite sign is obtained.

[0066] Fig. 7 shows the p-type implementation of the opposite sign threshold voltage extractor 40. An opposite sign threshold voltage extractor may include a p-channel TFT 742. TFT 742 is diode-connected, which means that the gate and drain nodes are coupled together to the power supply 2 line, which in case of p-type implementation corresponds to the ground line. Since TFT 742 is diode-connected, it is working in the saturation mode. The TFT 742 source electrode is coupled to a bias current I_bias1 750. The bias current I_bias1 750 has a small value and the TFT's operation point will be close to the limit of the saturation mode. Therefore, the voltage at the source electrode 760 of the TFT 742 will be equal to the opposite sign value of the threshold voltage of the TFT 742. Considering that transistors TFT 742 and the driving TFT 4202 have equal threshold voltages, since they are very closely located on the same wafer, the voltage at the source electrode 760 of the TFT 742 is equal to the opposite sign value of the driving TFT 4202 threshold voltage.

[0067] Fig. 8 shows the n-type implementation of the opposite sign threshold voltage extractor 40. The diode-connected TFT 842 with its drain and gate electrodes coupled to the Power Supply 2, which in case of n-type implementation corresponds to the higher power supply, represented by V_DD and the source electrode coupled to the bias current I_bias11, which is small enough so that the operation point of the TFT 842 is near the limit of the saturation mode. Therefore, the voltage at the source electrode 860 (output electrode) of TFT 842 is equal to V_DD minus the threshold voltage of TFT 842, V_DD-V_thn. Considering that transistors TFT 842 and the driving TFT 5202 have equal threshold voltages, since they are very closely located on the same wafer, the voltage at the source electrode 860 of the TFT 842 is equal to a the difference between a constant voltage and the opposite sign value of the driving TFT 5202 threshold voltage.

[0068] Fig. 9 shows an example of the p-type implementation of a buffer. The buffer 30 is called "flipped voltage follower" and it is based on the common source amplifier. The buffer 30 includes a p-channel input TFT 932, which is connected as a common source amplifier. The gate electrode of the input TFT 932 is connected to the output electrode 760 of the opposite sign threshold voltage extractor TFT 742, when p-channel transistor is used as shown in fig. 7. Considering that transistors TFT 742 and the driving TFT 4202 have equal threshold voltages, since they are closely located on the same wafer, the input voltage of the buffer 30 is equal to the opposite sign value of the driving TFT 4202 threshold voltage. The drain electrode of TFT 932 is coupled to a dc bias current I_bias2 980. This means that the current flowing through the input transistor TFT 932 of the buffer is kept constant and the voltage gain is unity. The buffer 30 could be described as a voltage follower with shunt feedback. The buffer also includes a p-channel TFT 934 with the gate electrode coupled to the drain electrode of input TFT 932, the drain electrode coupled to the source electrode of TFT 932 and the source electrode coupled to Power Supply 1, which is the higher power supply and it has a value equal to V_DD. The buffer 30 is able to source a large amount of current. The large sourcing capability is due to the low impedance at the source electrode of the input TFT 932. The output current I_OLED of the buffer 30 is equal to the drain current Id_sat of the driving TFT 4202. The current of the TFT 934 is equal to the sum of the Id_sat current and the bias current I_bias2 980. TFT 934 could either working in the saturation mode or in the linear mode without affecting the functionality of the buffer 30. The voltage at the output electrode 970, V_out, of the buffer 30 follows the input voltage with a dc level shift V_ct, independently of the output current I_OLED.. Therefore, the voltage at the output electrode 970, V_out, of the buffer 30 is the sum of the constant voltage V_ct and the absolute value of the threshold voltage of the TFT 4202, i.e.

[0069] Fig. 10 shows an example of the n-type implementation of the buffer, ("flipped voltage follower"). The buffer includes an n-type TFT 1032 with the voltage at the gate electrode equal to the voltage at the output electrode 860 of the opposite sign threshold voltage extractor. The drain electrode of the TFT 1032 is coupled to a dc bias current I_bias22 1080. This means that the current flowing through TFT 1032 is kept constant and the voltage gain is unity. The buffer 30 could be described as a voltage follower with shunt feedback. The buffer also includes an n-channel TFT 1034 with the gate electrode coupled to the drain electrode of TFT 1032, the drain electrode coupled to the source electrode of TFT 1032 and the source electrode coupled to Power Supply 1, which is the lower power supply having a value equal to V_EE or ground. TFT 1032 is connected as a common source follower with constant drain current, since TFT 32 is coupled to a dc bias current I_bias22 1080. Therefore, the gain of the buffer is unity. In this case where n-channel TFTs are used, the buffer is able to sink an amount of current, but the sinking capability is restricted from the bias current I_bias22 1080. The bias current I_bias22 is equal to the sum of the Id_sat (or I_OLED) plus the drain current I_EE of TFT 1034. The output voltage of the buffer is given by the difference of the constant voltage V_ct1 and the threshold voltage of the TFT 5202, i.e.

[0070] From the above description, it is shown that in both p-type and n-type implementations of the threshold voltage cancellation circuit 20, suppress of the threshold voltage variations is static, without needing additional control signals. Therefore, only one phase of operation occurs during the functionality of the pixel. Furthermore, no changes have to be made in the basic AMOLED architecture shown in figure 2.

[0071] Fig. 11 shows the complete p-type implementation of the pixel circuit 200. In this implementation, all transistors are p-channel thin film transistors, Power Supply 1 is the higher supply voltage designated here as V_DD, while the lower supply voltage Power Supply 2 is the ground line.

[0072] The first terminal of the switch TFT 11210 is coupled to the Data Line 14, the second terminal is coupled to the gate of the driving TFT 11202 and the third terminal (gate) is coupled to the Scan Line 12. The source electrode of the driving TFT 11202 is coupled to the first terminal (output) 1170 of the threshold voltage variations cancellation circuit and the drain electrode of the driving TFT 11202 is coupled to the first terminal of the OLED 11206. The second terminal of the OLED 11206 is coupled to the ground line.

[0073] The first terminal of the storage capacitor 11204 is coupled to the gate of the driving TFT 11202 and its second terminal is coupled to the higher external power supply V_DD. The storage capacitor 11204 ensures that the gate voltage of the driving TFT 11202 is kept constant during a frame time.

[0074] The drain electrode of TFT 1132 is coupled to a dc bias current I_bias2 1180. The gate electrode of TFT 1132 is coupled to node 1160, which is the source electrode of TFT 1142. The gate electrode of TFT 1134 is coupled to the drain electrode of TFT 1132, the drain electrode is coupled to the source electrode of TFT 1132 and the source electrode coupled to the higher power supply voltage V_DD. TFT 1142 has the drain and gate electrodes coupled to the ground line and the source electrode coupled to the bias current I_bias1 1150.

[0075] In this p-type implementation the threshold voltage extractor TFT 1142 provides at its output node 1160 a voltage value equal to the opposite sign of the threshold voltage, |V_thp|, of TFT 1142. This voltage, which is the input voltage of the buffer, feeds the buffer consisting of the transistors TFT 1132 and TFT 1134. At the output node 1170 of the buffer, a voltage is produced, which is equal to the sum of a constant voltage and the opposite sign of the threshold voltage value |V_thp|, V_s=V_ct + |V_thp|, where V_ct is a constant voltage independent of the TFTs threshold voltage V_thp.

[0076] Node 1170 is coupled to the source electrode of the driving transistor 11202. When a scan signal is applied to the gate of the switching TFT 11210, a data voltage V_data is charging the capacitor 11204. Then the drain current Id_satp of the driving TFT 11202 is given by

[0077] Since V_s=V_ct + |V_thp|, the drain current of the driving transistor 11202 and then the current driving the OLED 11206 is given by

[0078] The above expression shows that the current flowing through the OLED device 11206 is independent from the driving TFT threshold voltage and the brightness of the OLED device will be well - controlled.

[0079] In this p-type implementation, in case where an OLED light emitting element is used, the anode of the OLED is driven and the cathode is coupled to the ground line.

[0080] Fig. 12 shows the complete n-type implementation of the pixel circuit 200. In this implementation, all transistors are n-channel thin film transistors, the Power Supply 2 is the higher supply voltage designated here as V_DD, where as the lower supply voltage Power Supply 1 is the ground line.

[0081] The first terminal of the switch TFT 12210 is coupled to the Data Line 14, its second terminal is coupled to the gate electrode of the driving TFT 12202 and the third terminal (its gate) with Scan Line 12. The source electrode of the driving TFT 12202 is coupled to the first terminal (output) 1270 of the threshold voltage variations cancellation circuit and the drain electrode of the driving TFT 12202 is coupled to the first terminal of the OLED 12206. The second terminal of the OLED 12206 is grounded.

[0082] The first terminal of the storage capacitor 12204 is coupled to the gate electrode of the driving TFT 12202 and the second terminal is coupled to the higher external power supply V_DD. The storage capacitor 12204 ensures that the gate voltage of the driving TFT 12202 is kept constant during a frame time.

[0083] The drain electrode of TFT 1232 is coupled to a dc bias current I_bias22 1280. The gate electrode of TFT 1232 is coupled to node 1260, which is the source electrode of TFT 1242. The gate electrode of TFT 1234 is coupled to the drain electrode of TFT 1232, its drain electrode is coupled to the source electrode of TFT 1232 and its source electrode is coupled to the ground line. TFT 1242 has the drain and gate electrodes grounded and its source electrode coupled to the bias current I_bias11 1250.

[0084] In this n-type implementation, the threshold voltage extractor TFT 1242 provides at its output node 1260 a voltage value equal to the difference between V_DD and the threshold voltage (which is proportional to the opposite sign of the threshold voltage) V_thn of TFT 1242. This voltage, which is the input voltage of the buffer, feeds the buffer consisting of the transistors TFT 1232 and TFT 1234. At the output node 1270 of the buffer a voltage V_s1 is produced, which is equal to the sum of a constant voltage V_ct1 and the threshold voltage V_thn, V_s1=V_ct1 + |V_thn|, where V_ct1 is a constant voltage independent of the TFTs threshold voltage V_thn.

[0085] Node 1270 is coupled to the source electrode of the driving transistor 12202. When a scan signal is applied to the gate of switching TFT 12210 a data voltage V_data is charging the capacitor 12204. Then, the drain current Id_satn of driving TFT 12202 is given by

[0086] Since V_s1=V_ct1 + |V_thn|, the drain current of the driving transistor 12202 and then the current driving the OLED 12206 is given by

[0087] The above expression shows that the current that flows through OLED device 12206 is independent of the driving TFT threshold voltage, considering that TFT 1242 of the threshold voltage extractor circuit has similar electrical characteristics with those of the driving TFT 12202.

[0088] In this n-type implementation, in case where an OLED light emitting element is used, the cathode of the OLED is driven and its anode is coupled to V_DD.

[0089] Fig. 13 shows the AMOLED display architecture using the proposed pixel circuit 200. This architecture has the same simple structure with the basic AMOLED display architecture of the prior work shown in FIG. 2, in terms of scan lines, data lines and power supplies. It is noted that the proposed pixel circuit requires two additional lines for the dc bias currents; first one for the opposite sign threshold voltage extractor and another one for the buffer.

[0090] The pixel circuit of the present invention offers several advantages that are worth noting, considering an AMOLED image display:

(1) The present invention substantially reduces threshold voltage variations and therefore, the undesirable effects of threshold voltage variations on the brightness of a light emitting device.

(2) The present invention uses a small number of components (five transistors and only one capacitor), as well as limited number of control signals thus allowing for small pixels size leading to high resolution.

(3) The present invention uses a threshold voltage variation cancellation unit, which is a static circuit providing at its output continuously a voltage to compensate for the threshold voltage, and therefore only one control signal, the Scan signal, is needed for the AMOLED display. This, results in a very fast response of each pixel leading to a simple and very fast refreshing of the AMOLED display, therefore to a better quality of the produced image.

(4) In the present invention, the pixel circuit can be implemented with both types of TFT, p-channel and n-channel or even in mixed type n-channel and p-channel fabricated in different TFT technologies, polycrystalline silicon, amorphous silicon, nanocrystalline silicon, organic, and oxide (transparent) TFT technologies. It is noted that depending on the quality or the type of TFT produced in each technology, p-type or n-type or mixed type implementation may be used.

(5) In the present invention, commercially available voltage drivers can be used to address the pixel, with threshold voltage independent OLED drive current transformation, furthermore, commercially available current drivers for the dc bias currents can be used to feed the circuits of the opposite sign threshold voltage extractor, as well as the buffer in case of using the aforementioned p-type or n-type implementations.

[0091] It will be understood that when an element or a terminal of an element or a device is referred to as being "connected to" or "coupled to", another element or a terminal of an element or an electrode of an element, it can be directly on the other element or intervening elements may also be present. In addition, it will be understood that when an element or a device is referred to as being "between" two elements, it can be the only elements between the elements, or one or more intervening elements may also be present. Furthermore, when it is described that a device "includes" a constituent element, it means that the device may further include other constituent elements in addition to the element unless specifically referred to the contrary. Like numbers refer to like elements throughout.

[0092] It should also be understood that terms "first," "second," etc. may be used herein to describe various elements, and should not be limited by these terms. These terms are only used to distinguish an element from another element. Thus, a first element discussed herein could be termed a second element without departing from the teachings of example embodiments.

[0093] Exemplary embodiments of the present invention have been disclosed herein, and although specific terms are employed, there are used and are to be interpreted in a generic and descriptive sense only and not for purpose of limitation. Accordingly, it will be understood by those of ordinary skill in the art that various changes in form and details may be made without departing from the scope of the present invention as set forth in the following claims.

Claims

1. A pixel circuit (200) including:

- a data line (14) for supplying a data voltage,

- a scan line (12) for supplying a control signal,

- a first bias current line (750) for supplying a constant current,

- a second bias current line (980) for supplying a constant current,

- a switch transistor (210) having a gate terminal coupled to the scan line, a first terminal coupled to the data line and a second terminal,

- a driving transistor (202) having a gate terminal connected to the second terminal of the switching transistor,

- a first power supply voltage line and a second power supply voltage line, wherein the first one is the more positive one in case of a p-type implementation, and the second one is the more positive one in case of an n-type implementation, the implementation type being defined by the type of the driving transistor,

- a capacitor (204) having a first terminal and a second terminal, wherein the first one is coupled to the gate of the driving transistor and the second terminal is coupled to the more positive power supply voltage line of the first and second power supply voltage lines, for maintaining the data voltage supplied to the gate of the driving transistor (202) during a predetermined time,

- a current-controlled light emitting device (206) means, for emitting light the brightness of which corresponds to the current applied, which is connected between the drain terminal of the driving transistor (202) and the second power supply voltage line, adapted to generate light so as display image and

- a threshold voltage cancellation circuit (20),

characterized

- in that said threshold voltage cancellation circuit (20) is implemented with the same type of transistors as the said driving transistor (202) and has four terminals, whereof the first terminal is connected to said first power supply voltage line, the second terminal is connected to the source terminal of the said driving transistor (202), the third terminal is connected to the first bias current line (750) and the fourth terminal is connected to the second bias current line (980), said threshold voltage cancellation circuit being adapted to provide via the second terminal an output voltage value to the source of said driving transistor (202) which is such that a predetermined current is supplied to the light emitting means,

- in that said threshold voltage cancellation circuit (20) comprises:

an opposite sign threshold voltage value extractor (40) providing at its output terminal a voltage equal to the opposite sign threshold voltage value of the said driving transistor, and

a buffer (30) comprising an input terminal and an output terminal, the Input terminal of the buffer is connected to the output terminal of the opposite sign threshold voltage value extractor and the output of the buffer is connected to the source of said driving transistor via the second terminal of said threshold voltage cancellation circuit, the buffer providing at its output terminal an output voltage,

wherein the difference between the output voltage of the buffer and the opposite sign threshold voltage is a constant voltage,

wherein said buffer sources the said predetermined current of the driving transistor in the p-type implementation, while sinks the said predetermined current of the driving transistor in the n-type implementation,

- in that said opposite sign threshold voltage value extractor (40) comprises an extractor transistor (742), having its source terminal connected to the input terminal of the buffer and to said first bias current line (750) via the third terminal of the opposite sign threshold voltage value extractor and its drain and gate terminal connected together to the second power supply line, and

in that the switching transistor is either of a p-type implementation or a n-type implementation and all other transistors of the pixel circuit are of the same type, either of a p-type implementation or a n-type implementation, and
in that said extractor transistor (742) has the same electrical characteristics as the driving transistor, wherein the electrical characteristics are defined by the width and the length of the transistor.

2. A pixel circuit according to claim 1, wherein said buffer (30) comprises two transistors of the same type as the driving transistor, whereas the gate terminal of the first transistor (932) of the said buffer (30) is connected to the output terminal of the said opposite sign threshold voltage value extractor (40), the source terminal is connected to the source terminal of the said driving transistor (202) and its drain terminal is connected to the said second bias current line (980), and the gate terminal of the second transistor (934) is connected to the said second bias current line (980), the source terminal of the second transistor is connected to the first power supply line and the drain terminal of the second transistor is connected to the source terminal of the said driving transistor (202).

3. A method for driving the pixel circuit (200) according to one of the claims 1 or 2 comprising the steps of;
supplying the threshold voltage cancellation circuit (20) with the first (750) and second bias (980) current, providing at its output a voltage value, which is equal to the said extractor transistor (742) threshold voltage and the said second power supply voltage line, with,
the source terminal of the driving transistor (202) connected to the output terminal of the said threshold voltage compensation circuit (20), providing a predetermined potential to the source terminal of the driving transistor (202), whereas
the said predetermined potential is constant and equal to the opposite sign value threshold voltage of the driving transistor (202) and the said second power supply voltage line voltage, because the said extractor transistor (742) and the driving transistor (202) are implemented with the same type of transistors with the same dimensions and electrical characteristics, and
the gate terminal of the said driving transistor is applied with the said data line voltage and the source terminal is biased to the predetermined constant potential, resulting in the difference between the said voltage value of the gate terminal and the said predetermined voltage of the source terminal of the driving transistor being a constant ensuring that the current through the light emitting means is made independent from the threshold voltage of the driving transistor and its threshold voltage variations.

4. A method according to claim 3, wherein said threshold voltage variations cancellation circuit is continuously in a conductive state, providing a predetermined constant voltage continuously.

5. A method according to claim 3 and 4, wherein the driving current through the light emitting device means is independent of the first and second constant bias current variations.

6. A matrix display array comprising the pixel circuit according to claims 1 and 2.

Ansprüche

1. Eine Pixelschaltung (200) umfasst:

- eine Datenleitung (14) zum Zuführen einer Datenspannung,

- eine Abtastleitung (12) zum Zuführen eines Steuersignals,

- eine erste Bias-Stromieitung (750) zum Zuführen eines konstanten Stroms,

- eine zweite Bias-Stromleitung (980) zum Zuführen eines konstanten Stroms,

- einen Schalt-Transistor (210) mit einem Gate-Anschluss, der mit der Abtastleitung verbunden ist, einen ersten Anschluss der mit der Datenleitung und einem zweiten Anschluss verbunden ist,

- einen Treiber-Transistor (202) mit einem Gate-Anschluss der mit dem zweiten Anschluss des Schalt-Transistors verbunden ist,

- eine erste Stromversorgungsspannungsleitung und eine zweite Stromversorgungsspannungsleitung, wobei die Erste die mehr positive im Falle einer p-Typ-Implementierung ist und die Zweite die mehr positive im Falle einer n-Typ-Implementierung ist, wobei der Implementierungstyp durch die Art des Treiber-Transistors definiert ist,

- einen Kondensator (204) mit einem ersten Anschluss und einem zweiten Anschluss, wobei der erste mit dem Gate des Treiber-Transistors gekoppelt ist und der zweite Anschluss mit der positiveren Stromversorgungsspannungsleitung der ersten und zweiten Stromversorgungsspannungsleitung verbunden ist, zur Aufrechterhaltung der Datenspannung die zu dem Gate des Treiber-Transistors (202) während einer vorbestimmten Zeit zugeführt wird,

- eine stromgesteuerte lichtemittierende Vorrichtung (206), zum Emittieren von Licht, wobei die Helligkeit dem angelegten Strom entspricht, die zwischen dem Drain-Anschluss des Treiber-Transistors (202) und der zweiten Stromversorgungsspannungsleitung verbunden ist, ausgebildet zum Erzeugen von Licht für ein Display-Bild und eine

- Schwellenwertspannungskompensationsschaltung (20),

dadurch gekennzeichnet,

- dass die Schwellenwertspannungskompensationsschaltung (20) mit derselben Art von Transistoren wie dem Treibertransistor (202) ausgebildet ist und vier Anschlüsse hat, wobei der erste Anschluss mit der ersten Stromversorgungsspannungsleitung verbunden ist, der zweite Anschluss mit dem Source-Anschluss des Treiber-Transistors (202) verbunden ist, der dritte Anschluss mit der ersten Bias-Stromleitung (750) verbunden ist und der vierte Anschluss mit der zweiten Blas-Stromleitung (980) verbunden ist, die Schwellenwertspannungskompensationsschaltung so angepasst ist, um über den zweiten Anschluss einen Ausgangsspannungswert der Source des Treiber-Transistors (202) zur Verfügung zu stellen die derart ist, dass ein vorbestimmter Strom zu dem lichtemittierenden Element zugeführt wird,

- dass die Schwellenwertspannungskompensationsschaltung (20) umfasst:

ein umgekehrtes Vorzeichen-Schwellenwertspannungswert-Extraktor (40), der an seinem Ausgangsanschluss eine Spannung bereitstellt, die dem umgekehrtes Vorzeichen-Schwellenwertspannungswert des Ansteuer-Transistors entspricht,

einen Puffer (30) mit einem Eingangsanschluss und einem Ausgangsanschluss, wobei der Eingangsanschluss des Puffers mit dem Ausgangsanschluss des umgekehrtes Vorzeichen-Schwellenwertspannungswert-Extraktors verbunden ist und der Ausgang des Puffers mit der Source des Treiber-Transistors über den zweiten Anschluss der Schwellenwertspannungskompensationsschaltung verbunden ist, der Puffer an seinem Ausgangsanschluss eine Ausgangsspannung zur Verfügung stellt, wobei die Differenz zwischen der Ausgangsspannung des Puffers und

der umgekehrtes Vorzeichen-Schwellenwertspannung eine konstante Spannung ist,

wobei der Puffer den vorbestimmten Strom des Treibertransistors in der p-Implementierung frei gibt, während einem Sinken des vorbestimmten Stroms des Treiber-Transistors in der n-Typ-Implementierung,

- dass der umgekehrtes-Vorzeichen-Schwellenwertspannungswert-Extraktor (40) einen Extraktor-Transistor (742) aufweist, dessen Source-Anschluss mit dem Eingangsanschluss des Puffers und mit der ersten Bias-Stromleitung (750) über den dritten Anschluss des umgekehrtes Vorzeichen-Schwellenwertspannungswert-Extraktors und dessen Drain- und Gate-Anschluss gemeinsam mit der zweiten Stromversorgungsleitung verbunden ist,

- dass der Schalttransistor entweder eine p-Typ-Implementierung oder eine n-Typ-Implementierung ist und alle anderen Transistoren der Pixelschaltung vom gleichen Typ sind, entweder einer p-Typ-Implementierung oder einer n-Typ-Implementierung, und

- dass der Extraktor-Transistor (742) die gleichen elektrischen Eigenschaften wie der Treiber-Transistor aufweist, wobei die elektrischen Eigenschaften durch die Breite und die Länge des Transistors definiert werden.

2. Pixelschaltung nach Anspruch 1, wobei der Puffer (30) zwei Transistoren des gleichen Typs wie der Treiber-Transistor aufweist, während der Gate-Anschluss des ersten Transistors (932) des Puffers (30) mit dem Ausgangsanschluss des umgekehrtes Vorzeichen-Schwellenwertspannungswert-Extraktors (40) verbunden ist, der Source-Anschluss mit dem Source-Anschluss des Treiber-Transistors (202) verbunden ist, deren Drain-Anschluss mit der zweiten Bias-Stromleitung (980) verbunden ist, der Gate-Anschluss des zweiten Transistors (934) mit der zweiten Bias-Stromleitung (980) verbunden ist, der Source-Anschluss des zweiten Transistors mit der ersten Stromversorgungsleitung verbunden ist und der Drain-Anschluss des zweiten Transistors mit dem Source-Anschluss des Treiber-Transistors (202) verbunden ist.

3. Ein Verfahren zum Antreiben der Pixelschaltung (200) nach einem der Ansprüche 1 oder 2, umfassend die Schritte:

Zuführen des ersten (750) und zweiten Bias-Stroms (980) zu der Schwellenwertspannungskompensationsschaltung (20), Bereitstellen eines Spannungswerts an ihrem Ausgang, der der Extraktor-Transistor- (742) Schwellenwertspannung und der zweiten Stromversorgungsspannungsleitung entspricht, wobei,

der Source-Anschluss des Treiber-Transistors (202) mit dem Ausgangsanschluss der Schwellenwertspannungskompensationsschaltung (20) verbunden ist, Bereitstellen eines vorbestimmten Potentials an dem Source-Anschluss des Treiber-Transistors (202), während

das vorbestimmte Potential konstant ist und dem umgekehrtes Vorzeichen-Schwellenwertspannungswert des Treiber-Transistors (202) und der Spannung der zweiten Stromversorgungsspannungsleitung entspricht, da der Extraktor-Transistor (742) und der Ansteuertransistor (202) mit derselben Art von Transistoren mit den gleichen Abmessungen und elektrischen Eigenschaften implementiert sind, und

der Gate-Anschluss des Treiber-Transistors mit der Spannung der Datenleitung versorgt wird und der Source-Anschluss voreingestellt mit dem vorbestimmten konstanten Potential ist, daraus resultierend in der Differenz zwischen dem Spannungswert des Gate-Anschlusses und der vorbestimmten Spannung des Source-Anschlusses des Treiber-Transistors, die konstant ist um sicherzustellen, dass der Strom durch die lichtemittierenden Mittel unabhängig von der Schwellenwertspannung des Treiber-Transistors und dessen Änderungen der Schwellenwertspannung ist.

4. Verfahren nach Anspruch 3, wobei die Schwellenwertspannungskompensationsänderungsschaltung kontinuierlich in einem leitfähigen Zustand ist und kontinuierlich eine konstante Spannung zur Verfügung stellt.

5. Ein Verfahren nach einem der Ansprüche 3 und 4, wobei der Antriebsstrom durch die lichtemittierende Vorrichtung unabhängig von Änderungen des ersten und
zweiten Bias-Stroms ist.

6. Eine Matrixanzeigeanordnung mit der Pixelschaltung nach einem der Ansprüche 1 und 2.

Revendications

1. Circuit de pixels (200) comprenant:

- une ligne de données (14) pour fournir une tension de données,

- une ligne de balayage (12) pour fournir un signal de commande,

- une première ligne de courant de polarisation (750) pour fournir un courant constant,

- une seconde ligne de courant de polarisation (980) pour fournir un courant constant,

- un transistor de commutation (210) ayant une borne de porte couplée à la ligne de balayage, une première borne couplée à la ligne de données et une seconde borne,

- un transistor de commande (202) ayant une borne de porte connectée à la seconde borne du transistor de commutation,

- une première ligne de tension d'alimentation et une seconde ligne de tension d'alimentation, la première étant la plus positive dans le cas d'une configuration de type p, et la seconde la plus positive en cas de configuration de type n, le type de configuration étant défini par le type du transistor de commande,

- un condensateur (204) ayant une première borne et une seconde borne, la première étant couplée à la porte du transistor de commande et la seconde borne étant couplée à la ligne de tension d'alimentation plus positive des première et seconde lignes de tension d'alimentation, pour maintenir la tension de données fournie à la porte du transistor de commande (202) pendant une durée prédéterminée,

- un dispositif d'émission de lumière (206) commandé en courant, pour émettre de la lumière dont la luminosité correspond au courant appliqué, qui est connecté entre la borne de drain du transistor de commande (202) et la seconde ligne de tension d'alimentation, adapté pour générer de la lumière ainsi que pour afficher de l'image et

- un circuit d'annulation de tension de seuil (20),

caractérisé

- en ce que ledit circuit d'annulation de tension de seuil (20) est configuré avec le même type de transistors que ledit transistor de commande (202) et comporte quatre bornes, dont la première borne est reliée à ladite première ligne de tension d'alimentation en puissance, la deuxième borne est reliée à la borne de source dudit transistor de commande (202), la troisième borne est connectée à la première ligne de courant de polarisation (750) et la quatrième borne est connectée à la seconde ligne de courant de polarisation (980), ledit circuit d'annulation de tension de seuil étant adapté pour fournir par l'intermédiaire de la deuxième borne une valeur de tension de sortie à la source dudit transistor (202) qui est telle qu'un courant prédéterminé est fourni au moyen émetteur de lumière,

- en ce que ledit circuit d'annulation de tension de seuil (20) comprend:

un extracteur de valeur de la tension de seuil de signe opposé (40) fournissant à sa borne de sortie une tension égale à la valeur de tension de seuil de signe opposé dudit transistor de commande, et

une mémoire tampon (30) comprenant une borne d'entrée et une borne de sortie, la borne d'entrée de la mémoire tampon étant connectée à la borne de sortie de l'extracteur de valeur de tension de seuil de signe opposé et la sortie de la mémoire tampon étant connectée à la source dudit transistor de commande via la deuxième borne dudit circuit d'annulation de tension de seuil, la mémoire tampon fournissant à sa borne de sortie une tension de sortie, la différence entre la tension de sortie de la mémoire tampon et la tension de seuil de signe opposé étant une tension constante,

dans lequel ladite mémoire tampon ressource ledit courant prédéterminé du transistor de commande dans la configuration de type p, tandis qu'elle fait baisser ledit courant prédéterminé du transistor de commande dans la configuration de type n,

- en ce que ledit extracteur de valeur de tension de seuil de signe opposé (40) comprend un transistor extracteur (742), ayant sa borne de source connectée à la borne d'entrée de la mémoire tampon et à ladite première ligne de courant de polarisation (750) par l'intermédiaire de la troisième borne de l'extracteur de valeur de tension de seuil de signe opposé et sa borne de drain et de porte connectées ensemble à la seconde ligne d'alimentation, et

en ce que le transistor de commutation est soit une configuration de type p ou une configuration de type n, et tous les autres transistors du circuit de pixels étant du même type, soit d'une configuration de type p ou une configuration de type n, et
en ce que ledit transistor d'extraction (742) présente les mêmes caractéristiques électriques que le transistor de commande, les caractéristiques électriques étant définies par la largeur et la longueur du transistor.

2. Circuit de pixels selon la revendication 1, dans lequel ladite mémoire tampon (30) comprend deux transistors du même type que le transistor de commande, tandis que la borne de porte du premier transistor (932) de ladite mémoire tampon (30) est reliée à la borne de sortie dudit extracteur de valeur de tension de seuil de signe opposé (40), la borne de source est connectée à la borne de source dudit transistor de commande (202) et sa borne de drain est connectée à ladite seconde ligne de courant de polarisation (980), et la borne de porte du second transistor (934) est connectée à ladite seconde ligne de courant de polarisation (980), la borne de source du second transistor est connectée à la première ligne d'alimentation en énergie et la borne de drain du second transistor est reliée à la borne de source dudit transistor de commande (202).

3. Procédé de commande du circuit de pixels (200) selon l'une des revendications 1 ou 2, comprenant les étapes consistant à:

alimenter le circuit de compensation de tension de seuil (20) avec les premier (750) et

second courants de polarisation (980), fournissant à sa sortie une valeur de tension, qui est égale à ladite tension de seuil dudit transistor d'extraction (742) et ladite seconde ligne de tension d'alimentation, avec

la borne de source du transistor de commande (202) connectée à la borne de sortie dudit circuit de compensation de tension de seuil (20), fournissant un potentiel prédéterminé à la borne de source du transistor de commande (202), tandis que

ledit potentiel prédéterminé est constant et égal à la valeur de la tension de seuil de signe opposé du transistor de commande (202) et ladite seconde ligne de tension d'alimentation, car le transistor extracteur (742) et le transistor de commande (202) sont configurés avec le même type de transistors avec les mêmes dimensions et

caractéristiques électriques, et

ladite tension de ligne de données est appliquée à la borne de porte dudit transistor de commande et la borne de source est polarisée au potentiel constant prédéterminé,

résultant en la différence entre ladite valeur de tension de la borne de porte et ladite tension prédéterminée de la borne de source du transistor de commande, qui est une constante assurant que le courant à travers le moyen émetteur de lumière est rendu indépendant de la tension de seuil du transistor de commande et de ses variations de tension de seuil.

4. Procédé selon la revendication 3, dans lequel ledit circuit d'annulation des variations de tension de seuil est dans un état conducteur permanent, fournissant une tension constante prédéterminée en continu.

5. Procédé selon la revendication 3 et 4, dans lequel le courant de commande à travers le dispositif d'émission de lumière est indépendant des variations entre les premier et second courants de polarisation constants.

6. Réseau d'affichage à matrice comprenant le circuit de pixels selon les revendications 1 et 2.

Drawing