LAYOUT METHOD FOR SOFT-ERROR HARD ELECTRONICS, AND RADIATION HARDENED LOGIC CELL

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EP 2 245 740 B8

(12)	CORRECTED EUROPEAN PATENT SPECIFICATION
	Note: Bibliography reflects the latest situation

(15)	Correction information:
	Corrected version no 1 (W1 B1)

(48)	Corrigendum issued on:
	01.10.2014 Bulletin 2014/40

(45)	Mention of the grant of the patent:
	12.03.2014 Bulletin 2014/11

(21)	Application number: 09702623.1

(22)	Date of filing: 15.01.2009

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International Patent Classification (IPC):

H03K 19/173^(2006.01)
H03K 19/003^(2006.01)

H03K 19/01^(2006.01)
H03K 19/20^(2006.01)

(86)	International application number:
	PCT/US2009/031160

(87)	International publication number:
	WO 2009/091928 (23.07.2009 Gazette 2009/30)

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LAYOUT METHOD FOR SOFT-ERROR HARD ELECTRONICS, AND RADIATION HARDENED LOGIC CELL

ANORDNUNGSVERFAHREN FÜR SOFT-ERROR-IIMMUNE ELEKTRONIK UND STRAHLUNGSGEHÄRTETE LOGIKZELLE

PROCÉDÉ D'AGENCEMENT DE DISPOSITIFS ÉLECTRONIQUES RÉSISTANT À UNE ERREUR DOUCE, ET CELLULE LOGIQUE DURCIE VIS-À-VIS D'UN RAYONNEMENT

(84)	Designated Contracting States:
	AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HR HU IE IS IT LI LT LU LV MC MK MT NL NO PL PT RO SE SI SK TR

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Priority:

17.01.2008 US 11599
22.01.2008 US 11989
07.03.2008 US 68483
05.04.2008 US 123003

(43)	Date of publication of application:
	03.11.2010 Bulletin 2010/44

(60)	Divisional application:
	13176436.7 / 2685633

(73)	Proprietor: Lilja, Klas Olof
	Pleasanton, CA 94588 (US)

(72)	Inventor:
	Lilja, Klas Olof Pleasanton, CA 94588 (US)

(74)	Representative: Nguyen Van Yen, Christian et al
	Marks & Clerk France Conseils en Propriété Industrielle Immeuble Visium 22, Avenue Aristide Briand 94117 Arcueil Cedex 94117 Arcueil Cedex (FR)

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References cited: :

US-A- 5 898 711
US-A1- 2005 127 971
US-A1- 2007 097 728
US-B1- 6 549 443

US-A- 6 127 864
US-A1- 2007 096 754
US-A1- 2007 103 194

CALIN T ET AL: "Upset Hardened Memory Design for Submicron CMOS Technology", IEEE TRANSACTIONS ON NUCLEAR SCIENCE, IEEE SERVICE CENTER, NEW YORK, NY, US, vol. 43, no. 6, 1 December 1996 (1996-12-01), pages 2874-2878, XP011040622, ISSN: 0018-9499, DOI: 10.1109/23.556880
LI HAIXIA ET AL: "Design of a Low Power Radiation Hardened 256K SRAM", SOLID-STATE AND INTEGRATED CIRCUIT TECHNOLOGY, 2006. ICSICT '06. 8TH INTERNATIONAL CONFERENCE ON, IEEE, PI, 23 October 2006 (2006-10-23), pages 1646-1648, XP031332120, ISBN: 978-1-4244-0160-4

Note: Within nine months from the publication of the mention of the grant of the European patent, any person may give notice to the European Patent Office of opposition to the European patent granted. Notice of opposition shall be filed in a written reasoned statement. It shall not be deemed to have been filed until the opposition fee has been paid. (Art. 99(1) European Patent Convention).