A NAND BASED NMOS NOR FLASH MEMORY CELL/ARRAY AND A METHOD OF FORMING SAME - Patent 2308051

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EP 2 308 051 A1

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(43)	Date of publication:
	13.04.2011 Bulletin 2011/15

(21)	Application number: 09743052.4

(22)	Date of filing: 07.05.2009

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International Patent Classification (IPC):

G11C 16/04^(2006.01)

(86)	International application number:
	PCT/US2009/002817

(87)	International publication number:
	WO 2009/137065 (12.11.2009 Gazette 2009/46)

(84)	Designated Contracting States:
	AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HR HU IE IS IT LI LT LU LV MC MK MT NL NO PL PT RO SE SI SK TR
	Designated Extension States:
	AL BA RS

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Priority:

07.05.2008 US 126854 P

(71)	Applicant: Aplus Flash Technology, Inc.
	San Jose, CA 95112 (US)

(72)	Inventors:
	LEE, Peter, Wung Saratoga CA 95070 (US) HSU, Fu-chang San Jose CA 95129 (US) TSAO, Hsing-ya San Jose CA 95117 (US)

(74)	Representative: Schuffenecker, Thierry
	120 Chemin de la Maure 06800 Cagnes sur Mer 06800 Cagnes sur Mer (FR)

(54)	A NAND BASED NMOS NOR FLASH MEMORY CELL/ARRAY AND A METHOD OF FORMING SAME