(19)
(11) EP 2 348 626 A3

(12) EUROPEAN PATENT APPLICATION

(88) Date of publication A3:
19.04.2017 Bulletin 2017/16

(43) Date of publication A2:
27.07.2011 Bulletin 2011/30

(21) Application number: 11003662.1

(22) Date of filing: 28.07.2006
(51) International Patent Classification (IPC): 
H02M 3/337(2006.01)
H02M 3/335(2006.01)
H02M 1/34(2007.01)
(84) Designated Contracting States:
AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HU IE IS IT LI LT LU LV MC NL PL PT RO SE SI SK TR
Designated Extension States:
AL BA HR MK RS

(30) Priority: 29.07.2005 JP 2005222118
31.10.2005 JP 2005317419
31.01.2006 JP 2006022826
24.04.2006 JP 2006119154

(62) Application number of the earlier application in accordance with Art. 76 EPC:
06015817.7 / 1748539

(71) Applicant: TDK Corporation
Tokyo 108-0023 (JP)

(72) Inventors:
  • Nakahori, Wataru
    TOKYO 103-8272 (JP)
  • Murai, Yasuhiro
    TOKYO 103-8272 (JP)

(74) Representative: Müller Hoffmann & Partner 
Patentanwälte mbB St.-Martin-Strasse 58
81541 München
81541 München (DE)

   


(54) Switching power supply with surge voltage suppression


(57) A switching power supply unit receiving a DC input voltage (10) from one of first and second input/output terminal pairs (T1,T2) and outputting a DC output voltage (V out) from the other input/output terminal pair, comprising:
a transformer (3) including a first winding disposed on the first input/output terminal pair side and a second winding disposed on the second input/output terminal pair side; a first circuit (1) disposed between the first input/output terminal pair and the transformer, and including a plurality of first switching elements and first rectifier elements each of which is connected in parallel with each of the plurality of first switching elements;
a second circuit (4) disposed between the second input/output terminal pair and the transformer, and including a plurality of second switching elements and second rectifier elements each of which is connected in parallel with each of the plurality of second switching elements;
a surge voltage suppressing circuit (2) connected in parallel with the first circuit, and including two device sets each having a third rectifier element connected in a manner of reversed polarity and a first capacitative element, the third rectifier element and the first capacitative elements being connected in parallel with each other;
a first inductor (Lr) disposed between the first input/output terminal pair and the transformer;
a second inductor (S1) disposed between the second input/output terminal pair and the transformer; and
a driving circuit (6) for driving each of the first and second circuits.







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