SYNCHRONIZATION DEVICE, RECEPTION DEVICE, SYNCHRONIZATION METHOD, AND RECEPTION METHOD

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EP 2 372 943 A8

(12)	CORRECTED EUROPEAN PATENT APPLICATION
	published in accordance with Art. 153(4) EPC

(15)	Correction information:
	Corrected version no 1 (W1 A1)

(48)	Corrigendum issued on:
	29.02.2012 Bulletin 2012/09

(43)	Date of publication:
	05.10.2011 Bulletin 2011/40

(21)	Application number: 09834259.5

(22)	Date of filing: 02.10.2009

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International Patent Classification (IPC):

H04L 7/00^(2006.01)

H04W 56/00^(2009.01)

(86)	International application number:
	PCT/JP2009/005107

(87)	International publication number:
	WO 2010/073441 (01.07.2010 Gazette 2010/26)

(84)	Designated Contracting States:
	AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HR HU IE IS IT LI LT LU LV MC MK MT NL NO PL PT RO SE SI SK SM TR

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Priority:

26.12.2008 JP 2008332752

(71)	Applicant: Sharp Kabushiki Kaisha
	Osaka-shi, Osaka 545-8522 (JP)

(72)	Inventors:
	KOBAYASHI, Hirokazu Osaka-shi, Osaka 545-8522 (JP) HIKOSO, Keiji Osaka-shi, Osaka 545-8522 (JP) SAWADA, Shinichi Osaka-shi, Osaka 545-8522 (JP) FUKUMOTO, Shusaku Osaka-shi, Osaka 545-8522 (JP) ISHIKURA, Katsutoshi Osaka-shi, Osaka 545-8522 (JP)

(74)	Representative: Müller - Hoffmann & Partner
	Patentanwälte Innere Wiener Straße 17 81667 München 81667 München (DE)

(54)	SYNCHRONIZATION DEVICE, RECEPTION DEVICE, SYNCHRONIZATION METHOD, AND RECEPTION METHOD

(57) A synchronization device including a plurality of counter sections each outputting a numerical signal indicating a counted number by detecting a clock, the synchronization device includes: a first counter section which outputs the numerical signal; a counter synchronization signal output section which outputs a counter synchronization signal indicating the same number as the number indicated by the numerical signal output by the first counter section; and a second counter section which outputs a numerical signal indicating the same number at the same timing as that of the first counter section based on the number indicated by the counter synchronization signal output by the counter synchronization signal output section.