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<ep-patent-document id="EP10775878B1" file="EP10775878NWB1.xml" lang="en" country="EP" doc-number="2499648" kind="B1" date-publ="20141029" status="n" dtd-version="ep-patent-document-v1-4">
<SDOBI lang="en"><B000><eptags><B001EP>ATBECHDEDKESFRGBGRITLILUNLSEMCPTIESILTLVFIROMKCYALTRBGCZEEHUPLSK..HRIS..MTNORS..SM..................</B001EP><B003EP>*</B003EP><B005EP>J</B005EP><B007EP>DIM360 Ver 2.41 (21 Oct 2013) -  2100000/0</B007EP></eptags></B000><B100><B110>2499648</B110><B120><B121>EUROPEAN PATENT SPECIFICATION</B121></B120><B130>B1</B130><B140><date>20141029</date></B140><B190>EP</B190></B100><B200><B210>10775878.1</B210><B220><date>20101110</date></B220><B240><B241><date>20120518</date></B241><B242><date>20131021</date></B242></B240><B250>en</B250><B251EP>en</B251EP><B260>en</B260></B200><B300><B310>0919724</B310><B320><date>20091111</date></B320><B330><ctry>GB</ctry></B330><B310>09275108</B310><B320><date>20091111</date></B320><B330><ctry>EP</ctry></B330><B310>201016803</B310><B320><date>20101006</date></B320><B330><ctry>GB</ctry></B330></B300><B400><B405><date>20141029</date><bnum>201444</bnum></B405><B430><date>20120919</date><bnum>201238</bnum></B430><B450><date>20141029</date><bnum>201444</bnum></B450><B452EP><date>20140811</date></B452EP></B400><B500><B510EP><classification-ipcr sequence="1"><text>H01H  59/00        20060101AFI20110530BHEP        </text></classification-ipcr></B510EP><B540><B541>de</B541><B542>MEMS-SCHALTER UND DEREN VERPACKUNG</B542><B541>en</B541><B542>MEMS PACKAGING</B542><B541>fr</B541><B542>COMMUTATEURS MEMS ET LEUR CONDITIONNEMENT</B542></B540><B560><B561><text>US-A1- 2007 236 307</text></B561><B561><text>US-A1- 2008 007 814</text></B561><B561><text>US-B1- 6 494 095</text></B561></B560></B500><B700><B720><B721><snm>PRITCHARD, Alan, Peter</snm><adr><str>BAE Systems ATC</str><city>Filton
Bristol BS9 7AR</city><ctry>GB</ctry></adr></B721><B721><snm>KEDDIE, David, Peter</snm><adr><str>BAE Systems ATC</str><city>Filton
Bristol BS9 7AR</city><ctry>GB</ctry></adr></B721><B721><snm>NIMAN, Murray, Jerel</snm><adr><str>BAE Systems ATC
Great Baddow</str><city>Chelmsford
Essex CM2 8HN</city><ctry>GB</ctry></adr></B721></B720><B730><B731><snm>BAE Systems PLC</snm><iid>100082704</iid><irf>XA3394 EPw</irf><adr><str>6 Carlton Gardens</str><city>London SW1Y 5AD</city><ctry>GB</ctry></adr></B731></B730><B740><B741><snm>Edis, Ronald Malcolm</snm><iid>101287288</iid><adr><str>BAE SYSTEMS plc 
Group IP Department</str><city>P.O. Box 87
Farnborough Aerospace Centre
Farnborough
Hampshire, GU14 6YU</city><ctry>GB</ctry></adr></B741></B740></B700><B800><B840><ctry>AL</ctry><ctry>AT</ctry><ctry>BE</ctry><ctry>BG</ctry><ctry>CH</ctry><ctry>CY</ctry><ctry>CZ</ctry><ctry>DE</ctry><ctry>DK</ctry><ctry>EE</ctry><ctry>ES</ctry><ctry>FI</ctry><ctry>FR</ctry><ctry>GB</ctry><ctry>GR</ctry><ctry>HR</ctry><ctry>HU</ctry><ctry>IE</ctry><ctry>IS</ctry><ctry>IT</ctry><ctry>LI</ctry><ctry>LT</ctry><ctry>LU</ctry><ctry>LV</ctry><ctry>MC</ctry><ctry>MK</ctry><ctry>MT</ctry><ctry>NL</ctry><ctry>NO</ctry><ctry>PL</ctry><ctry>PT</ctry><ctry>RO</ctry><ctry>RS</ctry><ctry>SE</ctry><ctry>SI</ctry><ctry>SK</ctry><ctry>SM</ctry><ctry>TR</ctry></B840><B860><B861><dnum><anum>GB2010051874</anum></dnum><date>20101110</date></B861><B862>en</B862></B860><B870><B871><dnum><pnum>WO2011058354</pnum></dnum><date>20110519</date><bnum>201120</bnum></B871></B870><B880><date>20120919</date><bnum>201238</bnum></B880></B800></SDOBI>
<description id="desc" lang="en"><!-- EPO <DP n="1"> -->
<p id="p0001" num="0001">The present invention relates to packaged radio frequency (RF) MEMS devices, in particular RF MEMS switches which may be suitable for use in compact phase-shifting switching arrays for example for phased-array antennas, and/or in particular complex devices that comprise highly integrated RF MEMS devices with multiple switches.</p>
<p id="p0002" num="0002">RF MEMS devices tend to be delicate and hence difficult not only to manufacture but also to incorporate into circuits. Such difficulty is due in part to the scale of the RF MEMS device: components of an RF MEMS device have dimensions in the order of microns and so are prone to mechanical failure under minimal loadings.</p>
<p id="p0003" num="0003">Furthermore, RF MEMS devices should be packaged in a sealed environment to keep contaminants away from the device. Contaminants, such as dust particles may impair the function of the RF MEMS device. Document us<patcit id="pcit0001" dnum="US20080007814A"><text>2008/0007814</text></patcit> discloses a device according to the preamble of claim 1.</p>
<p id="p0004" num="0004">According to a first embodiment of the invention there is provided a packaged RF MEMS device comprising an RF MEMS device, a substrate upon which the RF MEMS device is mounted, a cover mounted on the substrate, the cover being at least partly optically transparent and comprising a cavity for containing the RF MEMS device, the cover and substrate thereby defining a cover-to-substrate interface and a cover-to-substrate interface boundary, and at least one electrically conductive path extending between the RF MEMS device and a peripheral surface of the packaged MEMS device, the electrically conductive path comprising a track extending from a first track end at the RF MEMS device to a connecting track portion at the cover-to-substrate interface, the connecting track portion being arranged to terminate within the boundary of the cover-to-substrate interface, and a via extending between the track portion at the cover-to-substrate interface and the peripheral surface of the packaged MEMS device, said at least one electrically conductive path not extending beyond the cover-to-substrate interface boundary of the packaged RF MEMS device.<!-- EPO <DP n="2"> --></p>
<p id="p0005" num="0005">Further, the cover may comprise a separate wall structure and lid structure, the wall structure spacing the lid structure from the substrate. In some embodiments the wall structure is of glass or an oxide of silicon.</p>
<p id="p0006" num="0006">The lid structure may be frit-bonded to the wall structure.</p>
<p id="p0007" num="0007">The via may extend through the circuit substrate beneath the wall structure to form an electrical connection to the RF MEMS device or alternatively may extend through the wall structure to form an electrical connection to a conductor on the substrate.</p>
<p id="p0008" num="0008">According to a second aspect of the invention there is provided a method of packaging an RF MEMS device comprising mounting the device on a circuit substrate, preparing a perimeter area around the device to receive a wall structure of an at least partly optically transparent cover, laying an electrically conductive track which terminates within a boundary of a cover-to-substrate interface, securing a perimeter wall of the cover to the substrate in the cover-to-substrate interface perimeter area, thereby housing the RF MEMS device in a sealed environment and thereafter, while using the cover to provide support to prevent deformation of the substrate, performing at least one of thinning the substrate and drilling one of the substrate and the cover to install a via therein.</p>
<p id="p0009" num="0009">Further, the method may involve securing a perimeter wall structure to the perimeter area, and then securing a transparent lid to the wall structure. Optionally the method may involve providing a via through the circuit substrate beneath the wall structure or providing a via through the wall structure to form an electrical connection to a conductor on the substrate.</p>
<p id="p0010" num="0010">A single optically transparent cover may be attached to the substrate, thereby housing each of the plurality of RF MEMS devices in a sealed environment unique to that RF MEMS device.</p>
<p id="p0011" num="0011">Advantageously, such a packaged RF MEMS device may be more easily manufactured and maintained. Hence the undesirable effects of contaminants can be prevented.<!-- EPO <DP n="3"> --></p>
<p id="p0012" num="0012">For example, by providing that the electrical track terminates within the boundary of the cover-to-substrate interface, any drilling operation necessary to install the via can be undertaken with a good chance of success because the cover, which either backs the substrate as the substrate is drilled or is the component that is drilled, provides support to prevent deformation of the substrate that may otherwise result from the stresses of the drilling operation. Further, where the MEMS device is held in a sealed environment, should the drilling overshoot, the risk of disturbing the sealed environment is decreased.</p>
<p id="p0013" num="0013">As a further example, it can be appreciated that the provision of a transparent cover enables the functioning of the device to be inspected with suitable optical apparatus. Permitting such inspection can contribute to improvements in quality control or yield where complex or highly integrated devices are to be manufactured in large batches.</p>
<p id="p0014" num="0014">The invention now will be described merely by way of example with reference to the accompanying drawings, wherein:
<ul id="ul0001" list-style="none">
<li><figref idref="f0001">Figure 1</figref> shows, from an isometric view, a first MEMS switch such as may be packaged according to the present invention;</li>
<li><figref idref="f0001">Figure 2</figref> shows, from a sideways-on view, a second MEMS switch such as may be packaged according to the present invention;</li>
<li><figref idref="f0002">Figure 3</figref> shows, from a side-on sectional view, an instance of a first switch package according to the invention;</li>
<li><figref idref="f0002">Figure 4</figref> shows, from a side-on sectional view, an alternative cover arrangement for a switch package according to the invention;</li>
<li><figref idref="f0003">Figures 5A, 5B, 5C, 5C, 5D</figref> and <figref idref="f0004">5E</figref> show, from a side-on sectional view, progressive steps in the manufacture of the switch packaging of <figref idref="f0002">figure 3</figref>;</li>
<li><figref idref="f0005">Figures 6A, 6B</figref>, <figref idref="f0006">6C and 6D</figref> show, from a sideways-on sectional view, progressive steps in the manufacture of a further embodiment of an RF MEMS switch package;</li>
<li><figref idref="f0007">Figure 7</figref> shows a top-down view of a plurality of devices packaged on a section of a substrate wafer; and<!-- EPO <DP n="4"> --></li>
<li><figref idref="f0008">Figure 8</figref> shows a top-down view of a wafer slice populated with various packaged RF MEMS devices.</li>
<li><figref idref="f0001">Figure 2</figref> shows an embodiment of an indirectly-actuated normally-open MEMS switch. By indirect actuation we mean an arrangement in which the actuating force is applied other than on a line of action which passes through the contacting switch surfaces. In contrast, direct actuation, such as is shown in <figref idref="f0001">figure 1</figref>, is where the line of action of the actuating force passes through these surfaces.</li>
</ul></p>
<p id="p0015" num="0015">The switch of <figref idref="f0001">figure 2</figref> comprises a substrate 10 on which is mounted a switch contact 12. A flexible cantilever beam 14 is mounted on the substrate via structure 16. The free end 18 of the cantilever has an undersurface 19 constituting the other switch contact.</p>
<p id="p0016" num="0016">The switch further comprises a separate and relatively stiff cantilever beam 34 mounted on the substrate 10.</p>
<p id="p0017" num="0017">The beam 14 is moveable towards the substrate 10 by a pair of actuating electrodes 20. When a voltage is applied across them, sufficient electrostatic force is generated to deflect the beam and close the switch. The switch here is of the normally-open type, the natural resilience of the beam 14 holding the contact portion 18 normally spaced from the contact 12.</p>
<p id="p0018" num="0018">In particular, the actuating electrodes 20 are arranged to deflect a separate relatively stiff cantilever beam 34 mounted on the substrate 10. The beam 34 is positioned so that upon deflection its end, which carries a suitable force-applying part 36, applies a force along line 26 directly to the end portion 18 of the flexible cantilever 14. This directly-applied force reliably splays the portion 18 into conforming contact with the switch contact 12. The RF signals can thus be kept well-separated from the switch-actuating circuitry.</p>
<p id="p0019" num="0019">The beam 14 is manufactured (e.g. by a method such as described hereafter) so that its end portion 18 presents a concave shape to the switch contact 12. Preferably it is concave both viewed from the side as illustrated, and when viewed end-on, i.e. in cross-section relative to the longitudinal axis of the beam 14. When the end portion 18 is so shaped, the closing force applied<!-- EPO <DP n="5"> --> by the electrodes 20 causes it to flatten on to (i.e. conform to) the surface of the switch contact 12, thereby ensuring a large enough area of contact for effective operation. The end portion 18 is tilted downwards relative to its point of attachment 24 to the proximal portion 22 of the beam, so that the tip of the beam touches the contact 12 first, and the remainder of the undersurface 19 of portion 18 is progressively brought into contact with it as the beam is depressed. This form of beam is suitable for actuation by electrodes positioned so far described, and is also suitable for use in the alternative approach illustrated in <figref idref="f0001">Figure 1</figref>.</p>
<p id="p0020" num="0020">The embodiment of <figref idref="f0001">figure 1</figref> differs from that of <figref idref="f0001">figure 2</figref> in that there are two flexible contact-making portions 18, 18' carried transversely of the longitudinal extent of the beam on a concave intermediate part 28 via folds 24, 24'. When the switch is closed, the portions 18, 18' connect two separate switch contacts 12, 12'; thereby the RF signal flows only in the beam portions 18, 28, and does not have to be taken through the proximal portion 22 of the beam where it may be subject to interference from the beam-actuation circuitry.</p>
<p id="p0021" num="0021">The end portions 18, 18' are concave both viewed from the side as at 30, and from the end as at 32. This assists in causing them to deform reliably into conformance with the surface of switch contacts 12, 12', provided that care is taken to ensure that the stiffening effect of the compound curvature 30, 32 does not reduce the compliance of the portion 18, 18' below that necessary for conformance of their undersurfaces 19, 19' to the surfaces of switch contacts 12, 12'. Although shown as concave, the shape of the intermediate portion 28 is not critical, provided that it is adequately stiff so that deformation takes place primarily in the portions 18, 18', and the portion 28 remains spaced from the switch contacts 12, 12' at least until the switching surfaces 19, 19' have been conformed thereto.</p>
<p id="p0022" num="0022">The switches so far described, and as shown in <figref idref="f0001">figure 1 and 2</figref> are packaged on the substrate 10 as shown in <figref idref="f0002">figure 3</figref>. In particular, it is the switch of <figref idref="f0001">figure 1</figref> that is shown packaged in <figref idref="f0002">figure 3</figref> and for clarity, just the contact beam 14 and the switch contact electrodes 12, 12' are shown in the figure as representative of a typical switch as a whole.<!-- EPO <DP n="6"> --></p>
<p id="p0023" num="0023">The switch is encased in a glass dome-shaped lid or cover 80, at least the internal 82 and external 84 top surfaces of which are polished, so that the lid is optically transparent, and the condition of the switch and if necessary its operation can be inspected. The side walls of the lid are bonded and sealed by known techniques in a reduced pressure or inert gas environment to the silicon substrate 10 on which the switch is constructed. Such bonding defines a cover-to-substrate interface or interface region 99 which in turn defines an outer boundary 97 to that interface region 99. The volume within the lid thus is in a controlled atmosphere and care must be taken to ensure that the making of connections to the switch from outside do not break the hermetic seal between the lid and the substrate. Normally such connections are made to aluminium tracks as at 88 which extend through the lid/substrate bond, but here the invention offers an alternative solution. A portion 90 of the wall of the lid 80 is made thicker so that a via 92 can be formed through the substrate within the width of the wall, and extending into the cover-to-substrate interface region 99, without compromising the seal. A connection can then be made, within the outer boundary 97, directly to a connection track 94 of the switch from a backplane track 96 of the substrate 10. In addition to preserving the integrity of the seal, this approach permits an all-surface-mounted configuration for the switch, and also avoids the difficulty of having to de-oxidise an exposed metal track before making a wire-bonded or soldered connection to it at 88. Further, by incorporating the connection within the perimeter of the package walls, not only is the footprint of the device reduced, allowing for greater packing density both during manufacture and in the finished product, but the package wall provides additional structural strength during formation of the via and thereafter, improving long term reliability of the assembly.</p>
<p id="p0024" num="0024"><figref idref="f0002">Figure 4</figref> shows an alternative form of the cover. Here the wall 98 is formed as a separate component, either of glass or of silicon. The wall 98 is first bonded to the substrate 10, and then the transparent glass lid 80 is bonded onto it, e.g. by frit bonding. <figref idref="f0002">Figure 4</figref> also illustrates that a via 100 may be provided through the wall 98 to provide access to a track on the substrate to<!-- EPO <DP n="7"> --> permit a connection to be made thereto if a backplane connection is not available.</p>
<p id="p0025" num="0025"><figref idref="f0003 f0004">Figures 5A-E</figref> illustrate the process of packaging MEMS switches in bulk on a wafer. <figref idref="f0003">Figures 5A to 5D</figref> show for sake of clarity a single instance of manufacture within the bulk process. In <figref idref="f0003">figure 5A</figref>, the top surface of the substrate 10 first is cut back around the switches on the wafer (only one shown) to leave a peripheral pad 102 around each switch to form a mounting for the lid 80. An array of lids 80, formed by a single continuous structure, are then bonded to their respective pads 102 (<figref idref="f0003">Figure 5B</figref>). A wax layer or tape 104 is applied to the polished top surface of the lid to protect it during subsequent handling (<figref idref="f0003">fig 5C</figref>), and the underside of the wafer substrate 10 is ground at 105 in preparation for the deposition of gold backplane tracks 106 (<figref idref="f0003">fig 5D</figref>). The packaged switches are then sawn-through at 108 to separate them into individual units (<figref idref="f0004">figure 5E</figref>).</p>
<p id="p0026" num="0026">An alternative process for manufacturing packaged MEMS switches is shown in <figref idref="f0005 f0006">figures 6A to 6D</figref>. This alternative process produces a further embodiment of packaged RF MEMS device. In this further embodiment of the packaged RF MEMS device, the tracks 12 and 12' are mounted on the surface of the substrate 10 and extend from a region on the substrate 10 that is encapsulated between the walls 98 to a region on the substrate 10 that is between the base of the wall 98 and the substrate 10.</p>
<p id="p0027" num="0027">In the initial step of the process whereby the alternative packaged RF MEMS devices are formed, the RF MEMS devices (comprising for example contacts 12, 12' and beam 14) are formed on the surface of the substrate 10.</p>
<p id="p0028" num="0028">Once the MEMS devices are formed on the substrate 10, walls 98 that may be formed from glass or silicon are frit bonded to the contacts 12, 12' by means of frit bonds 802.</p>
<p id="p0029" num="0029">The walls 98 are formed around the perimeter of the device as illustrated in <figref idref="f0007">figures 7</figref> and <figref idref="f0008">8</figref> (where the thick black lines shows the walls 98) so as to contribute to the seal and thereby prevent the ingress of contaminants. With the walls 98 surrounding the perimeter of the device, and with each wall protruding<!-- EPO <DP n="8"> --> from the substrate to the same height, a continuous glass cover 801 is attached to the walls 98.</p>
<p id="p0030" num="0030">With the continuous glass cover 801 attached, for example across an entire wafer (shown in <figref idref="f0008">Figure 8</figref>), the substrate 10 may be thinned according to operational requirements, which may typically be dictated by the operational frequency of the RF MEMS switch.</p>
<p id="p0031" num="0031">In particular the substrate may be thinned to 100 microns for operation with an RF MEMS device switching at frequencies of approximately 35GHz or higher.</p>
<p id="p0032" num="0032">The use of such a continuous glass cover provides that the intermediate assembly may be more easily handled as the packaged MEMS devices near completion. In particular, the glass cover 801 provides a rigid surface which can be held firmly during further manufacturing operations such as the thinning of the substrate 10.</p>
<p id="p0033" num="0033">Once the substrate 10 has been thinned according to operational requirements, the substrate 10 may be drilled to form access holes or voids 803, as shown in <figref idref="f0006">Figure 6C</figref>, extending from the back-surface of the substrate (that is to say the opposite side of the substrate to the side upon which the MEMS devices are mounted) up to the contacts 12, 12'. Such voids provide for the formation of the vias 100.</p>
<p id="p0034" num="0034">In common with the substrate thinning operation, the void drilling operation may be facilitated by the provision of the continuous glass cover 801 and its associated properties of structural integrity and support. This provides assistance with the preservation of the sealed environment formed between the substrate, the walls 98 and the cover 801.</p>
<p id="p0035" num="0035">The voids 803 are formed by the drilling operation such that they are formed in a portion of the substrate 10 at a region which is directly below the footprint of the wall 98, alternatively referred to as the cover-to-substrate region. Such provision can further help to provide integrity during the drilling operation because the substrate may react to the forces induced by drilling in such a manner that tends to mitigate bending moments.<!-- EPO <DP n="9"> --></p>
<p id="p0036" num="0036">Once the voids 803 have been formed, they may be filled with, firstly a metal barrier layer 805 and secondly with the via 100. The vias 100 may tend to be formed from gold and hence the metal barrier layer 805 is provided, according to known practice in the art, so that a suitable electrical connection may be provided between the gold via 100 and the contacts 12, 12' which may be formed from aluminium. Once the vias 100 are in place, the gold electrical contacts 106 on the back plane of the substrate 10 are formed.</p>
<p id="p0037" num="0037">The order of certain steps in the manufacture of the packaged devices may vary. For example it is possible in an alternative process to form the walls 98 on the continuous glass cover 801 prior to attaching the walls (and hence the cover) to the substrate 10.</p>
<p id="p0038" num="0038"><figref idref="f0005">Figures 6A</figref> through to 6D and the associated discussion describe how to manufacture a plurality of packaged MEMS devices. This manufacturing process is applicable to wafer-scale manufacturing and accordingly <figref idref="f0008">figure 8</figref> shows a wafer, populated with hundreds of packaged MEMS devices, which has been made according to the above described process.</p>
<p id="p0039" num="0039">With the packaged MEMS devices provided on the wafer, the next operation is to separate the individual MEMS devices. This may be done according to practices known in the art such as thinning the glass between the sealed capsules (eg thinning at Q and J). Such thinning involves providing a layer of rubber over the areas of glass which are to remain at their original thickness and then etching the glass. Thus thinned the glass may be cut using known wafer sawing techniques.</p>
<p id="p0040" num="0040">The arrangement of the present invention provides for a particularly efficient use of space (eg the arrangement tends to reduce the need for bulky side contacts) and thereby tends to enable a greater number of packaged MEMS devices to be manufactured on a single wafer thus reducing manufacturing costs.</p>
<p id="p0041" num="0041">The invention also includes any novel feature or combination of features whether or not specifically claimed. In particular but without limitation a feature<!-- EPO <DP n="10"> --> appearing in a first claim or series of claims may be introduced into another claim a series of claims not dependent from the first claim or series of claims.</p>
<p id="p0042" num="0042">Further, whilst the above description has focussed on embodiments where the RF MEMS device being packaged is a switch, it would be understood by the skilled man that other RF MEMS devices could be packaged according to the present invention.</p>
</description>
<claims id="claims01" lang="en"><!-- EPO <DP n="11"> -->
<claim id="c-en-01-0001" num="0001">
<claim-text>A packaged RF MEMS device comprising:
<claim-text>an RF MEMS device (12, 12', 14),</claim-text>
<claim-text>a substrate (10) upon which the RF MEMS device is mounted,</claim-text>
<claim-text>a cover (80) mounted on the substrate and comprising a cavity for containing the RF MEMS device (12, 12', 14), the cover (80) and substrate (10) thereby defining a cover-to-substrate interface (99) and a cover-to-substrate interface boundary (97), and</claim-text>
<claim-text>at least one electrically conductive path (12', 94, 92: 12', 94, 100) extending between the RF MEMS device (12, 12', 14) and a peripheral surface (96) of the packaged MEMS device, the electrically conductive path comprising:
<claim-text>a track (12', 94) extending from a first track end (12') at the RF MEMS device (12', 14) to a connecting track portion (94) at the cover-to-substrate interface (99), the connecting track portion (94) being arranged to terminate within the boundary (97) of the cover-to-substrate interface (99), <b>characterised by</b> the cover being at least partly optically transparent, and by a via (92; 100) extending between the track portion (94) at the cover-to-substrate interface (99) and the peripheral surface (96, 84) of the packaged MEMS device, said at least one electrically conductive path (12', 94, 92: 12', 94, 100) not extending beyond the cover-to-substrate interface boundary (97) of the packaged RF MEMS device.</claim-text></claim-text></claim-text></claim>
<claim id="c-en-01-0002" num="0002">
<claim-text>A packaged RF MEMS device according to claim 1, wherein a wall (90) of the cover (80) is made thicker whereby to form the via (92) through the substrate (10) within a width of the wall.<!-- EPO <DP n="12"> --></claim-text></claim>
<claim id="c-en-01-0003" num="0003">
<claim-text>A packaged RF MEMS device according to claim 1 or 2, wherein at least internal and external top surfaces (82, 84) of the cover (80) are polished to make the cover (80) optically transparent.</claim-text></claim>
<claim id="c-en-01-0004" num="0004">
<claim-text>A packaged RF MEMS device according to any one of the preceding claims wherein the cover (80) comprises a separate wall structure (98) and lid structure (80), the wall structure spacing the lid structure from the substrate (10).</claim-text></claim>
<claim id="c-en-01-0005" num="0005">
<claim-text>A packaged RF MEMS device according to claim 4 wherein the wall structure (98) is of glass or an oxide of silicon.</claim-text></claim>
<claim id="c-en-01-0006" num="0006">
<claim-text>A packaged RF MEMS device according to claim 4 or 5 wherein the lid structure (80) is frit-bonded to the wall structure (98).</claim-text></claim>
<claim id="c-en-01-0007" num="0007">
<claim-text>A packaged RF MEMS device according to any preceding claim, wherein the cover (80) is sealably mounted on the substrate (10), thereby defining a sealed cover-to-substrate interface (99).</claim-text></claim>
<claim id="c-en-01-0008" num="0008">
<claim-text>A method of packaging an RF MEMS device according to claim 1, comprising mounting the device (12, 12', 14) on a circuit substrate (10) preparing a perimeter area (102) around the device to receive a wall structure (98) of an at least partly optically transparent cover (80), laying an electrically conductive track (12', 94) which terminates within a boundary (97) of a cover-to-substrate interface (99), securing a perimeter wall of the cover (80) to the substrate (10) in the cover-to-substrate interface perimeter area (99), thereby housing the RF MEMS device in a sealed environment and thereafter, while using the cover (80) to provide support to prevent deformation of the substrate (10), performing at least one of thinning the substrate and drilling one of the substrate and the cover to install a via (92, 100) therein.<!-- EPO <DP n="13"> --></claim-text></claim>
<claim id="c-en-01-0009" num="0009">
<claim-text>A method according to claim 8, wherein a single optically transparent cover (80) is attached to a said substrate (10) having a plurality of RF MEMS devices (12, 12', 14) mounted thereon, the cover (80) thereby housing each of the plurality of RF MEMS devices in a sealed environment unique to each RF MEMS device.</claim-text></claim>
</claims>
<claims id="claims02" lang="de"><!-- EPO <DP n="14"> -->
<claim id="c-de-01-0001" num="0001">
<claim-text>Mit Gehäuse versehenes HF-Mikrosystemgerät, das Folgendes aufweist:
<claim-text>ein HF-Mikrosystemgerät (12, 12', 14),</claim-text>
<claim-text>ein Substrat (10), auf dem das HF-Mikrosystemgerät montiert ist,</claim-text>
<claim-text>eine Abdeckung (80), die auf dem Substrat montiert ist und einen Hohlraum zum Enthalten des HF-Mikrosystemgerätes (12, 12', 14) aufweist, wobei die Abdeckung (80) und das Substrat (10) dadurch eine Abdeckung-Substrat-Berührfläche (99) und eine Abdeckung-Substrat-Berührflächenbegrenzung (97) definieren, und</claim-text>
<claim-text>mindestens einen elektrisch leitenden Weg (12', 94, 92: 12', 94, 100) der sich zwischen dem HF-Mikrosystemgerät (12, 12', 14) und einer peripheren Fläche (96) des mit Gehäuse versehenen Mikrosystemgerätes erstreckt, wobei der elektrisch leitende Weg Folgendes aufweist:
<claim-text>eine Leiterbahn (12', 94) die sich von einem ersten Leiterbahnende (12') am HF-Mikrosystemgerät (12', 14) zu einem Verbindungsleiterbahnabschnitt (94) an der Abdeckung-Substrat-Berührfläche (99) erstreckt, wobei der<!-- EPO <DP n="15"> --> Verbindungsleiterbahnabschnitt (94) derart angeordnet ist, dass er innerhalb der Begrenzung (97) der Abdeckung-Substrat-Berührfläche (99) endet, <b>gekennzeichnet dadurch, dass</b> die Abdeckung mindestens teilweise optisch transparent ist, und durch eine Durchkontaktierung (92; 100), die sich zwischen dem Leiterbahnabschnitt (94) an der Abdeckung-Substrat-Berührfläche (99) und der peripheren Fläche (96, 84) des mit Gehäuse versehenen Mikrosystemgerätes erstreckt, wobei der mindestens eine elektrisch leitende Weg (12', 94, 92: 12', 94, 100) sich nicht über die Abdeckung-Substrat-Berührflächenbegrenzung (97) des mit Gehäuse versehenen HF-Mikrosystemgerätes hinaus erstreckt.</claim-text></claim-text></claim-text></claim>
<claim id="c-de-01-0002" num="0002">
<claim-text>Mit Gehäuse versehenes HF-Mikrosystemgerät nach Anspruch 1, wobei eine Wand (90) der Abdeckung (80) dicker angefertigt worden ist, wodurch die Durchkontaktierung (92) durch das Substrat (10) innerhalb einer Breite der Wand zu bilden ist.</claim-text></claim>
<claim id="c-de-01-0003" num="0003">
<claim-text>Mit Gehäuse versehenes HF-Mikrosystemgerät nach Anspruch 1 oder 2, wobei mindestens innere und äußere obere Flächen (82, 84) der Abdeckung (80) poliert sind, um die Abdeckung (80) optisch transparent zu machen.</claim-text></claim>
<claim id="c-de-01-0004" num="0004">
<claim-text>Mit Gehäuse versehenes HF-Mikrosystemgerät nach einem der vorhergehenden Ansprüche, wobei die Abdeckung (80) eine separate Wandstruktur (98) und Deckelstruktur (80) aufweist, wobei die Wandstruktur die Deckelstruktur in einem Abstand vom Substrat (10) anordnet.</claim-text></claim>
<claim id="c-de-01-0005" num="0005">
<claim-text>Mit Gehäuse versehenes HF-Mikrosystemgerät nach Anspruch 4, wobei die Wandstruktur (98) aus Glas oder einem Oxid des Siliciums ist.<!-- EPO <DP n="16"> --></claim-text></claim>
<claim id="c-de-01-0006" num="0006">
<claim-text>Mit Gehäuse versehenes HF-Mikrosystemgerät nach Anspruch 4 oder 5, wobei die Deckelstruktur (80) durch Frit-Bonden mit der Wandstruktur (98) verbunden ist.</claim-text></claim>
<claim id="c-de-01-0007" num="0007">
<claim-text>Mit Gehäuse versehenes HF-Mikrosystemgerät nach irgendeinem vorhergehenden Anspruch, wobei die Abdeckung (80) abdichtbar auf dem Substrat (10) montiert ist, wodurch eine abgedichtete Abdeckung-Substrat-Berührfläche (99) definiert ist.</claim-text></claim>
<claim id="c-de-01-0008" num="0008">
<claim-text>Verfahren zum Versehen eines HF-Mikrosystemgerätes mit einem Gehäuse nach Anspruch 1, das Folgendes aufweist: Montieren des Gerätes (12, 12', 14) auf einem Schaltungssubstrat (10), Herstellen eines Randbereiches (102) um das Gerät, um eine Wandstruktur (98) einer mindestens teilweise optisch transparenten Abdeckung (80) aufzunehmen, Legen einer elektrisch leitfähigen Leiterbahn (12', 94), die innerhalb einer Begrenzung (97) einer Abdeckung-Substrat-Berührfläche (99) endet, Befestigen einer Randwand der Abdeckung (80) am Substrat (10) im Abdeckung-Substrat-Berührflächen-Randbereich (99), wodurch das HF-Mikrosystemgerät in einer abgedichteten Umgebung untergebracht wird, und danach, während die Abdeckung (80) verwendet wird, um Halt bereitzustellen, um Verformung des Substrates (10) zu verhindern, Durchführen mindestens eines von Dünnermachen des Substrates und Bohren eines des Substrates und der Abdeckung, um eine Durchkontaktierung (92, 100) darin zu installieren.</claim-text></claim>
<claim id="c-de-01-0009" num="0009">
<claim-text>Verfahren nach Anspruch 8, wobei eine einzelne optisch transparente Abdeckung (80) am Substrat (10) angebracht ist, das mehrere darauf montierte HF-Mikrosystemgeräte (12, 12', 14) aufweist, wobei die Abdeckung (80) dadurch jedes der mehreren HF-Mikrosystemgeräte in einer abgedichteten Umgebung<!-- EPO <DP n="17"> --> unterbringt, die für jedes HF-Mikrosystemgerät einzigartig ist.</claim-text></claim>
</claims>
<claims id="claims03" lang="fr"><!-- EPO <DP n="18"> -->
<claim id="c-fr-01-0001" num="0001">
<claim-text>Dispositif MEMS RF conditionné comportant :
<claim-text>un dispositif MEMS RF (12, 12', 14),</claim-text>
<claim-text>un substrat (10) sur lequel le dispositif MEMS RF est monté,</claim-text>
<claim-text>une couverture (80) montée sur le substrat et comportant une cavité destinée à contenir le dispositif MEMS RF (12, 12', 14), la couverture (80) et le substrat (10) définissant ainsi une interface couverture-substrat (99) et une limite (97) d'interface couverture-substrat, et</claim-text>
<claim-text>au moins un chemin électriquement conducteur (12', 94, 92 : 12', 94, 100) s'étendant entre le dispositif MEMS RF (12, 12', 14) et une surface périphérique (96) du dispositif MEMS conditionné, le chemin électriquement conducteur comportant :
<claim-text>une piste (12', 94) s'étendant d'une première extrémité (12') de piste au niveau du dispositif MEMS RF (12', 14) à une partie (94) de piste de liaison au niveau de l'interface couverture-substrat (99), la partie (94) de piste de liaison étant agencée de façon à se terminer à l'intérieur de la limite (97) de l'interface couverture-substrat (99), <b>caractérisé en ce que</b> la couverture est au moins partiellement transparente optiquement, et <b>en ce qu'</b>une traversée (92 ; 100) s'étend entre la partie (94) de piste au niveau de l'interface couverture-substrat (99) et la surface périphérique (96, 84) du dispositif MEMS conditionné, ledit ou lesdits chemins électriquement conducteurs<!-- EPO <DP n="19"> --> (12', 94, 92 : 12', 94, 100) ne s'étendant pas au-delà de la limite (97) d'interface couverture-substrat du dispositif MEMS RF conditionné.</claim-text></claim-text></claim-text></claim>
<claim id="c-fr-01-0002" num="0002">
<claim-text>Dispositif MEMS RF conditionné selon la revendication 1, une paroi (90) de la couverture (80) étant épaissie, pour former ainsi la traversée (92) à travers le substrat (10) dans la limite d'une largeur de la paroi.</claim-text></claim>
<claim id="c-fr-01-0003" num="0003">
<claim-text>Dispositif MEMS RF conditionné selon la revendication 1 ou 2, des surfaces supérieures interne et externe (82, 84) au moins de la couverture (80) étant polies pour rendre la couverture (80) optiquement transparente.</claim-text></claim>
<claim id="c-fr-01-0004" num="0004">
<claim-text>Dispositif MEMS RF conditionné selon l'une quelconque des revendications précédentes, la couverture (80) comportant une structure (98) de paroi distincte et une structure (80) de couvercle, la structure de paroi écartant la structure de couvercle du substrat (10).</claim-text></claim>
<claim id="c-fr-01-0005" num="0005">
<claim-text>Dispositif MEMS RF conditionné selon la revendication 4, la structure (98) de paroi étant constituée de verre ou d'un oxyde de silicium.</claim-text></claim>
<claim id="c-fr-01-0006" num="0006">
<claim-text>Dispositif MEMS RF conditionné selon la revendication 4 ou 5, la structure (80) de couvercle étant collée par frittage à la structure (98) de paroi.</claim-text></claim>
<claim id="c-fr-01-0007" num="0007">
<claim-text>Dispositif MEMS RF conditionné selon l'une quelconque des revendications précédentes, la couverture (80) étant montée sur le substrat (10) de façon à pouvoir être rendue étanche, définissant ainsi une interface couverture-substrat (99) étanche.</claim-text></claim>
<claim id="c-fr-01-0008" num="0008">
<claim-text>Procédé de conditionnement d'un dispositif MEMS RF selon la revendication 1, comportant les étapes<!-- EPO <DP n="20"> --> consistant à monter le dispositif (12, 12', 14) sur un substrat (10) circuit, à préparer une zone (102) de périmètre autour du dispositif pour recevoir une structure (98) de paroi d'une couverture (80) au moins partiellement transparente optiquement, à déposer une piste électriquement conductrice (12', 94) qui se termine à l'intérieur de la limite (97) d'une interface couverture-substrat (99), à fixer une paroi de périmètre de la couverture (80) au substrat (10) dans la zone de périmètre de l'interface couverture-substrat (99), logeant ainsi le dispositif MEMS RF dans un environnement étanche, puis, tout en utilisant la couverture (80) pour assurer un soutien afin d'empêcher une déformation du substrat (10), effectuer au moins une des actions consistant à amincir le substrat et à percer soit le substrat, soit la couverture pour y installer une traversée (92, 100).</claim-text></claim>
<claim id="c-fr-01-0009" num="0009">
<claim-text>Procédé selon la revendication 8, une seule couverture (80) optiquement transparente étant fixée à un substrat (10) susmentionné sur lequel est montée une pluralité de dispositifs MEMS RF (12, 12', 14), la couverture (80) logeant ainsi chaque dispositif de la pluralité de dispositifs MEMS RF dans un environnement étanche unique pour chaque dispositif MEMS RF.</claim-text></claim>
</claims>
<drawings id="draw" lang="en"><!-- EPO <DP n="21"> -->
<figure id="f0001" num="1,2"><img id="if0001" file="imgf0001.tif" wi="137" he="181" img-content="drawing" img-format="tif"/></figure><!-- EPO <DP n="22"> -->
<figure id="f0002" num="3,4"><img id="if0002" file="imgf0002.tif" wi="151" he="189" img-content="drawing" img-format="tif"/></figure><!-- EPO <DP n="23"> -->
<figure id="f0003" num="5A,5B,5C,5D"><img id="if0003" file="imgf0003.tif" wi="143" he="233" img-content="drawing" img-format="tif"/></figure><!-- EPO <DP n="24"> -->
<figure id="f0004" num="5E"><img id="if0004" file="imgf0004.tif" wi="67" he="233" img-content="drawing" img-format="tif"/></figure><!-- EPO <DP n="25"> -->
<figure id="f0005" num="6A,6B"><img id="if0005" file="imgf0005.tif" wi="152" he="233" img-content="drawing" img-format="tif"/></figure><!-- EPO <DP n="26"> -->
<figure id="f0006" num="6C,6D"><img id="if0006" file="imgf0006.tif" wi="155" he="233" img-content="drawing" img-format="tif"/></figure><!-- EPO <DP n="27"> -->
<figure id="f0007" num="7"><img id="if0007" file="imgf0007.tif" wi="165" he="205" img-content="drawing" img-format="tif"/></figure><!-- EPO <DP n="28"> -->
<figure id="f0008" num="8"><img id="if0008" file="imgf0008.tif" wi="158" he="177" img-content="drawing" img-format="tif"/></figure>
</drawings>
<ep-reference-list id="ref-list">
<heading id="ref-h0001"><b>REFERENCES CITED IN THE DESCRIPTION</b></heading>
<p id="ref-p0001" num=""><i>This list of references cited by the applicant is for the reader's convenience only. It does not form part of the European patent document. Even though great care has been taken in compiling the references, errors or omissions cannot be excluded and the EPO disclaims all liability in this regard.</i></p>
<heading id="ref-h0002"><b>Patent documents cited in the description</b></heading>
<p id="ref-p0002" num="">
<ul id="ref-ul0001" list-style="bullet">
<li><patcit id="ref-pcit0001" dnum="US20080007814A"><document-id><country>US</country><doc-number>20080007814</doc-number><kind>A</kind></document-id></patcit><crossref idref="pcit0001">[0003]</crossref></li>
</ul></p>
</ep-reference-list>
</ep-patent-document>
