This invention, as expressed in the heading of these specifications, is about a light-emitting diode (LED) video display including several functional units which comprise interconnected modules forming a two-dimensional regular matrix, each module including in turn a number of pixels. The final objective is to provide a solution to the three main problems associated with this type of device: to reduce power supply, obtain the appropriate energy performance and achieve integration of the electronic system into a single and flexible printed circuit. The suggested solution features additionally high adaptability when providing valid solutions to volatile technological variables or different design issues, such as supply voltage, number of pixels per module, number of LEDs per pixel, or live voltage drops and their relative light intensity.

The invention also makes it possible to implement modules through integrated circuits where the whole main electronic system has been installed (except for LED diodes), so that displays are only made up of an association of integrated circuits and LEDs mounted on a printed circuit which is preferably flexible but may also be rigid, thus simplifying and reducing the manufacturing price of this type of display. The resulting displays have extremely reduced thickness and weight, which represents a key factor in their easy installation in locations where it is technically complicated or impossible to install current LED displays.

LED video displays made of a regular matrix of LED diodes are well known. These displays are the most efficient mechanism for the manufacture of larger displays.

In practice, LED video displays are implemented by following the same general guidelines. They are physically installed in special cabinets, so that LED panels are installed in the front and the whole electronic system required for its operation is protected inside. Several supply sources generate one or different low-tension voltages from the power supply. The circuitry, normally made up by integrated analogue drivers, controls the brightness of each LED. Finally, a specific digital electronic control regulates transmission and generation of images on the display.

The difficulty in implementing flexible video displays resides, firstly, in the integration of the electronic system required, including LEDs themselves, into a very small profile, typically a single printed circuit. Basically, this electronic system shall be able to individually control the brightness of each LED. Secondly, the implementation of the analogue driver shall be such that the power supply required for its correct operation is sufficiently reduced to be efficiently transported throughout its entire length and width. It shall be considered that, to solve this problem, dc/dc converters cannot be introduced into the reduced profiles that flexible video displays require nor can large section conductors be used to transport these currents.

On the other hand, the analogue driver whose circuit diagram is represented in figure 1 of these specifications is also well known, and it is state of the art and similar to the US 4.743.897 patent.

In the driver of figure 1, the controller or source of constant current 101 supplies constant current to all LEDs 102. Each LED turns on and off by means of MOS 103 transistors connected in parallel to each diode and applying a specific voltage in their gate terminal 104. The source of constant current has a 105 control input, which allows interruption of this current when all LEDs are off, thus reducing consumption.

The total current consumed by this driver and the N LEDs connected in series is equal to the current consumed by only one LED. The number of LEDs that can be connected in series for a driver like the one shown in figure 1 is limited in practice by the maximum gate-supply voltage of transistors. The sum of all LED live voltages, in a worst-case scenario, shall be such that voltage at the transistor gate does not exceed that maximum value under any circumstances.

Apart from this, another known analogue driver is the one shown in figure 2, generally implemented in integrated circuits controlling 201 N LEDs which are connected through N outputs; for that purpose, they use N sources of 202 constant current which may be turned on or off externally by means of a suitable digital 203 interface. These analogue drivers do not comprise the other digital electronics in charge of generating digital modulations which independently control or adjust the brightness of each LED or other functions related to the generation or processing of images from the digital domain.

The total current consumed by this driver and the N LEDs is equal to the sum of all the individual currents consumed by each of the LEDs and the driver itself. The number of LEDs that can be controlled by a driver such as the one shown in figure 2 is limited by the section of the conductors required to transport the currents consumed by them. This fact makes it necessary to use dc/dc converters or ac/dc power supplies for each group of LEDs, in order to reduce these currents and increase the supply voltage.

At the current stage of technology, there are no LED video displays formed by a regular two-dimensional matrix of modules where each module includes the necessary circuits - both digital and analogue - to implement flexible LED displays.

On the other hand, pulse width modulation techniques used to control the brightness of each LED are well know.

To achieve the objectives and avoid the issues described in previous paragraphs, this invention, the same as state of the art displays, comprises many pixels forming a matrix, each pixel being made up of a non-zero number of red LED L_R diodes, a non-zero number of green LED L_G diodes and a non-zero number of blue LED L_B diodes; they include a digital network aimed to regulate transmission and generation of images on the display. The main novelty of this invention is that it comprises diversity of functional units arranged according to a regular two-dimensional matrix connected through the digital network in order to distribute numerical information about image contents among the said functional units.

Each functional unit also comprises the following elements:

1. a) a set of pixels, where LEDs of each functional unit are organized into, at least, one red LED n_R series circuit, at least one green LED n_G series circuit and at least one blue LED n_B series circuit;
2. b) a first set of constant current sources including a number of constant current sources equal to the number of red LED n_R series circuits, where each constant current source has a digital enabling input and is solely connected to a red LED series circuit;
3. c) a second set of constant current sources including a number of constant current sources equal to the number of green LED n_G series circuits, where each constant current source has a digital enabling input and is solely connected to a green LED n_G series circuits;
4. d) and a third set of constant current sources including a number of constant current sources equal to the number of blue LED n_B series circuits, where each constant current source has a digital enabling input and is solely connected to a blue LED n_B series circuit to make consumption by each colour independent.

As a consequence, on the invention display there are circuits of LEDs of the same colour connected in series, in such a way that there is a first set of constant current sources where each constant current source is only applied to red LEDs, a second set of constant current sources where each constant current source is only applied to green LEDs and a third set of constant current sources where each constant current source is only applied to blue LEDs, resulting in an independent consumption by each colour and a physical distribution of the said elements into different modules with flexible interconnections, each of them including N pixels and incorporating the necessary electronics, both digital and analogue, to completely control the functioning of the display.

Apart from this, all elements from a functional unit are physically arranged into a group of modules, each of them comprising the same number of pixels, the said modules being electrically interconnected by means of flexible or rigid unions provided with the connections forming the circuits of LEDs connected in series and with the constant current sources shared by the group of modules. Each module also comprising:

1. a) a set of analogue switches, equal to the number of LEDs in the module, each analogue switch being connected in parallel to one LED;
2. b) a set of level adaptors, equal to the number of LEDs in the module, controlled by a different digital signal for each level adaptor, each digital signal being connected to the control inlet of an analogue switch to independently turn them on/off;
3. c) a first set of pulse width modulators (PWM), equal to the number of LEDs in the module, connected to each level adapter inlet belonging to the said module;
4. d) a second set of pulse width modulators (PWM), equal to the number of constant current sources, each pulse width modulator being connected to the enabling input of a constant current source to be activated when any of the LEDs supplied by the said constant current source are on, whether the LEDs belong to the same module or to any of the other modules of the same functional unit;
5. e) a memory to store information about the image being represented in the module and about the image being simultaneously received;
6. f) a communication channel, which is part of the digital network, to transfer numerical information concerning to the images to be represented to each and every module belonging to each and every functional unit making up the display.

Therefore, there is an analogue network where, firstly, each of the mentioned G modules functional units is formed by a first S_R set of constant current sources each one of which supplies one circuit of red n_R LEDs connected in series, a second S_G set of constant current sources each one of which supplies one circuit of green n_G LEDs connected in series and a third S_B set of constant current sources each of which supplies one circuit of blue n_B LEDs connected in series, where all the previous quantities, apart from being non-zero amounts, satisfy the following equation: $$G\cdot N=\frac{S_R{n}_R}{L_R}=\frac{S_G{n}_G}{L_G}=\frac{S_B{n}_B}{L_B}$$

Secondly, each module incorporates a set of N·(L_R+L_G+L_B) analogue switches connected in parallel to each and every one of the LEDs. These analogue switches may be implemented by a NMOS, PMOS, PNP, NPN transistor or any valid combination of them, for instance two-way gateways (T-gates), or by any other device governed by a control inlet which allows voluntary interruption of electrical current passage.

Thirdly, each N·(L_R+L_G+L_B) analogue switch incorporates a level adapter, in such a way that every switch is regulated by the same number of digital control signals as those that form the digital network; those adapters allow independent activation or deactivation of each and every analogue switch and, therefore, the individual switching on and off of each LED in the same module may be controlled from the digital domain.

The normal thing in conventional LED video displays is for each pixel forming the display to be made up by three LEDs with primary colours. Sometimes, in all pixels making up the display one of the LEDs is replaced by a circuit of two LEDs of the same colour in series in order to increase the display brightness. This process is implicitly incorporated into the description of this patent. On other occasions, implemented pixels with four LEDs, two of which are identical, are used, with the aim of increasing visual perception of the display resolution. For this reason, two procedures to individually control the brightness of the fourth LED with respect to the other three LEDs are described below. The first consists of the replacement of the LED by a circuit of two LEDs of the same colour connected in series, with the difference that, in this case, the rest of the elements necessary so that they can, in fact, be independently controlled from the digital domain are also duplicated. The second process consists of the establishment of a new circuit of LEDs connected in series with an additional source of constant current. In this case, the fourth LED added is not connected in series to another of its same colour but, from an electronic point of view, it would be like having a fourth colour component. Both procedures are also implicitly incorporated into this patent.

The suggested solution also includes the ability to adapt to different supply voltages, number of pixels by module, number of LEDs by pixel, or live voltage drops and their relative light intensity.

The invention is based on the fact that for the same power level, an increase in the supply voltage involves a reduction in the operating currents, which, as previously mentioned, is one of the main limiting factors in implementing flexible LED video displays. The maximum supply voltage is determined by the technological process employed in each specific installation of the display and is subject to modifications due to the constant evolution of these processes.

In effect, a specific optimised configuration for a determined supply voltage can be directly adapted to a new technological process which allows higher supply voltages by either increasing the number of pixels by module or, alternatively, adding additional modules to the same analogue interconnection network as well as keeping the number of total active sources of constant current in the system the same.

The display comprises of a set of at least one connector, which includes the supply and the communication channel for transmission of the digital network information to connect several displays in cascade and increase their surface.

With regard to the supply voltage, this has to be equal or higher than the total of live voltage drops V_f of all the LEDs belonging to the same series circuit which can be simultaneously turned on at the same time, plus the voltage required by the actual source of constant current for it to operate in accordance with its nominal value, normally 20 milliamps. The maximum value of supply voltage is limited by the maximum gate voltage of the switching transistors and, in general, by the nature of the technological process chosen for the installation of the integrated circuit.

In order to reduce the complexity of the display a single supply voltage can be used for all the sources of constant current. However, to maximise the efficiency of the displays and/or profit from all the possible valid configurations, the description of this patent also includes the possibility of applying independent voltage sources for each of the three colour components.

These voltages are generated through dc/dc or ac/dc converters which allow the outputs to be set within a certain range of the nominal operating voltage.

The efficiency is maximised by setting each of the power supplies to a value that is equal to the sum of the live voltage drops V_f of the n LEDs of each colour component which can be simultaneously switched on plus the value of nominal voltage V_reg required by the source of constant current for its operation, that is to say, n·V_f+V_reg. The value of the voltage applied should take into consideration the tolerances of the electronic components of the system, as well as the voltage drops arising in the electrical conductors and in the actual analogue switches.

Each of these power supplies generates the supply voltage of part of the display installed with LEDs from manufacturing batches with similar electric parameters. In this way it is ensured that the live voltage drops of all the LEDs of the same colour component have similar values.

The voltage output of these sources can be set internally and automatically during the normal operation of the display, or externally during the manufacturing process.

In the first instance, a mechanism is inserted into the control electronics of each module which allows the suitable value to be established for setting the supply voltage. One of the ways this value can be calculated is from the measurement obtained from the live voltage drop Vf of at least one of the LEDs of the same circuit, the voltage drop in the actual source of current or the current generated by the source of constant current. The value obtained must be transmitted to the power supply responsible for setting the voltage output.

The novel procedure explained below allows for a further reduction of the currents used by the displays described in this patent, which in turn facilitates the installation of larger displays without the need to increase the section of conductors which transport these currents.

The first aforementioned mechanism to reduce the supply current consists of increasing the supply voltage. However, there are factors which, in practice, limit the maximum value of this voltage. These factors are related to the difficulties in establishing technological processes compatible with these voltages and the electrical safety regulations that apply.

These problems definitely appear to be the result of having to respect minimum separation distances between conductors subject to a certain difference in potential. The value of voltage above which these difficulties become apparent is in practice 48V.

To resolve this problem a power supply is used which contains a set of equally-spaced multiple supply voltage S outputs, whereby each of the S outputs generate a voltage equal to V_i=(i+1)V, with i varying from 0 to S-1. Each pair of consecutive intermediate outputs between them comprises a new power supply of value V for a subset of functional units of G modules which form the display. Each of these subsets comprises an identical number Q of functional units. The difference in power V between the two consecutive power outlets must be sufficiently reduced to be able to be properly applied to the aforementioned subset of functional units of G modules following the procedure described above in this patent. In this way all the functional units of G modules are shared equally among the S supply voltages generated by the power supply.

For this to be efficient in practice, certain restrictions need to be established in terms of the logical operation of the display designed to ensure that the net currents consumed in each of the supply voltages generated in the consecutive intermediary outlets are as similar as possible. If this condition is met then the section of the conductors of all the intermediary outlets can be reduced to a minimal value.

The most convenient way of balancing consumption without jeopardising overall efficiency is to divide the display into numerous sections, each one comprising S functional units of G modules, each of these sections being physically and functionally identical to each other, such that:

1. (a) the intermediate voltages that supply the functional units belonging to the same section come from the same power supply,
2. (b) the perimeter of physical space taken up by the LEDs included in each of these sections has the most compact geometrical shape possible,
3. (c) the coordinated operation of the control logic which acts upon the turning on and off times of the sources of constant current for all modules in the same section aims to make the resulting consumptions performed by these modules on the S supplies as similar as possible.

In practice, the most suitable way of ensuring that the consumptions of the functional units grouped in the same section are similar is to apply the same pulse width modulation to the sources of constant current of the modules which occupy the same position within each of the functional units belonging to the same section. This pulse width modulation is precisely that of the module which originally displays a higher consumption than the rest occupying the same position in each functional unit. Under these conditions the current circulating through outputs V₀ to V_N-2 will be approximately null, only the current corresponding to the V_N-1 output being maintained.

It can be observed that despite using a power supply that delivers voltages of up to S·V, there are never differences in potential greater than V in the inside of each module.

Two procedures are described below which allow each module to detect when any of the LEDs belonging to that module stop working. The first test consists of the following steps prior to the normal operation of the display:

1. (a) initially keep the LEDs turned off,
2. (b) individually and sequentially turn on each and every LED keeping the rest turned off and measure, among other things, the live voltage drop V_f of at least one of the LEDs of the same series circuit, the voltage drop in the actual source of current or the current generated by the source of constant current.
3. (c) compare all the readings, detecting the broken LEDs as those giving different readings to the rest.

The effect of broken LEDs is that when their corresponding analogue switch opens, the flow of the current in the series circuit of that LED is interrupted, which means none of them function. This situation is detected by the module given that a null measurement is obtained which is different from that of the rest of the LEDs in the series circuit.

The second procedure allows these defects to be automatically detected during the normal operation of the display through a specific analogue circuit inserted in each LED which detects when the voltage in the LED terminals exceeds a certain threshold. This situation is immediately relayed, keeping the analogue switch permanently closed to allow the rest of the LEDs of the same circuit to keep functioning properly.

In any case it is necessary to add a specific analogue circuit which protects the analogue switch and avoids its exposure to a higher voltage than the absolute maximum value allowed.

The invention includes an external V_RGB power supply to supply all constant current sources, where the value of the said V_RGB external supply is at least the highest V_RGB value calculated according to the equations:

1. a) V_RGB ≥ n'_R·V_fR +V_reg,min; where V_fR represents live voltage drops of the red n_R LEDs connected in series belonging to the same circuit of which a maximum of only n'_R, can remain turned on at the same time, and V_reg,min as the minimum voltage drop necessary for the constant current source to work with nominal values.
2. b) V_RGB ≥ n'_G·V_fG +V_reg,min; where V_fG represents the sum of live voltage drops of the green n_G LEDs connected in series belonging to the same circuit of which a maximum of only n'_G, can remain turned on at the same time, and V_reg,min as the minimum voltage drop necessary for the constant current source to work with nominal values.
3. c) V_RGB ≥ n'_B·V_fB + V_reg,min; where V_fB represents the sum of live voltage drops of the blue n_B LEDs connected in series belonging to the same circuit of which a maximum of only n'_B, can remain turned on at the same time, and V_reg,min as the minimum voltage drop necessary for the constant current source to work with nominal values.

Another achievement of the invention is that the display comprises:

1. a) one set of at least one external Vg power source to supply all the green LED constant current sources; with a Vg voltage value corresponding to a minimum value higher than the sum of all V_fG live voltage drops of n'_G green LEDs connected in series belonging to the same circuit which can be simultaneously on, plus the minimum V_reg,min voltage drop necessary for the constant current source to operate with nominal values, according to the equation Vg> n'_G · V_fG +V_reg,min.
2. b) a second set of at least one external Vr power source to supply all the red LED constant current sources; with a Vr voltage value corresponding to a minimum value higher than the sum of all V_fR live voltage drops of n'_r red LEDs connected in series belonging to the same circuit which can be simultaneously on, plus the minimum V_reg,min voltage drop necessary for the constant current source to operate with nominal values, according to the equation Vr > n'_R · V_fR +V_reg,min.
3. c) a third set of at least one external Vb power source to supply all the blue LED constant current sources; with a Vb voltage value corresponding to a minimum value higher than the sum of all V_fB,max live voltage drops of n'_B blue LEDs connected in series belonging to the same circuit which may be simultaneously on, plus the minimum V_reg,min voltage drop necessary for the constant current source to operate with normal values, according to the equation Vb>n'_B · V_fB +V_reg,min.

Under the previous model, each module forming a functional unit includes measurement means selected among direct measurement means and indirect measurement means of at least one selected magnitude, among others, for:

1. a) live V_f voltage drops of at least one of the LEDs supplied by each of the constant current sources,
2. b) voltage drops of each constant current source,
3. c) currents generated by each constant current source circulating through each of the circuits of LEDs connected in series,

The invention also contemplates the possibility of including a fourth set of external supply sources to substitute the external V_RGB supply source, for the first set with at least one external Vg supply source, for the second set with at least one external Vr supply source and for the third set with at least one external Vb supply source including:

1. a) an output voltage S times higher than a selected source between the external V_RGB supply source of the first, second and third sets of external supply sources; Vg, Vr, Vb,
2. b) a total of S-1 additional intermediate voltage outputs with spaced values, connected to constant current sources of the display, where each consecutive intermediate output pair forms a new external supply source for a subset of the said functional units making up the display; each of the said subsets being formed by the same number of functional units,

Regarding the digital network, it is worth mentioning that it is made up, at least, of a first group of N·(L_R+L_G+L_B) pulse width modulators for each N pixel, which independently control the brightness they perceive. Apart from this, the digital network controls the turning on and off of the control input in the constant current source through a second group of specific pulse width modulators with the aim of optimizing consumption.

Each module incorporates a double storage memory. On the one hand, they store data corresponding to the image being represented and, on the other, they save partial data of the next image to be displayed.

There is a block in charge of all operations related to image processing. There are several strictly necessary processing levels, such as image decoding or global synchronism extraction by timing data collected, and other optional levels such as the hereinafter described gamma correction, the implementation of decompression algorithms or other digital image processing functions.

It furthermore incorporates a digital interface being part of a digital network which carries out two essential tasks through a port. First, it enables the distribution of information about images to be represented from an external video source to each module forming the display. Second, it makes it possible to individually read or write all parameters involved in the set up of each module from the exterior.

This last block also incorporates a specific fault tolerance mechanism aimed at detecting any malfunctioning of modules and allow for their disconnection from the supply without affecting the correct operation of the rest of the modules.

When the supply voltage value is not high enough to simultaneously supply the n LEDs belonging to a same series circuit through the corresponding constant current source, it is necessary to use a set of PWM pulse width modulators with modified modulation with respect to the original value of the first group of pulse width modulators as described bellow.

The maximum M number of LEDs which may remain simultaneously on at the same time within an n LED series circuit can be determined for a specific V_cc supply voltage value as the maximum M value which obtained from the equation M·V_f+V_resto<V_cc, where V_resto is the addition of the voltage value the constant current source requires to operate plus the voltage drops suffered by electrical conductors and the same analogue switches of the M-n LEDs which cannot be simultaneously on.

The secondary object of this first group of modulators is to provide for an operation which is as efficient as possible from an energy point of view. It is important to bear in mind that the constant current source, which is controlled by the second set of modulators, always has to be on when one of the LEDs connected in series to the same is on as well. Consumption optimization is reached by minimizing time the current source is on.

Therefore the first new group of modulators comprise the means to generate a set of PWM modulations overlapping each of the original PWM modulations. The combined behaviour of the overlapping PWM modulation and the original PWM modulation is equivalent to performing an AND logic of the two modulations separately, or rather, at any point in time, the analogue switch only remains open if, and only if, both modulations simultaneously indicate so, while it will remains closed if either of the two modulations separately indicate so.

The purpose of the overlapping PWM modulation is to ensure that at any moment in time, the number of LEDs turned on does not exceed the value M. The frequency of the overlapping PWM modulation is a non-zero whole number, E times greater than the value of the frequency of the original PWM modulation. The duty cycle of all the overlapping PWM modulations is constant and equal to M/n. On initial installation, each of the overlapping PWM modulations are applied with a constant phase difference equal to the period of the overlapping PWM modulation divided by the number n of LEDs connected in a series circuit. Generally the relative phase of the overlapping PWM modulations is adjusted depending on the configuration chosen to minimise the time that at least one of the LEDs is on. To optimise the consumption to the maximum, this resetting of phases can be performed dynamically for each of the represented images.

It is also necessary to individually increase the duty cycle of each of the original PWM modulations to offset the additional periods of off-time caused by the overlapping PWM modulation. This increase in the duty cycle must be calculated from the value of the original duty cycle of each modulation such that the total time that the analogue switch remains open throughout the full period of the original PWM modulation is the same as what it would be if the overlapping modulation had not been applied. As a result of the application of this modified modulation scheme the value of maximum brilliance able to be reached by any of the n LEDs is reduced by the factor M/n.

There is also the possibility of being able to deactivate the overlapping PWM modulations at a certain point during the original PWM modulation when it can be guaranteed that the number of LEDs turned on at the same time does not exceed the value of M for the remaining period of the original PWM modulation. It is also necessary to take this fact into account when it comes to modifying the value of the duty cycles of the original PWM modulations, as previously mentioned.

On the other hand, the E value determines, in the worst-case scenario, the efficiency of the system such that the higher this value, the greater the resulting efficiency. However, the maximum value of E is limited by the particular dynamic nature of the technological process used in installing the integrated circuit. The result of this set of modulations is that the efficiency obtained for levels of brightness and reduced consumption is less than that which is reached when these levels of brightness increase, rapidly approaching the maximum efficiency value.

In summary, the final objective is to ensure that at any point in time no more than M LEDs are on at the same time, while achieving a balanced sharing of the current delivered by the source between all of the LEDs and minimising the time that this remains on.

When the modules described in this patent are installed in an integrated circuit the insertion of a regulator is included which allows the electronics of the digital domain to be supplied by the supply voltage of the system, thus avoiding the need to add an external regulator. The supply voltages of the digital domain are typically equal to or less than 3.3V, while the system supply can reach 48V. In general it is difficult to insert the inductive devices of the switched converters (dc/dc converters) into an integrated circuit. In this invention it is more convenient to integrate a lineal regulator, but for the system to continue being energetically efficient it is an essential condition for the consumption of the current of the electronics of the digital domain to be much smaller than that of the rest of the module.

The consumption of digital systems is directly proportional to their operating frequency. In this invention the consumption is largely determined by the operating frequency of the PWM modulators. A new procedure for non-lineal pulse width modulation is described below. This reduces the operating frequency and continues to be compatible with the use of overlapping PWM modulations to suitably and efficiently share out the current between the n LEDs on the same series circuit when no more than M LEDs can be on at the same time.

Due to the logarithmic response of the human eye, it is necessary to digitally make an adjustment in the luminous intensity or tonalities generated in each LED in the displays, known as gamma correction. This adjustment reduces the total number of tonalities to only those actually distinguishable by the human eye. For example, if the PWM modulators are installed with a length of 16 bits, the total intensity amount is reduced after the aforementioned correction from 65,536 to less than 256.

This fact can be used to establish a new modulation, known as non-linear PWM pulse width modulation, where operational frequency is significantly reduced. To this end it is necessary to generate a clock with a frequency which varies throughout each period of the PWM modulation, in a way that the duration of each clock cycle is directly proportional to each of the gamma correction values. The number of clock cycles applied to PWM modulators is reduced in the same amount as the number of intensities resulting from the correction, and as consumption is proportional to the number of transitions by time unit, the global consumption achieved with this new modulation is also reduced in the same proportion. In the former 16 bits example, the number of transitions and consumptions would be reduced in a 65,536/256 factor, that is to say, 256. Another advantage of this type of modulation is that it makes it possible to reduce the number of PWM modulator bits. Continuing with the same example, as only the first 256 cycles are used in each modulation cycle, it is possible to implement them using PWM modulators with only 8 bits.

The novelty of the next modulation, called mixed non-linear PWM modulation, is that, while keeping the same advantages of non-linear PWM modulations, it distributes current efficiently and appropriately among n LEDs of a same series circuit when no more than M LEDs can be turned on simultaneously. It is based on the fact that each complete cycle of this new modulation uses several non-linear PWM modulations which are shorter (each of them codifying, therefore, a reduced number of values) and consecutive in time. In its simplest form, the number of shorter, consecutive non-linear modulations coincides with the total number n of LEDs in each series circuit. Therefore, the clock signal is applied using a frequency which varies several times throughout each PWM modulation period between the minimum and maximum values determined by the gamma correction used.

The fact that the duration of these n non-linear intervals is the same can be used to apply a set of PWM modulations, with the same considerations as described in this patent, overlapping mixed non-linear PWM modulation, which allows an equitable distribution of brightness among the n LEDs. It should be noted that, when codifying the values of this new modulation, the linear and non-linear components shall be taken into consideration.

The number of non-linear intervals can be increased by an E integer multiple. In the worst case scenario the E value determines, the performance of the system, so that the higher this value is, the higher the resulting performance will be. The number of non-linear intervals can be increased by just reducing their duration and, therefore, the number of encodable values in each of them. In this mixed non-linear modulation, the number of bits required is higher than that of the original non-linear modulation, but it is still lower than the value of the original linear PWM modulation described in this patent, hence still providing for a significant reduction of the number of transitions in the clock signal and therefore of the net consumption. It should be noted that by increasing the E number, performance is increased but so too is consumption.

It is worth mentioning that the digital network communications channel includes a cascade connection of all display modules, each module having a storage register with an input connection to the previous module in the cascade connection, and an output connection to the next module in the cascade connection, in order to transfer images through those storage registers.

With the aim of avoiding failure of one of the modules causing a malfunctioning of the rest of the subsequent modules in the display, not only can the communications network link each module to the previous one, but also contains an additional, auxiliary connection linking each module to the module before the one immediately preceding it. Additionally, it incorporates a parity detection system of data received by both channels, so that a digital logic system makes it possible to automatically switch to an auxiliary channel when parity of the main channel does not coincide with that expected. This action causes the previous module to be effectively disconnected from the system. To prevent alteration of the data distribution order between all the modules it is necessary to incorporate an additional digital logic system to this auxiliary channel to compensate the fact that the system is now one module short.

Apart from this, all LEDs in the invention are inclined at a specific negative angle. This innovation optimises the angle of vision, consumption is reduced and/or the brightness perceived by the observer increased. To that end, all elements making up the display are assembled on a flexible printed circuit where the pixels are located on one side and the rest of the elements are situated in a space selected from the free space between LEDs or the space available on the other side of the said flexible printed circuit.

To achieve this functionality, the display includes mechanical means to bend the flexible printed circuit to position the LEDs to form a negative angle, all of them remaining on the same vertical plane.

This solution makes it possible for the assembly of all electronic components on the flexible printed circuit to be compatible with the standard industrial production lines normally used in the fabrication of electronic devices. The printed circuits maintaining the LEDS in an inclined position are given their form during the final mechanical assembly of the display, once the assembly process of the parts on top of the flexible printed circuit has been completely finished.

Another additional feature is that LEDs are located in the same vertical plane, thus avoiding their mutual obstruction of the light emitted.

The configuration described makes it possible to implement modules by means of integrated circuits in which LED diodes have not been installed but the electronic system, described above, necessary for the correct operation of the display has. This means that displays are formed only by a variety of integrated circuits and LEDs assembled on a rigid or flexible printed circuit. This way, the manufacturing of this type of display is significantly simpler and cheaper.

Normally, in high resolution LED displays with shorter distance between pixels, each pixel is formed by three LEDs with the primary colours grouped in the same, square-shaped, six terminal plastic case. The integrated circuit, which could be physically installed into a square casing, may be positioned on the flexible printed circuit to form a 45° angle with respect to the edge of the display, and four pixels such as the ones described may also be physically distributed on each side of the integrated circuit; these pixels will also form a 45° angle with respect to the edge of the display. In consequence, the minimum possible distance between pixels is obtained when both integrated circuits and LEDs are assembled on the same side of the flexible printed circuit.

The same integrated circuit may include one or several modules without LED diodes.

• Figure 1.- Represents a state of the art electrical circuit diagram used in displays made up of LEDs.
• Figure 2.- Represents a second state of the art electrical circuit diagram used in displays made up of LEDs.
• Figure 3.- Schematic diagram of the invention's digital interconnection network.
• Figure 4.- Schematic diagram of the invention's analogue interconnection network.
• Figures 5A-5C.- Represent different types of LED circuits described in the invention.
• Figures 6A -6B.- Detail how the connection of elements in the analogue domain is made.
• Figure 7.- Represents the block diagram of the digital domain of the invention.
• Figure 8.- Shows how all functional units between the S outputs of a fourth multiple set of external supply sources are distributed and how the display is divided in S functional units sections of G modules with the aim of minimizing currents circulating through the intermediate electrical power points of the source.
• Figures 9A-9D- Show an example of how the interconnection of four modules, each of them with 4 pixels and 12 LEDs, is made in order, to create a Red, Green, Green, Blue (RGGB)-type functional unit. Figure 9A shows all the connections and figures 10B-10D show the constant current source connections for each colour.
• Figure 10.- Shows an example of how the interconnection of four modules, each of them with 6 pixels and 18 LEDs, is made in order to create an RGGB-type functional unit.
• Figures 11A-11D- Show an example of how the interconnection of six modules, each of them with 4 pixels and 12 LEDs, is made in order to create an RXGGXB-type functional unit. Figure 11D shows all connections and figures 11A-11C show the constant current source connections for each colour.
• Figures 12A-12D- Show an example of how the interconnection of six modules, each of them with 4 pixels and 16 LEDs is made in order, to create an RGGGGB-type functional unit with a fourth independent colour component. Figure 12D shows all connections and figures 12A-12C show the constant current source connections for each colour.
• Figures 13A-13D- Show an example of how the interconnection of three modules, each of them with 4 pixels and 16 LEDs, is made in order to create an RGB-type functional unit with a fourth LED per non-independent pixel. Figure 13A shows all connections and figures 13B-13D show the constant current source connections for each colour.
• Figures 14A 14B.- Show an example of how interconnection of a module with 12 pixels and 48 LEDs, with a fourth LED per non-independent pixel, is made.
• Figures 15A -15E.- Diagram showing the different digital interconnection network variations in each physical row of modules of the invention:
  1. A) Simple cascade connection.
  2. B) Cascade connection of two rows of modules.
  3. C) Cascade connection bordering each second module.
  4. D) Cascade connection crossing each second module.
  5. E) Cascade connection connecting each fourth module and crossing the rest.
• Figure 16.- Diagram showing the zigzagging digital interconnection network with modules arranged in cascade for the different rows of modules forming one same column of the invention.
• Figure 17.- Diagram showing the zigzagging digital interconnection network with modules arranged in cascade, crossing one of every two modules, for the different rows of modules forming a same column of the invention. Its advantage is that connections between lines are made always on the same side, on the left in this case, thus simplifying wiring.
• Figure 18.- Diagram showing the zigzagging digital interconnection network with modules arranged in cascade, crossing three of every four modules, for the different rows of modules forming one same column of the invention. Its advantage is that connections between lines are always made on the same side, the left in this case, thus simplifying wiring while data input and output is also carried out through the same point, in this case the upper left corner.
• Figure 19.- Diagram showing the zigzagging digital interconnection network with modules arranged in cascade, crossing one of every two modules and, in turn, connecting in principle odd lines downwards and even lines upwards. Its advantage is that connections between lines are made always on the same side, on the left in this case, thus simplifying wiring while data input and output is also carried out through the same point, in this case the upper left corner, but in a simpler way than that shown in figure 18.
• Figure 20.- Diagram showing the placement of two adjacent columns to duplicate the surface of the display.
• Figures 21A-21D.- Diagram showing an alternative digital interconnection networks where modules are not connected along a horizontal line.
• Figure 22. - Example of a GRGB configuration where the analogue interconnection network and the digital communication network are represented.
• Figures 23A-23C.- Schematic representation of the construction of a large LED display:
  1. A) Connection of small displays to form a column with the appropriate height.
  2. B) Connection of different columns to obtain the desired width.
  3. C) Connection of several of these displays to further increase the dimensions of the final display.
• Figures 24A-24E.- Example of the application of an overlapping set of pulse width modulations to spread the brightness of an series circuit of n=12 LEDs when only a maximum of M=8 LEDs can be on, assuming that the working cycle of all LEDs is the same (figure 24A). Figure 24B shows a set of overlapping frequency modulations equal to the first group of pulse width modulations (E=1), and figure 24C shows the outcome of the resulting pulse width modulation. Figure 24D shows a set of overlapping pulse width modulations with a frequency four times as high as the first group of pulse width modulations (E=4), and figure 24E shows the outcome of the resulting pulse width modulation. In the thick vertical dotted line of figures 24C and 24D we can observe the point in time when the constant current source is switched off and, therefore, the difference in consumption between the two operational frequencies.
• Figures 25A-25D.- Comparison between a conventional pulse width modulation (figure 25A) and a non-linear pulse width modulation (figure 25B) where each vertical dotted line represents the working cycles that can be generated. Figure 25C shows a mixed non-linear pulse width modulation where each complete modulation period is made up of eight shorter, consecutive non-linear pulse width modulations. Figure 25D demonstrates how a set of overlapping modulations can be applied to the modulation in figure 25C in order to appropriately spread brightness in the event that only M=5 LEDs of a total of n=8 LEDs of series circuit can be simultaneously on.
• Figure 26. - Example of the connection of a display with a 32V RGGB topology to a 64V supply source with an intermediate output of 32V. Each RGGB functional unit belonging to each dotted area shall have approximately the same current consumption.
• Figures 27A-27B. - Describe how angles of vision of flexible displays can be optimized by inclining the LEDs in a negative angle after making openings around them (figure 27A), so that they can be mechanically moved towards the rear end of the flexible printed circuit, at the same time as they are inclined towards the lower end (figure 27B), with means that all them also remain in the same vertical plane.
• Figure 28.- Diagram showing the optimal arrangement of integrated circuits and LEDs to achieve a minimum distance between pixels when both types of components are assembled on the same side of the printed circuit.
• Figure 29.- Shows a secondary connection in the digital interconnection network which uses a fault-tolerance mechanism guaranteeing that, in the event of intermittent or temporary failure in the ICi-1 module, the other modules can continue to operate correctly.

As already indicated, the invention display is formed by a matrix of P-pixels, where each pixel constitutes a non zero number of red LED L_R diodes, a non zero number of green LED L_G diodes and a non zero number of blue LED L_B diodes, all of them organized into identical functional units, connected by a digital network to distribute numerical information corresponding to the contents of the images between the said functional units. Each of the said functional unit includes a set of pixels, in which the LEDs in each functional unit are organized into, at least, one circuit of red n_R LEDs connected in series, at least one circuit of green n_G LEDs connected in series and at least one circuit of blue n_B LEDs connected in series. It also includes a first S_R group of constant current sources with as many constant current sources as circuits of red LEDs connected in series, where each constant current source has one digital enabling input and is connected to only one circuit of red LEDs connected in series; a second S_G group of constant current sources with as many constant current sources as circuits of green LEDs connected in series, where each constant current source has one digital enabling input and is connected to only one circuit of green LEDs connected in series; and a third S_B group of constant current sources with as many constant current sources as circuits of blue LEDs connected in series, where each constant current source has one digital enabling input and is connected to only one circuit of blue LEDs connected in series, in order to make consumption of each colour independent. Modules are electrically connected to each other by means of flexible unions provided with the connections that form the circuits of LEDs connected in series and with the constant current sources shared by the said set of modules.

Elements of the functional unit make up a set of identical modules of N pixels each, which are arranged on a flexible printed circuit as described later on.

As represented in figures 3 and 4, there is a first 302 interconnection level, located in the digital domain, formed by a global network which enables distribution of numerical information corresponding to the contents of the images to all 301 modules comprising the display, and a second 403 interconnection level located in the analogue domain, locally associating sub-sets G 401 modules to each other and made up of the lines necessary to perform a series connection of all LEDs and constant current sources shared by this sub-set of modules, known as 402 functional unit.

Each circle in the two figures represents a module which has been assigned with an a_r,t coefficient for the digital interconnection network and a b_l,g coefficient for the local analogue network. The two sets of coefficients are bijectively related to each other, in a way that all coefficients in figure 3 equate to only one of the coefficients in figure 4. This means that the physical location of each module does not have to coincide either with their position on the graph, or with their physical one. This point will be described later on.

Note that while the 302 digital interconnection network directly or indirectly relates all modules making up the display to each other, the 403 analogue interconnection network is limited to only one 402 functional unit of G modules, where each P/(N·G) functional unit is completely independent of the other from the analogue point of view. Each module has all the analogue and digital electronic system necessary to independently control the brightness of N LEDs and efficiently distribute the numerical information corresponding to images between all the modules making up the display.

Below is a description of the analogue network used in the invention display.

First, is shall be noted that the analogue domain of each 402 functional unit of G modules mentioned, as shown in figure 4, is formed by a first S_R set of constant current sources supplying one circuit of red n_R LEDs connected in series, a second S_G set of constant current sources supplying one circuit of green n_G LEDs connected in series and a third S_B set of constant current sources supplying one circuit of blue n_B LEDs connected in series, and all previous quantities, apart from being non zero amounts, satisfy the following equation: $$G\cdot N=\frac{S_R{n}_R}{L_R}=\frac{S_G{n}_G}{L_G}=\frac{S_B{n}_B}{L_B}$$

This way, we obtain a set of valid solutions for this equation which match each of the different settings of flexible LED displays, which are the object of this invention and which are described with the help of figure 5.

Each G module, referred to as b_l,g, in the figure contains at least one of the following elements for each of the three red, green and blue components:

• Figure 5A shows at least one series circuit of one or several 501 LEDS of the same colour with two external connections formed by a 502 anode and a 503 cathode whose ends are left free, through which they are connected to the LED series circuit shared by the rest of the modules to which they belong.
• Figure 5B shows at least one series circuit of one or several LEDs of the same colour with one free earthed cathode and only one external connection formed by the 504 free anode, by means of which they are connected to the LED series circuit shared by the rest of the modules to which they belong.
• Figure 5C shows at least one series circuit of one or several LEDs of the same colour with a free anode connected to a 506 constant current source and only one external connection formed by the 505 free cathode, by means of which it is connected to the LED series circuit shared by the rest of the modules to which they belong. This current source has, furthermore, one 507 control input so that it can be directly enabled or disabled from the digital domain.

If, instead of employing constant current sources on the supply side, we use constant current sources on the earthed side, the configuration of figures 5B and 5C is substituted by the following:

• At least one series circuit containing one or several LEDs of the same colour with a free anode connected to the supply and only one external connection formed by a free cathode, by means of which it is connected to the LED series circuit shared by the rest of the modules to which they belong.
• At least one series circuit containing one or several LEDs of the same colour with a free cathode connected to a constant current source and only one external connection formed by a free anode, by means of which it is connected to the LED series circuit shared by the rest of the modules to which they belong. This current source has one control input so that it can be directly enabled or disabled from the digital domain.

It shall be observed how the 403 analogue digital interconnection network inside each of the 402 functional units is formed by all those lines necessary to make the connection between the mentioned 502, 503, 504 and 505 terminals of G modules comprising the said functional unit.

Second, each of the module, as can be seen in figure 6, includes a set of no (L_R+L_G+L_B)+ 603 analogue switches connected in parallel to each of the 501 LEDs. These analogue switches may be implemented by a NMOS, PMOS, PNP, NPN transistor or any valid combination of them, like for example two-way gateways (T-gates), or by any other device governed by a control inlet which allows the passage of electric current to be interrupted at will.

Third, each N·(L_R+L_G+L_B) analogue switch incorporates a 602 level adapter, in such a way that every switch is governed by the same number of digital control signals conforming the 601 digital bus; those adapters allow independent activation or deactivation of each analogue switch and therefore the individual switching on and off of each LED in the same module may be controlled from the digital domain. It shall be noted that the 507 control input of the 506 current source also forms a part of the said digital bus.

The digital network used in the invention display is explained below with the help of figure 7.

The digital bus is generated inside each module through the 702 set of N· (L_R+L_G+L_B)+S_R+S_G+S_B independent pulse width modulators. Values used by each modulator are calculated through the 703 block, from the values stored in the 704 double video memory. This memory is responsible, in the first place, for storing all pulse width modulation values corresponding to intensities represented in pixels of one same module at one specific point of time and, in the second place, for saving information regarding the pixel intensities of the next image to be represented. Finally, each module has a 705 digital interface which enables reception or transmission of information to the rest of the modules in the display through the mentioned digital interconnection network.

Figure 8 shows the process to increase the display power without increasing current consumption. This involves the use of a supply source with a set of evenly spaced multiple S supply voltage outputs like the ones represented in figure 8, each S output generating a Vi=(i +1) V voltage, where i varies from 0 to S-1. Each pair of consecutive intermediate outputs forms a new source of supply with a V value for an 803 subset of 402 functional units of G modules which form the display. Each subset is made up of the same number of Q functional units.

In order for this diagram to be efficient in practice, the net currents consumed by each supply voltage generated by the consecutive intermediate intakes must be the same or as similar as possible. If this condition is satisfied, the conductor sections of all intermediate intakes can then be reduced to a minimum value. To that end, the display can be divided into several 801 sections, each of them formed by S functional units of G modules, all these sections being identical to each other both from the physical and from the functional point of view, in a such a way that:

1. (a) intermediate voltages supplying functional units belonging to the same section all come from the same supply source,
2. (b) the perimeter of the physical space occupied by all LEDs included in each of these sections forms as compact a geometrical shape as possible,
3. (c) the control logic acting upon switching on and off times of the constant current sources of all modules in the same section ensures that the resulting consumption by these modules of S supplies are as similar to each other as possible.

A valid formula to reach this objective is to apply an identical pulse width modulation over the constant current sources of 802 modules which occupy the same position inside each of the functional units belonging to the same section. This pulse width modulation corresponds to that of the module with the highest consumption of all those occupying the same position inside the functional unit.

The following examples show different configurations which may be adopted by the functional units of the G modules. The LEDs making up a pixel contained in the one same symbol appear in all the diagrams. They can refer indistinctly either to LEDs which are physically inside the same component or to LEDs manufactured in independent capsules.

In the following examples we are going to assume that each pixel is made up of only three LEDs with the fundamental components (L_G=L_R=L_B=1) and that each module is composed of 4 pixels (N=4). We will also assume that LEDs used in this example have the following electrical parameters as shown in Table 1: Parameter Units Green Red Blue Maximum live voltage drop Volts 4 2.5 4

It has also been taken into account that, occasionally, LEDs of a specific colour component present much higher brightness than really necessary either to obtain a correct white balance or to reach the minimum brightness desired for the display. This feature can be used to increase the number of LEDs of these colour components connected in series and belonging to the same current source in such a way that the sum of all their individual live voltages can be higher than the maximum value allowed by supply voltage of the source. This is achieved by employing the modified pulse width modulation techniques described in this patent, which ensure that, at a certain point of time, all accumulated voltage drops never exceed the maximum allowed by the supply voltage. Please note that, in contrast, the maximum light intensity possible for each LED to reach is reduced proportionally to the number of additional LEDs. The advantage of increasing the number of LEDs connected in the same series circuit of a specific colour component is that the number of current sources needed by the system is reduced, thus offering a much wider range of possible configurations when the number of LEDs connected in series in each colour component is made independent with respect to the value of the supply voltage.

To evaluate this effect, a parameter known as degree of use of each colour component is defined for a specific supply voltage such as the relationship between the maximum number of LEDs allowed by the supply voltage used and the total number of LEDs connected in series to the same current source.

Please note that, in order to make interpretation easier, in the following figures, only the LEDs, constant current sources and interconnection lines have been explicitly represented. The other elements described in this patent are implicitly included into the central block of each module.

In the first example of a functional unit, this includes a 901 analogue interconnection network (figures 9A-9D) incorporating four modules (G=4), known as the "Red, Green, Green, Blue" (RGGB) setting. The current source of module 902 to the far left of figure 9A generates the supply current corresponding to all sixteen red LEDs (S_R=1, n_R=16). The current sources of the two central modules 903 and 904 each generate the supply current corresponding to a half of the sixteen green LEDs (S_G=2, n_G=8). The current source of module 905 to the far right of the figure generates the supply current corresponding to all sixteen blue LEDs (S_B=1, n_B=16). Figures 9B-9D represent the route of the current through the LEDs for each of the four current sources.

Bearing in mind the electrical specifications of the LEDs in table 1, we can obtain degrees of use of a nominal supply voltage of 32V such as the ones shown in table 2. Parameter Unit Green Red Blue Degree of use % 100 80 50

As indicated in the description of the invention, it is possible to modify this setting to work with higher voltages. In the following example we will consider we wish to establish a new supply voltage of 48V.

The first method consists of increasing the number of pixels per module in proportion to the increase of supply voltage (G=4, S_R=1, n_R=24, S_G=2, n_G=12, S_B=1, n_B=24). In this example we can achieve this objective using modules with six pixels (N=6), as represented in figure 10. The degree of use is maintained at similar values to those of the original implementation. The analogue interconnection network also remains unchanged.

The second alternative process consists of increasing the number of G modules belonging to the same analogue interconnection network in proportion to the increase of supply voltage (G=6, S_R=1, n_R=24, S_G=2, n_G=12, S_B=1, n_B=24). The additional X modules do not include any constant current source in the functional unit, as the objective is to increase only the number of LEDs connected in series to each of the existing current sources. The diagram corresponding to this setting (known as "RXGGXB") can be seen in figure 11D. The degrees of use are the same as those in the original 32V setting. The analogue interconnection network is, in this case, totally different due to the presence of two new X modules. Figures 11A-11C also show the route followed by current through the LEDs for each of the four current sources.

The next setting shown in figure 12D makes it possible to check how, by adding a second green LED to the previous functional unit (L_G=2), light intensity of, for instance, the green component (G=6, S_R=1, n_R=24, S_G=4, n_G=12, S_B=1, n_B=24) can be duplicated. This additional LED is also individually addressable, which enables the implementation of pixels based on 4 LEDs. This modification consists of replacing the two modules marked with an "X" in figure 12, which are not using any current source, by another two that do, so that the currents necessary to supply the additional green LEDs can be generated, resulting in the "RGGGGB" setting. Figures 12A-12C represent the route followed by the current through the LEDs for each of the six current sources.

As indicated in the description of this invention, an alternative method of duplicating the number of LEDs corresponding to the same colour component is to substitute them for a series circuit of two LEDs of the same colour, while, at the same time, also duplicating control elements. Figure 13A shows an example of a functional unit still using a 48V supply voltage and an analogue interconnection network made up of only 3 modules makes it possible to double the number of LEDs corresponding to the red component (G=3, S_R=1, n_R=24, S_G=1, n_G=12, S_B=1, n_B=12, L_R=2); which is what we call the "GBR" setting. Figures 13B-13D represent the route followed by the current through the LEDs for each of the four current sources. In this case, the degrees of use values are those shown in table 3. Parameter Units Green Red Blue Degree of use % 100 60 100

All previous preferential examples are based on the assumption that each module of the functional unit incorporates or enables only one source of constant current. The example in figures 14A-14B shows how it is possible to establish more than one current source in each module. These figures show a setting where each analogue interconnection network is formed by only one module, which incorporates the three constant current sources of the previous example. In this case we have a total number of twelve pixels (N=12) in each module (G=1, S_R=1, n_R=24, S_G=1, n_G=12, S_B=1, n_B=12, L_R=2).

Please note that this case is similar to that in figures 13A-13D, in the sense that the three modules have been grouped into one. The degrees of use of the previous example are also maintained.

In the digital domain, the aim pursued is, first of all, to reduce the amount of internal wiring necessary to manufacture the display to a minimum. Secondly, it must be borne in mind that industrial component assembly lines impose certain limitations as regards the maximum size of printed circuits. Therefore, it is necessary to establish a configuration which, while compatible with present manufacturing processes, makes it possible, in practice, to manufacture flexible displays of appropriate physical dimensions.

As shown in figure 3, we are going to consider a display which is made up of an a_rt 301 modules R·T bidimensional matrix, where r varies between 0 and R-1, and t varies between 0 and T-1. Figure 15A shows the preferential setting of figure 3, whose digital interconnection network is formed by a cascade connection (or daisy chain) of 1501 C_i modules, where i varies between 0 and R T-1, which works in a similar way to how a shift register would. These modules are interconnected through a diversity of 1502 point-to-point communication channels equivalent to the 302 digital interconnection network. Data input is carried out via the 1503 first channel. It is not relevant whether these communication channels are synchronous or asynchronous. Observe that, when opting for a synchronous communication system, the clock signal would be implicitly included in each of the point-to-point communication channels represented by an arrow. In this case, we would be talking about a common clock signal for all modules, regardless of whether clock digital buffers can be inserted in part of the C_i modules or not.

The choice of a cascade topology makes it possible to eliminate the need to assign a unique, physical address for each module comprising the display during it manufacture.

As already mentioned, the a_rt and C_i coefficient sets in figures 3 and 15A are bijectively related to each other, in such a way that each coefficient in figure 3 is equivalent to one and only one of the coefficients in figure 15A. This means that the physical positions of each module do not need to be spatially coincident in both network nor with the position they occupy on the chart. In fact, the particular physical route of the series circuit of all modules throughout the length and breadth of the display is not relevant from the perspective of the description of this invention.

Observe how, in the 15A figure, the possibility of being able to read C_rt-1 module data externally through the last 1504 communication channel is also contemplated, thus implementing an effective process both to transfer information about the images to the display and to receive information from the same. Also observe that the way the series circuit in the 15A figure has been described does not rule out the possibility of one part of the communication channels physically running through or around other modules, as is intended to be demonstrated by examples 15B, 15C, 15D and 15E. Note, that all examples given in figures 15A-15E are electrically equivalent to each other. The last of them enables data transmission/reception from a single point in common, at the same time simplifying the manufacturing process and minimizing internal wiring.

The most simple example of a cascade configuration is that shown in figure 16, where the series circuit runs horizontally and zigzags towards the rest of the rows. This configuration is especially interesting, since it simplifies the design of certain single-faced printed circuits. The example in figure 17 makes it possible for all vertical connections to be made on only one side of the circuit, which reduces the complexity of display assembling when the vertical connection is made by means of an additional connection element. Observe how the vertical connection can be made through any other position different from the left column with equivalent results.

The example in figure 18 shows how one of the comments from the description of the preferred setting of the invention can be applied for the data input and output to coincide in the same location while preserving the advantages of previous examples.

Figure 19 shows a variation of this concept, whereby distribution of signals corresponding to horizontal group has been simplified to the detriment of vertical connection by separating the horizontal even rows from the odd; this way, the signal goes down the first and up the second.

Please note that all examples previously described are still electrically equivalent to each other. The advantage of these configurations is that they facilitate the assembly of video displays larger than the flexible printed circuits that can be produced on industrial component assembly lines.

It is obvious that the vertical dimension of the displays may be assembled with arbitrary lengths through a simple vertical or cascade connection of the number of already manufactured panels required. However, the horizontal direction requires different solutions. Figure 20 contains one of the previous examples, chosen to illustrate this idea, but the same approach can be accomplished with any other configuration described in this patent. The process consists of placing two or more completely finished panels next to each other, either in a mirror distribution or not.

By horizontally repeating these operations as many times as necessary the effective width of the display can be multiplied. In this setting, it can also be observed how external connections are made available at the top and the bottom of the display.

In all previous examples modules belonging to each horizontal group have been arranged all along a line. However, depending on the analogue configuration and the desired external dimensions of the display, other arrangements may be used which, although physically different, are equivalent from an electrical point of view.

In fact, to reduce the complexity of the printed circuit implementing both analogue and digital interconnection networks, the interconnection lines comprising both may be laid out in such a way that they run in parallel along the same physical route.

Figures 21A-21D show the different useful alternatives in this respect. The advantages obtained with these additional configurations are, firstly, the optimization of energy performance through the spatial and more compact distribution of pixels belonging to the same current source. In the second place, we obtain a higher degree of additional freedom when it comes to establishing the final horizontal dimensions of the display. Actually, what we intend to do is to avoid the fact that these displays, as previously described, shall be necessarily made up by a diversity of G-multiple modules (number of modules in each functional unit). To illustrate this idea, figure 22 shows the physical implementation of a display whose functional units use an "RGGB" configuration with a compact arrangement. Please note how the analogue interconnection network has been represented by a thick line and the digital one by arrows.

Figure 23A shows how a the vertical, cascade and adjacent connection can be made between of many 2301 individual displays such as the ones described in this paragraph through their upper and lower external connections by forming a vertical column of 2302 displays until the intended vertical dimension is reached. A number of these display columns are then placed in a horizontal and adjacent configuration reaching in order to achieve the desired horizontal dimension as shown figure 2303. The resulting 2305 display is completed in figure 23B with the external connection of a 2304 external modular wiring allowing distribution of video information and supplying all columns of individual displays from the exterior. Observe, in figure 23C how this connection can be made from the upper and/or the lower side, as well as from the left and/or right side of the whole display set, thus allowing the final dimensions of the display to be further increased.

Inside each module there is a first group of pulse width modulators. When the supply voltage value is not high enough to simultaneously supply all n LEDs belonging to the same series circuit through the corresponding constant current source, it is necessary to use a set of modified pulse width modulations from the first group of the said pulse width modulations as described in figure 24. In this example we are assuming that only M=8 LEDs of a total of n=12 LEDs connected in series can be turned on at the same time, and that the working cycle value of the pulse width modulation applied to each of the LEDs is the same and equivalent to 3/12, that is to say, 0.25. Observe that, as a consequence of having to share the current provided by the constant current source equally among the 12 LEDs, the maximum value of the applicable working cycle is reduced, and it can vary between 0 (minimum brightness or LED turned off) and 8/12, that is to say, 0.67 (LED at maximum brightness). Figure 24A shows the original pulse width modulation, which is the same for all 12 LEDs.

Another overlapping pulse with modulation is applied over each original pulse width modulation. The frequency of the overlapping pulse width modulation is a whole, non-zero number which is E times greater than the original pulse width modulation value, while the working cycle of all overlapping pulse width modulations remains constant and with a value equal to M/n. Each overlapping pulse width modulation is applied with a constant phase difference equal to the T period of the overlapping pulse width modulation divided by the number of n LEDs connected in each series circuit.

The combined behaviour of the overlapping pulse width modulation and the original pulse width modulation equates to carrying out an AND logic of the two modulations separately, which means that, at each point of time the analogue switch only remains open (LED on) if, and only if, so indicated by both modulations at the same time, and it will remain closed (LED off) if any of the modulations establish this separately.

To illustrate the effect of the E frequency of the overlapping pulse width modulation on system performance we will submit two examples: the one in figure 24B, with the same frequency as in the original pulse width modulation (E=1), and the one in figure 24D, with a frequency four times higher (E=4).

Observe how it is necessary to independently increase the values of the original pulse width modulation working cycle for each LED, so that the resulting modified modulation keeps the LED on for a period equivalent to that of the original pulse width modulation of the initial working cycles.

When E=1, the working cycle of the first three LEDs must be increased to 7/12, and that of the last three to 4/12, 5/12 and 6/12 respectively. The resulting modified modulation can be seen in figure 24C. Observe how in this case the current source must remain on with a working cycle of 7/12, i.e., 0.58.

When E=4, the working cycle of the first three LEDs must be increased to 20/48, and that of the last three to 17/48, 18/48 and 19/48 respectively. The resulting modified modulation can be seen in figure 24E. Observe how in this case the current source must be on with a working cycle of 20/48, i.e., 0.42.

In an ideal system, the optimal working cycle for the current source would be equal to the total number n of LEDs multiplied by the initial working cycle of this example divided by the value of M, i.e. 12 x 0.25/8=0.375. This value is represented in figures 24C and 24E by the vertical dashed line. Thus, table 4 confirms how the system performance quickly approaches the optimal value at the same time as the E frequency value is increased. The performance value obtained is always higher for longer working cycles. Optimal E=4 E=1 Current source working cycle 0.375 0.42 0.58 Relative performance 100% 90% 64%

Below is a description of a non-linear pulse width modulation which makes it possible to reduce the operational frequency. This new modulation is still compatible with the use of an overlapping pulse width modulation, to efficiently and appropriately distribute current among n LEDs of a same series circuit when only M LEDs can be simultaneously on.

Figure 25A and 25B show the differences between a conventional and a non-linear pulse width modulation. The different values which can be generated in a conventional pulse width modulation are evenly spaced and have been represented in figure 25A by vertical dotted lines. For instance, in a 16 bit pulse width modulation, the number of transitions in each complete T-period of the modulation would be 65,536. However, due to the logarithmic response of human vision, only a small number of these values can really be distinguished. In the example in figure 25B a clock with a frequency which varies throughout each period of the pulse width modulation (from an initial minimum value to the maximum value, passing through the complete subset of values) has been used. The duration of each clock cycle applied to this modulation is directly proportional to each of the values obtained with the gamma correction formula.

Figure 25A shows how the number of transitions is much higher than in figure 25B. Consumption is proportional to the number of transitions, which means that consumption obtained with this new modulation is also reduced to the same extent. For instance, in the case of a non-linear pulse width modulation equivalent to 16 bits, the number of transitions and consumptions would be reduced by a factor of 256. Please note that in this case only 8 bits would be needed to encode the whole set of representable intensities.

Figure 25C contains an example of a mixed non-linear pulse width modulation applied over a circuit of n=8 LEDs where the restriction exists that only a maximum of M=5 LEDs can be on at the same point in time. In this case, each T-period of the pulse width modulation is divided into a total of 8 identical and consecutive non-linear modulations. To obtain a modulation equivalent to 16 bits, non-linear modulations must be capable of representing the set of intensities resulting from the application of the gamma correction over 65,536/8=8,192 initial values, or rather, a subset of 112 values noticeable to the human eye, which would correspond to the number of clock cycles or the number of possible values within each of the eight non-linear modulations of figure 25C. The total number of clock transitions applied would be 112x8=896, which represents a 65,536/896=73 factor reduction with respect to the frequency and consumptions corresponding to the original 16 bits linear pulse width modulation. Observe that in this case 10 bits would be required to encode the whole set of representable intensities.

A second set of overlapping pulse width modulations such as the ones described in this patent may be applied over each of the previous non-linear modulations. In this case, the overlapping pulse width modulation frequency is equal to the non-linear pulse width modulation (E=1), its working cycle being n/M=5/8 and applied with a constant and relative phase difference equal to T/8. Figure 25D shows the whole set of valid and representable values. Again, it should be borne in mind that due to the overlapping pulse width modulation, it would be necessary to independently increase the working cycle values of the original mixed non-linear pulse width modulation for each LED in a such a way that the resulting modulation keeps the LED on during a period equivalent to that of the original mixed non-linear pulse width modulation with the initial working cycles.

Finally, the example in figure 25D shows how it is possible to multiply the overlapping pulse width modulation (E=4) by four to optimize the resulting modulation performance. This time, to obtain a modulation equivalent to 16 bits, non-linear modulations must be able to represent the set of intensities resulting from the application of gamma correction over 2,048 initial values, i.e. a subset of 64 values noticeable to the human eye. Therefore, it is necessary to divide each period of the resulting pulse width modulation into a total of 32 consecutive and non-linear pulse width modulations, each of them able to represent 64 values in a non-linear way. The total number of transitions of the clock signal applied would then be equal to 32 x 64=2,048, which represents a reduction by a factor of 32 with respect to the original 16 bit linear modulation. Observe how in this case 11 bits would be required to encode the whole set of representable intensities. To optimize effectiveness, the multiple of E-value of the overlapping pulse width modulation frequency can be further increased by reducing the number of non-linear values with respect to the linear ones, by worsening the consumption improvement factor and by increasing the number of bits necessary to implement the resulting pulse width modulation.

Regarding supply sources, in this example we will show how the number of modules in the display can be doubled without significantly modifying the section of the display supply cables (or alternatively, how to divide this current by half and maintain the same number of modules). We will assume we have a supply source with two 64V and 32V outlets. The analogue configuration suggested in this example is "RGGB", which is formed, as already explained in previous examples, by an analogue interconnection network of four modules.

As can be seen in figure 26, the dashed line shows the groups of two subsets of four modules whose current consumption is balanced by the firmware governing the display. Under these conditions, the current circulating through the 32V conductor is minimal, while the section of the main earth and 64V conductors is maintained with respect to the original 32V "RGGB" configuration.

Observe how, despite using a supply source delivering voltages of up to 64V, inside each module there are never power differences higher than 32V.

With the aim of avoiding failure of one of the modules causing a malfunctioning of the rest of the other subsequent modules in the display, the communications network can not only link each module to the previous one, but also includes an additional, auxiliary connection linking each module to the module before the immediately previous one. Additionally, it incorporates a system to detect the parity of data received by both channels, so that a digital logic makes it possible to automatically switch to an auxiliary channel when parity of the main channel does not coincide with that expected. Figure 29 shows how modules are interconnected. This action effectively disconnects the previous module from the system when there is an intermittent or temporary failure in the same. To prevent alteration of the distribution order of the data between all modules it is necessary to incorporate an additional digital logic to this auxiliary channel to compensate the fact that the system is now one module short.