CROSS-REFERENCE TO RELATED APPLICATIONS
[0001] This application claims the benefit of Korean Patent Application No.
10-2012-0118083 filed on October 23, 2012, with the Korean Intellectual Property Office, the disclosure of which is incorporated
herein by reference.
BACKGROUND OF THE INVENTION
Field of the Invention
[0002] The present invention relates to an electronic circuit arrangement which is applicable
to an electronic shelf label (ESL) system and the like and having an isolated reference
electric potential from the ground for ground isolation.
Description of the Related Art
[0003] In general, an electronic shelf label (ESL) system is a system for automatically
providing merchandise information and may include a plurality of tag devices (terminals
indicating prices), a relay (e.g., a gateway) and a server.
[0004] The tags may establish a wireless network to perform wireless communication with
the relay (GW, gateway), and the relay may perform wired or wireless communication
with the server.
[0005] The tag devices of such an electronic shelf label system may include a plurality
of circuit chips and communication chips.
[0006] As the technology of semiconductor processing evolves, line widths are getting smaller
and most communication chips are fabricated as system on chips (SOCs). In addition,
analog and digital circuits are integrated into a single chip. The biggest problem
arising in the case of analog and digital circuits being integrated into a single
chip is power noise.
[0007] In particular, in a voltage-controlled oscillator generating frequencies, noise generated
in a power source directly causes phase noise to be lowered. For this reason, the
power source of a voltage controlled oscillator is physically separated from the power
sources of other circuits.
[0008] Often, in order to reduce clock noise in a digital circuit, a guard ring or a deep
N well is used for reducing power noise coming through a substrate.
[0009] In order to reduce noise between circuits, it is common to use separate independent
power sources.
[0010] However, the increased number of independent power sources results in an increased
chip size, and isolation between blocks may not be obtained unless the ground is isolated.
[0011] Further, although a method of using a guard ring to reduce noise between blocks is
effective, provided that the guard ring is thick and a spacing distance is sufficient,
providing a guard ring for each block increases the number of the guard rings used
and thus a chip area may be increased.
[0012] Patent Document 1 relates to a mike circuit and discloses separated ground, but does
not disclose a circuit having a separated reference electric potential for ground
isolation.
[Related Art Document]
[0013]
(Patent Document 1) Korean Patent Laid-Open Publication No. 10-2005-0028587
SUMMARY OF THE INVENTION
[0014] An aspect of the present invention provides an electronic circuit arrangement having
a reference electric potential isolated from a ground for ground isolation.
[0015] According to an aspect of the present invention, there is provided an electronic
circuit arrangement including: a first circuit part disposed between a supply voltage
node and a ground node and using the supply voltage as an operating voltage thereof
so as to provide a predetermined reference voltage; and a second circuit part disposed
between the supply voltage node and the reference voltage node and using a difference
voltage between the supply voltage and the reference voltage as an operating voltage
thereof.
[0016] The first circuit part may generate the reference voltage to be lower than the supply
voltage and higher than the ground potential.
[0017] The first circuit part may include a regulator generating the predetermined reference
voltage so that the difference voltage corresponds to the rated voltage of the second
circuit part.
[0018] The second circuit part may use the reference voltage as a reference electric potential.
[0019] The second circuit part may include a voltage-controlled oscillator generating a
predetermined oscillation signal by using the difference voltage as an operating voltage
thereof.
BRIEF DESCRIPTION OF THE DRAWINGS
[0020] The above and other aspects, features and other advantages of the present invention
will be more clearly understood from the following detailed description taken in conjunction
with the accompanying drawings, in which:
FIG. 1 is a block diagram of an electronic circuit arrangement according to an embodiment
of the present invention;
FIG. 2 is a block diagram in which an electronic circuit arrangement according to
an embodiment of the present invention is implemented; and
FIGS. 3 and 4 are graphs showing phase noise characteristics.
DETAILED DESCRIPTION OF THE INVENTION
[0021] Hereinafter, embodiments of the present invention will be described in detail with
reference to the accompanying drawings. The invention may, however, be embodied in
many different forms and should not be construed as being limited to the embodiments
set forth herein. Rather, these embodiments are provided so that this disclosure will
be thorough and complete, and will fully convey the scope of the invention to those
skilled in the art. Throughout the drawings, the same or like reference numerals will
be used to designate the same or like elements.
[0022] FIG. 1 is a block diagram of an electronic circuit arrangement according to an embodiment
of the present invention.
[0023] Referring to FIG. 1, the electronic circuit arrangement according to the embodiment
of the present invention may include a first circuit part 100 and a second circuit
part 200.
[0024] The first circuit part 100 has the ground as its reference electric potential, while
the second circuit part 200 does not have the ground but has the reference voltage
Vref provided from the first circuit part 100 as its reference electric potential.
[0025] The first circuit part 100 is disposed between the supply voltage Vdd node and the
ground node so that it may provide a predetermined reference voltage Vref to the reference
electric potential node of the second circuit part 200 using the supply voltage Vdd
as the operating voltage.
[0026] The second circuit part 200 is disposed between the supply voltage Vdd node and the
reference voltage Vref node so that it may use the difference voltage Vdif between
the supply voltage Vdd and the reference voltage Vref as the operating voltage.
[0027] If the reference electric potential node of the second circuit part 200 is connected
to the ground as in the related art, the first and second circuit parts 100 and 200
share the ground so that they are influenced by phase noise through the ground.
[0028] In contrast, according to the embodiment of the present invention, the reference
electric potential node of the second circuit part 200 is connected not to the ground
but to the reference voltage Vref node in order to receive the reference voltage Vref
provided from the first circuit part 100.
[0029] FIG. 2 is a block diagram in which an electronic circuit arrangement according to
an embodiment of the present invention is implemented.
[0030] Referring to FIG. 2, the first circuit part 100 may generate the reference voltage
Vref lower than the supply voltage Vdd and higher than the ground potential.
[0031] The first circuit part 100 may include a regulator that generates the predetermined
reference voltage Vref such that the difference voltage Vdif corresponds to the rated
voltage of the second circuit part 200.
[0032] For example, assuming that the supply voltage Vdd is 3.0 V and the rated voltage
of the second circuit part 200 is 1.8 V, in case that the first circuit part 100 is
a regulator, the regulator is operated by the supply voltage Vdd of 3.0 V, generates
the reference voltage Vref of 1.2 V, and provides it to the reference electric potential
node of the second circuit part 200.
[0033] The second circuit part 200 may be configured to use the reference voltage Vref as
the reference electric potential.
[0034] The second circuit part 200 may include a voltage-controlled oscillator VCO that
uses the difference voltage Vdif as the operating voltage to generate a predetermined
oscillation signal.
[0035] For example, assuming that the supply voltage Vdd is 3.0 V and the rated voltage
of the second circuit part 200 is 1.8 V, in case that the second circuit part 200
is a voltage-controlled oscillator VCO, the voltage-controlled oscillator VCO uses
1.8 V as the operating voltage which is the difference voltage Vdif between the supply
voltage Vdd of 3.0 V and the reference voltage Vref of 1.2 V from the first circuit
part 100.
[0036] The voltage-controlled oscillator VCO may use the difference voltage Vdif of 1.8
V as the operating voltage so as to generate a predetermined oscillation signal.
[0037] As described above, the embodiment of the present invention is designed to use a
certain voltage as the reference electric potential instead of the lowest voltage
GND which is vulnerable to noise. This design enables a power source to be connected
to the main power of a chip so that a power noise source can be prevented. In addition,
since there is a difference between the ground GND and the ground GND of other circuit
blocks, it is resistant to noise of other circuit blocks.
[0038] Moreover, since the regulator does not have any load current so that no amplifier
for amplitude or gain is necessary, and no large capacitor for stabilizing is required,
it is not necessary to lead the output line of the regulator out of a chip so that
I/O of the chip may be efficiently utilized. Further, the range of the operating voltage
of the voltage-controlled oscillator VCO may be widened by designing the circuit to
be varied according to the supply voltage Vdd.
[0039] FIGS. 3 and 4 are graphs showing phase noise characteristics.
[0040] FIG. 3 is a graph showing phase noise in a case that the supply voltage Vdd is 2.0
V and the second circuit part 200 is a voltage-controlled oscillator, and FIG. 4 is
a graph showing phase noise in a case that the supply voltage Vdd is 3.0 V and the
second circuit part 200 is a voltage-controlled oscillator.
[0041] As can be seen from FIGS. 3 and 4, the voltage-controlled oscillator according to
the embodiment of the present invention exhibits an excellent phase noise of 100 dBc/Hz
or less even with a higher operating voltage or a lower supply voltage, regardless
of the number of capacitors used.
[0042] As set forth above, according to embodiments of the present invention, power noise
source can be blocked by way of using a reference electric potential separated from
the ground for ground isolation, and thereby isolation between the ground and the
reference electric potential can be obtained.
[0043] While the present invention has been shown and described in connection with the embodiments,
it will be apparent to those skilled in the art that modifications and variations
can be made without departing from the spirit and scope of the invention as defined
by the appended claims.
1. An electronic circuit arrangement comprising:
a first circuit part disposed between a supply voltage node and a ground node and
using the supply voltage as an operating voltage thereof so as to provide a predetermined
reference voltage; and
a second circuit part disposed between the supply voltage node and the reference voltage
node and using a difference voltage between the supply voltage and the reference voltage
as an operating voltage thereof.
2. The arrangement of claim 1, wherein the first circuit part generates the reference
voltage to be lower than the supply voltage and higher than the ground potential.
3. The arrangement of claim 1, wherein the first circuit part includes a regulator generating
the predetermined reference voltage so that the difference voltage corresponds to
the rated voltage of the second circuit part.
4. The arrangement of claim 1, wherein the second circuit part uses the reference voltage
as a reference electric potential.
5. The arrangement of claim 1, wherein the second circuit part includes a voltage-controlled
oscillator generating a predetermined oscillation signal by using the difference voltage
as an operating voltage thereof.