TECHNICAL FIELD
[0001] The present disclosure relates to AMOLED field, in particular to an AMOLED driving
and compensating circuit and method, and AMOLED display device.
BACKGROUND
[0002] Active Matrix Organic Light Emitting Diode (AMOLED) can emit light, when the AMOLED
is driven by a driving current produced from a driving thin film transistor in a driving
circuit. However, as the change of time, threshold voltage of the driving thin film
transistor may change. As a result, when the same grayscale voltage is input, the
driving current produced is inconsistent, such that luminance of the driven AMOLED
is different. At present, a major method for solving the problem is to add a compensating
circuit to eliminate an effect of the threshold voltage, so as to achieve a consistent
driving current and improve luminance uniformity of the AMOLED.
[0003] In a process of implementing the present disclosure, the inventor finds that the
prior art has at least the below problem:
[0004] The existing AMOLED compensating circuit often needs five or six thin film transistors
to be set inside the same pixel region, which thus may reduce aperture ratio.
SUMMARY
[0005] An embodiment of the present disclosure provides an AMOLED driving and compensating
circuit and method, and AMOLED display device, being capable of increasing aperture
ratio.
[0006] According to the embodiment of the present disclosure, provided is an AMOLED driving
and compensating circuit, comprising:
[0007] Several driving circuits set inside several pixel regions used for driving several
AMOLEDs, wherein one AMOLED and one corresponding driving circuit are set inside each
of pixel regions, and one driving circuit is used for driving one corresponding AMOLED;
[0008] An external compensating circuit set outside the pixel regions used for eliminating
an effect of threshold voltage of driving thin film transistors in the several driving
circuits set inside the several pixel regions on driving currents passing through
the driving thin film transistors.
[0009] In one example, each of the several driving circuits set inside the several pixel
regions comprising: a first thin film transistor, a driving capacitor and a driving
thin film transistor;
[0010] The first thin film transistor has a source connected to a data line;
[0011] The driving capacitor has a first terminal connected to a drain of the first thin
film transistor; and
[0012] The driving thin film transistor has a gate connected to the drain of the first thin
film transistor,
[0013] Wherein an input terminal of the AMOLED corresponding to the driving circuit is connected
to an output terminal of operating voltage, and an output terminal of the AMOLED corresponding
to the driving circuit is connected to a drain of the driving thin film transistor;
[0014] The first thin film transistor and the driving thin film transistor are n-channel
thin film transistors;
[0015] In one example, the external compensating circuit set outside the pixel regions comprises:
a second thin film transistor, a third thin film transistor, a compensating capacitor,
a fourth thin film transistor, a fifth thin film transistor, a sixth thin film transistor
and a seventh thin film transistor;
[0016] The second thin film transistor has a source connected to ground, a gate connected
to a second clock signal output terminal, and a drain connected to a second terminal
of the driving capacitor;
[0017] The third thin film transistor has a source connected to the drain of the second
thin film transistor, and a gate connected to the second clock signal output terminal;
[0018] The compensating capacitor has a first terminal connected to a drain of the third
thin film transistor;
[0019] The fourth thin film transistor has a source connected to a second terminal of the
compensating capacitor, a gate connected to the second clock signal output terminal,
and a drain connected to a source of the driving thin film transistor;
[0020] The fifth thin film transistor has a source connected to ground, a gate connected
to a first clock signal output terminal, and a drain connected to the source of the
fourth thin film transistor;
[0021] The sixth thin film transistor has a source connected to a reference voltage output
terminal, a gate connected to the first clock signal output terminal, and a drain
connected to the drain of the second thin film transistor;
[0022] The seventh thin film transistor has a source connected to the reference voltage
output terminal, a gate connected to the first clock signal output terminal, and a
drain connected to the gate of the driving thin film transistor; and
[0023] A gate of the first thin film transistor is connected to the second clock signal
output terminal,
[0024] Wherein the second thin film transistor, the sixth thin film transistor and the seventh
thin film transistor are n-channel thin film transistors;
[0025] The third thin film transistor, the fourth thin film transistor and the fifth thin
film transistor are p-channel thin film transistors.
[0026] In one example, both a first clock signal at the first clock signal output terminal
and a second clock signal at the second clock signal output terminal comprise a first
phase, a second phase and a third phase;
[0027] At the first phase, the first clock signal output terminal is at high level, and
the second clock signal output terminal is at low level;
[0028] At the second phase, the first clock signal output terminal is at low level, and
the second clock signal output terminal is at high level;
[0029] At the third phase, the first clock signal output terminal is at low level, and the
second clock signal output terminal is at low level.
[0030] In one example, at the first phase, the third thin film transistor, the fourth thin
film transistor, the sixth thin film transistor and the seventh thin film transistor
in the external compensating circuit turn on, and the first thin film transistor in
each of the driving circuits and the second thin film transistor and the fifth thin
film transistor in the external compensating circuit turn off, such that voltage difference
over the compensating capacitor becomes the threshold voltage of the driving thin
film transistor;
[0031] At the second phase, the third thin film transistor, the fourth thin film transistor,
the sixth thin film transistor and the seventh thin film transistor in the external
compensating circuit turn off, and the first thin film transistor in each of the driving
circuits and the second thin film transistor and the fifth thin film transistor in
the external compensating circuit turn on, such that the voltage difference over the
driving capacitor in each of the driving circuits becomes a grayscale voltage input
from a data line corresponding to the driving circuit; and
[0032] At the third phase, the third thin film transistor, the fourth thin film transistor,
and the fifth thin film transistor in the external compensating circuit turn on, and
the first thin film transistor in each of the driving circuits and the second thin
film transistor, the sixth thin film transistor and the seventh thin film transistor
in the external compensating circuit turn off, such that the gate voltage of the driving
thin film transistor in the driving circuit jumps to a sum of the threshold voltage
of the driving thin film transistor and the grayscale voltage input from the data
line corresponding to the driving circuit.
[0033] According to an embodiment of the present disclosure, further provided is an AMOLED
driving and compensating method, comprising:
[0034] A first phase, storing a threshold voltage of driving thin film transistors of several
driving circuits set inside several pixel regions;
[0035] A second phase, storing a grayscale voltage of each of the several driving circuits
set inside the several pixel regions;
[0036] A third phase, a gate voltage of the driving thin film transistor of each of the
several driving circuits set inside the several pixel regions jumping to a sum of
the threshold voltage and the grayscale voltage of the driving circuit.
[0037] In one example, at the first phase, storing the threshold voltage of the driving
thin film transistors of the several driving circuits set inside the several pixel
regions is:
[0038] A first clock signal output terminal is at high level, a second clock signal output
terminal is at low level, a third thin film transistor, a fourth thin film transistor,
a sixth thin film transistor and a seventh thin film transistor in a compensating
circuit turn on, a first thin film transistor in each of the driving circuits and
a second thin film transistor and a fifth thin film transistor in the compensating
circuit turn off, and voltage difference over a compensating capacitor becomes the
threshold voltage of the driving thin film transistors of the several driving circuits
set inside the several pixel regions;
[0039] At the second phase, storing the grayscale voltage of each of the several driving
circuits set inside the several pixel regions is:
[0040] The first clock signal output terminal is at low level, the second clock signal output
terminal is at high level, the third thin film transistor, the fourth thin film transistor,
the sixth thin film transistor and the seventh thin film transistor in the compensating
circuit turn off, the first thin film transistor in each of the driving circuits and
the second thin film transistor and the fifth thin film transistor in the compensating
circuit turn on, and the voltage difference over the compensating capacitor in each
of the driving circuits becomes the grayscale voltage input from the data line corresponding
to the driving circuit;
[0041] At the third phase, the gate voltage of the driving thin film transistor of each
of the several driving circuits set inside the several pixel regions jumping to the
sum of the threshold voltage and the grayscale voltage of the driving circuit is:
[0042] The first clock signal output terminal is at low level, the second clock signal output
terminal is at low level, the third thin film transistor, the fourth thin film transistor
and the fifth thin film transistor in the compensating circuit turn on, the first
thin film transistor in each of the driving circuits and the second thin film transistor,
the sixth thin film transistor and the seventh thin film transistor in the compensating
circuit turn off, and the gate voltage of the driving thin film transistor in each
of the several driving circuits set inside the several pixel regions jumps to the
sum of the threshold voltage and the grayscale voltage of the driving circuit.
[0043] A display device comprising the AMOLED driving and compensating circuit.
[0044] The AMOLED driving and compensating circuit and method provided in the embodiment
of the present disclosure, due to an external compensating circuit set outside pixel
regions, is capable of simultaneously compensating threshold voltage of driving thin
film transistors of several driving circuits inside the pixel regions, and there is
only a driving circuit used for driving the AMOLED in each of the pixel regions, so
that aperture ratio is increased.
BRIEF DESCRIPTION OF THE DRAWINGS
[0045] In order to more clearly specify the technical solution in the embodiment of the
present disclosure or the prior art, below will be a brief introduction of drawings
needed to be used in descriptions of the embodiment or the prior art. Obviously, the
drawings in the below descriptions are merely some embodiments of the present disclosure.
For those ordinarily skilled in the art, they may obtain other drawings in the light
of these drawings, without paying any inventive labor.
Fig.1 is a circuit diagram of an AMOLED driving and compensating circuit provided
in the embodiments of the present disclosure;
Fig.2 is a timing sequence diagram of the clock signal of the circuit in Fig. 1;
Fig.3 is an equivalent circuit diagram of the circuit in Fig. 1 at a first phase;
Fig. 4 is an equivalent circuit diagram of the circuit in Fig. 1 at a second phase;
Fig. 5 is an equivalent circuit diagram of the circuit in Fig. 1 at a third phase;
Fig. 6 is a circuit diagram of another AMOLED driving and compensating circuit provided
in the embodiments of the present disclosure;
Fig. 7 is a flow chart of an AMOLED driving and compensating method provided in the
embodiments of the present disclosure;
DETAILED DESCRIPTION
[0046] The technical solution in the embodiments of the present disclosure will be clearly
and completely described by combining with the accompanying drawings in the embodiments
of the present disclosure. Obviously, the embodiments described are merely a portion
of the embodiments of the present disclosure, rather than all embodiments. Based on
the embodiments in the present disclosure, all the other embodiments obtained by those
ordinarily skilled in the art without paying any inventive labor belong to the scope
sought for protection in the present disclosure.
[0047] One embodiment of the present disclosure provides an AMOLED driving and compensating
circuit, comprising:
[0048] Several driving circuits set inside several pixel regions used for driving several
AMOLEDs, wherein one AMOLED and one corresponding driving circuit are set inside each
of the pixel regions, and one driving circuit is used for driving one corresponding
AMOLED;
[0049] Each of the driving circuits, such as a traditional 2T1C (two thin film transistors
and one capacitor) circuit, comprises a first thin film transistor, a driving thin
film transistor and a driving capacitor, a driving current passing through the driving
thin film transistor drives the AMOLED to emit light;
[0050] An external compensating circuit set outside the pixel regions used for eliminating
an effect of threshold voltage of the driving thin film transistors in the several
driving circuits set inside the pixel regions on driving currents passing through
the driving thin film transistors, such that the driving current passing through the
driving thin film transistor is irrelevant to threshold voltage of the driving thin
film transistor, thus improving consistency of the driving current.
[0051] Besides the driving circuit, the prior art further needs to set, in each of the pixel
regions, a compensating circuit composed of five to six thin film transistors, while
the AMOLED driving and compensating circuit provided in the embodiment of the present
disclosure, due to the external compensating circuit set outside the pixel regions,
is capable of simultaneously compensating the threshold voltage of the driving thin
film transistors of the several driving circuit inside the pixel regions, and there
is only the driving circuit for driving the AMOLED in each of the pixel regions, so
that aperture ratio is increased.
[0052] In particular, as shown in Fig. 1, a row of pixel regions comprises N pixel regions
Pixel_1, Pixel_2, ..., Pixel_N, wherein N is a natural number larger than 1. One AMOLED
and one corresponding driving circuit are respectively set in each of the pixel regions.
[0053] In each of the pixel regions, the driving circuit comprises: a first thin film transistor
T1, a driving capacitor Cst and a driving thin film transistor T8; wherein the first
thin film transistor T1 has a source connected to a data line; the driving capacitor
Cst has a first terminal connected to a drain of the first thin film transistor T1;
and the driving thin film transistor T8 has a gate connected to the drain of the first
thin film transistor T1. In addition, in each of the pixel regions, the anode of the
AMOLED is connected to an output terminal of operating voltage, in particular, the
voltage source VDD, and the cathode of AMOLED is connected to a drain of the driving
thin film transistor T8 of the driving circuit set inside the pixel region. The first
thin film transistor and the driving thin film transistor are n-channel thin film
transistors.
[0054] In addition, sources of N first thin film transistors T1 inside N pixel regions are
respectively connected to N data lines Data1, Data2, ..., DataN.
[0055] The external compensating circuit set outside the pixel regions comprises: a second
thin film transistor T2, a third thin film transistor T3, a compensating capacitor
Cth, a fourth thin film transistor T4, a fifth thin film transistor T5, a sixth thin
film transistor T6 and a seventh thin film transistor T7; wherein the second thin
film transistor T2 has a source connected to ground, a gate connected to a second
clock signal output terminal C1, and a drain connected to a second terminal of the
driving capacitor Cst; the third thin film transistor T3 has a source connected to
the drain of the second thin film transistor T2, and a gate connected to the second
clock signal output terminal C1; the compensating capacitor Cth has a first terminal
connected to a drain of the third thin film transistor T3; the fourth thin film transistor
T4 has a source connected to a second terminal of the compensating capacitor Cth,
a gate connected to the second clock signal output terminal C1, and a drain connected
to a source of the driving thin film transistor T8; the fifth thin film transistor
T5 has a source connected to ground, a gate connected to a first clock signal output
terminal G1, and a drain connected to the source of the fourth thin film transistor
T4; the sixth thin film transistor T6 has a source connected to a reference voltage
output terminal VREF, a gate connected to the first clock signal output terminal G1,
and a drain connected to the drain of the second thin film transistor T2; the seventh
thin film transistor T7 has a source connected to the reference voltage output terminal
VREF, a gate connected to the first clock signal output terminal G1, and a drain connected
to the gate of the driving thin film transistor T8; and a gate of the first thin film
transistor T1 is connected to the second clock signal output terminal C1. The second
thin film transistor T2, the sixth thin film transistor T6 and the seventh thin film
transistor T7 are n-channel thin film transistors; the third thin film transistor
T3, the fourth thin film transistor T4 and the fifth thin film transistor T5 are p-channel
thin film transistors.
[0056] Further, as show in Fig. 2, both a first clock signal g1 at the first clock signal
output terminal G1 and a second clock signal c1 at the second clock signal output
terminal C1 comprise a first phase H1, a second phase H2 and a third phase H3; at
the first phase H1, the first clock signal output terminal G1 is at high level, and
the second clock signal output terminal C1 is at low level; at the second phase H2,
the first clock signal output terminal G1 is at low level, and the second clock signal
output terminal C1 is at high level; at the third phase H3, the first clock signal
output terminal G1 is at low level, and the second clock signal output terminal C1
is at low level;
[0057] Detailed description will be given to the present solution below with reference to
the charging process of a row of pixels. As shown in Fig. 1, it is prescribed that:
a first terminal of the compensating capacitor Cth connected to the third thin film
transistor T3 is a first node A; a second terminal of the compensating capacitor Cth
connected to the fourth thin film transistor T4 is a second node B; a first terminal
of the driving capacitor Cst connected to the first thin film transistor T1 is a third
node C; a second terminal of the driving capacitor Cst connected to the second thin
film transistor T2 is a fourth node D.
[0058] The first phase H1 is a precharge phase. At this time, the first clock signal output
terminal G1 is at high level, the second clock signal output terminal C1 is at low
level, the third thin film transistor T3, the fourth thin film transistor T4, the
sixth thin film transistor T6 and the seventh thin film transistor T7 in the compensating
circuit turn on, and the first thin film transistor T1 in each of the driving circuits
and the second thin film transistor T2 and the fifth thin film transistor T5 in the
compensating circuit turn off. At this time, the circuit is equivalent to the circuit
as shown in Fig. 3. The reference voltage output terminal VREF charges the compensating
capacitor Cth, such that the voltage of the first node A is the reference voltage
Vref at the reference voltage output terminal VREF, and the voltage of the second
node B is a difference of the reference voltage Vref and the threshold reference Vth
of the driving thin film transistor T8, i.e., Vref-Vth. That is, the voltage difference
over the compensating capacitor Cth is the threshold voltage Vth of the driving thin
film transistor T8. It should be noted that, it is necessary for the driving thin
film transistors T8 inside the row of pixel regions to be produced by adopting the
same technique, so as to guarantee the threshold voltage of each of the driving thin
film transistors T8 in the row to be the same and equal to Vth.
[0059] The second phase H2 is a grayscale voltage input phase. At this time, the first clock
output terminal G1 is at low level, the second clock signal output terminal C1 is
at high level, the third thin film transistor T3, the fourth thin film transistor
T4, the sixth thin film transistor T6 and the seventh thin film transistor T7 in the
compensating circuit turn off, and the first thin film transistor T1 in each of the
driving circuits and the second thin film transistor T2 and the fifth thin film transistor
T5 in the compensating circuit turn on. At this time, the circuit is equivalent to
the circuit as shown in Fig. 4. Below is a specification of the present solution by
taking the operating principle of the driving circuit inside one pixel region Pixel_1
as an example. The data line Data1 charges the driving capacitor Cst, such that the
voltage of the third node C is the grayscale voltage Vdata1 input from the data line
Data1, and the voltage of the fourth node D is zero. That is, the voltage difference
over the driving capacitor Cst is the grayscale voltage Vdata1 input from the data
line Data1.
[0060] The third phase H3 is a light emitting phase. At this time, the first clock output
terminal G1 is at low level, the second clock signal output terminal C1 is at low
level, the third thin film transistor T3, the fourth thin film transistor T4, and
the fifth thin film transistor T5 in the compensating circuit turn on, and the first
thin film transistor T1 in each of the driving circuits and the second thin film transistor
T2, the sixth thin film transistor T6 and the seventh thin film transistor T7 in the
compensating circuit turn off. At this time, the circuit is equivalent to the circuit
as shown in Fig. 5. The second node B is connected to ground and the voltage thereof
is zero. Since at the first phase H1, the voltage difference stored on the compensating
capacitor Cth is the threshold voltage Vth of the driving thin film transistor T8,
thus at the third phase H3, the voltage of the first node A, i.e., the fourth node
D, is the threshold voltage Vth of the driving thin film transistor T8; and since
at the second phase H2, taking the driving circuit inside the pixel region Pixel_1
as an example, the voltage difference over the driving capacitor Cst is the grayscale
voltage Vdata1 input from the data line Data1; thus at the third phase H3, still taking
the driving circuit inside the pixel region Pixel_1 as an example, the voltage of
the third node C jumps to the sum of the threshold voltage Vth of the driving thin
film transistor T8 and the grayscale voltage Vdata1 input from the data line Data1,
being Vth+Vdata1, that is, the gate voltage Vgs of the driving thin film transistor
T8 is Vth+Vdata1, and the driving current passing through the driving thin film transistor
T8 is:

[0061] Wherein k=µeff× Cox× (W/L)/2, µeff represents effective carrier mobility of the driving
thin film transistor T8, Cox represents the gate insulation dielectric constant of
the driving thin film transistor T8, and W/L represents the channel width to length
ratio of the driving thin film transistor T8.
[0062] According to the equation described above, the driving current I passing through
the driving thin film transistor T8 is irrelevant to the threshold voltage Vth thereof,
and the effect of the threshold voltage Vth of the driving thin film transistor T8
on the driving current I passing through the driving thin film transistor T8 is eliminated.
[0063] The reference voltage output terminal may be the power supply terminal VDD. The time
for the first phase H1 and the second phase H2 is relatively short, while the time
for the third phase H3 is relatively long for making the AMOLED emit light to be displayed.
[0064] The equation of the driving current in the prior art commonly comprises the power
supply voltage Vdd of the power supply terminal VDD. The change of the power supply
voltage Vdd due to the voltage drop (IR drop) will further influence the display effect
of the AMOLED, while the equation of the driving current in the embodiment of the
present disclosure does not comprise the power supply voltage Vdd of the power supply
terminal VDD, so as to further improve the consistency of the driving current by eliminating
the effect of IR Drop.
[0065] The operating principle of the driving circuits inside each of the pixel regions
in a row is the same as that of the driving circuit inside one pixel region Pixel_1,
details omitted.
[0066] In short, for the driving circuit inside the i
th pixel region Pixel_i (i is a natural number more than 1 and less than or equal to
N) in the N pixel regions Pixel_1, Pixel_2, ..., Pixel_N, at the second phase H2,
the voltage difference over the driving capacitor Cst is the grayscale voltage Vdatai
input from the data line Datai, and at the third phase H3, the voltage of the third
node C jumps to the sum of the threshold voltage Vth of the driving thin film transistor
T8 and the grayscale voltage Vdatai input from the data line Datai, being Vth+Vdatai,
that is, the gate voltage Vgs of the driving thin film transistor T8 is Vth+Vdatai,
and the driving current passing through the driving thin film transistor T8 is:

[0067] Above is a detailed description of the present solution merely in the charging process
of a row of pixel regions. As shown in Fig. 6, for m rows of pixel regions, an AMOLED
driving and compensating circuit can be formed by setting, outside the respective
m rows of pixel regions, m external compensating circuits corresponding thereto. The
AMOLED driving and compensating circuit comprises: m first clock signal output terminals
G1, G2, ..., Gm; m second clock signal output terminals C1, C2, ..., Cm, wherein m
is a natural number larger than 1. The connecting relationship and operating principle
of the AMOLED driving and compensating circuit is the same as the embodiment described
above, details omitted.
[0068] The AMOLED driving and compensating circuit provided in the embodiment of the present
disclosure makes the external compensating circuit outside a row of pixel region simultaneously
compensate the threshold voltage of the driving thin film transistors of the several
driving circuit inside the row of pixel regions, and there is only the driving circuit
for driving the AMOLED in each of the pixel regions, so as to increase the aperture
ratio.
[0069] The embodiment of the present disclosure further provides an AMOLED driving and compensating
method which is applied to the AMOLED driving and compensating circuit provided in
the above embodiment, as shown in Fig. 7, comprising:
[0070] Step 101, at the first phase, storing the threshold voltage of the driving thin film
transistors of several driving circuits set inside several pixel regions;
[0071] Step 102, at the second phase, storing the grayscale voltage of each of the several
driving circuits set inside the several pixel regions;
[0072] Step 103, at the third phase, the gate voltage of the driving thin film transistor
of each of the several driving circuits set inside the several pixel regions jumping
to the sum of the threshold voltage and the grayscale voltage of the driving circuit.
[0073] The AMOLED driving and compensating method provided in the embodiment of the present
disclosure, due to the external compensating circuit set outside the pixel region,
simultaneously compensates the threshold voltage of the driving thin film transistors
of several driving circuit inside the pixel regions, and there is only a driving circuit
for driving the AMOLED in each of the pixel regions, so as to increase the aperture
ratio.
[0074] At the first phase, storing the threshold voltage of the driving thin film transistors
of the several driving circuits set inside the several pixel regions particularly
is:
[0075] The first clock signal output terminal is at high level, the second clock output
terminal signal is at low level, the third thin film transistor, the fourth thin film
transistor, the sixth thin film transistor and the seventh thin film transistor in
the compensating circuit turn on, the first thin film transistor in each of the driving
circuits and the second thin film transistor and the fifth thin film transistor in
the compensating circuit turn off, and voltage difference over the compensating capacitor
is the threshold voltage of the driving thin film transistors of the several driving
circuits set inside the several pixel regions;
[0076] At the second phase, storing the grayscale voltage of each of the several driving
circuits set inside the several pixel regions particularly is:
[0077] The first clock signal output terminal is at low level, the second clock signal output
terminal is at high level, the third thin film transistor, the fourth thin film transistor,
the sixth thin film transistor and the seventh thin film transistor in the compensating
circuit turn off, the first thin film transistor in each of the driving circuits and
the second thin film transistor and the fifth thin film transistor in the compensating
circuit turn on, and the voltage difference over the compensating capacitor in each
of the driving circuits is the grayscale voltage input from the data line corresponding
to the driving circuit;
[0078] At the third phase, the gate voltage in the driving thin film transistor of each
of the several driving circuits set inside the several pixel regions jumping to the
sum of the threshold voltage and the grayscale voltage of the driving circuit particularly
is:
[0079] The first clock signal output terminal is at low level, the second clock signal output
terminal is at low level, the third thin film transistor, the fourth thin film transistor
and the fifth thin film transistor in the compensating circuit turn on, the first
thin film transistor in each of the driving circuits and the second thin film transistor,
the sixth thin film transistor and the seventh thin film transistor in the compensating
circuit turn off, and the gate voltage of the driving thin film transistor in each
of the several driving circuits set inside the several pixel regions jumps to the
sum of the threshold voltage and the grayscale voltage of the driving circuit.
[0080] The particular operating principle of the AMOLED driving and compensating method
provided in the embodiment of the present invention is the same as the embodiment
described above, details omitted.
[0081] The external compensating circuit set outside the pixel regions simultaneously compensates
the threshold voltage of the driving thin film transistors of several driving circuits
inside the pixel regions, and there is only the driving circuit for driving the AMOLED
in each of the pixel regions, so as to increase the aperture ratio.
[0082] The embodiment of the present disclosure further provides a display device, comprising
the AMOLED driving and compensating circuit described above. The corresponding driving
and compensating method and the operating principle are the same as the embodiment
described above, details omitted.
[0083] The external compensating circuit set outside the pixel region simultaneously compensates
the threshold voltage of the driving thin film transistors of several driving circuits
inside the pixel regions, and there is only the driving circuit for driving the AMOLED
in each of the pixel regions, so as to increase the aperture ratio.
[0084] The above are described in details the embodiment of the present disclosure, however,
the scope sought for protection in the present disclosure is not limited thereto.
Any modification or replacement within the technical scope disclosed in the present
disclosure easily conceived by those skilled in the art should be considered as falling
into the protection scope of the present disclosure. Therefore, the scope sought for
protection in the present disclosure should be subject to the scope sought for protection
in the Claims.
1. An AMOLED driving and compensating circuit, comprising:
several driving circuits set inside several pixel regions used for driving several
AMOLEDs, wherein one AMOLED and one corresponding driving circuit are set inside each
of the pixel regions, and one driving circuit is used for driving one corresponding
AMOLED;
an external compensating circuit set outside the pixel regions used for eliminating
an effect of threshold voltage of driving thin film transistors in the several driving
circuits set inside the several pixel regions on driving currents passing through
the driving thin film transistors.
2. The AMOLED driving and compensating circuit as claimed in claim 1, wherein,
each of the several driving circuits set inside the several pixel regions comprises:
a first thin film transistor, a driving capacitor and a driving thin film transistor;
the first thin film transistor has a source connected to a data line;
the driving capacitor has a first terminal connected to a drain of the first thin
film transistor; and
the driving thin film transistor has a gate connected to the drain of the first thin
film transistor,
wherein an input terminal of the AMOLED corresponding to the driving circuit is connected
to an output terminal of operating voltage, and an output terminal of the AMOLED corresponding
to the driving circuit is connected to a drain of the driving thin film transistor;
the first thin film transistor and the driving thin film transistor are n-channel
thin film transistors.
3. The AMOLED driving and compensating circuit as claimed in claim 1 or 2, wherein, the
external compensating circuit set outside the pixel regions comprises:
a second thin film transistor, a third thin film transistor, a compensating capacitor,
a fourth thin film transistor, a fifth thin film transistor, a sixth thin film transistor
and a seventh thin film transistor;
the second thin film transistor has a source connected to ground, a gate connected
to a second clock signal output terminal, and a drain connected to a second terminal
of the driving capacitor;
the third thin film transistor has a source connected to the drain of the second thin
film transistor, and a gate connected to the second clock signal output terminal;
the compensating capacitor has a first terminal connected to a drain of the third
thin film transistor;
the fourth thin film transistor has a source connected to a second terminal of the
compensating capacitor, a gate connected to the second clock signal output terminal,
and a drain connected to a source of the driving thin film transistor;
the fifth thin film transistor has a source connected to ground, a gate connected
to a first clock signal output terminal, and a drain connected to the source of the
fourth thin film transistor;
the sixth thin film transistor has a source connected to a reference voltage output
terminal, a gate connected to the first clock signal output terminal, and a drain
connected to the drain of the second thin film transistor;
the seventh thin film transistor has a source connected to the reference voltage output
terminal, a gate connected to the first clock signal output terminal, and a drain
connected to the gate of the driving thin film transistor; and
a gate of the first thin film transistor is connected to the second clock signal output
terminal,
wherein the second thin film transistor, the sixth thin film transistor and the seventh
thin film transistor are n-channel thin film transistors;
the third thin film transistor, the fourth thin film transistor and the fifth thin
film transistor are p-channel thin film transistors.
4. The AMOLED driving and compensating circuit as claimed in claim 3, wherein,
both a first clock signal at the first clock signal output terminal and a second clock
signal at the second clock signal output terminal comprise a first phase, a second
phase and a third phase;
at the first phase, the first clock signal output terminal is at high level, and the
second clock signal output terminal is at low level;
at the second phase, the first clock signal output terminal is at low level, and the
second clock signal output terminal is at high level;
at the third phase, the first clock signal output terminal is at low level, and the
second clock signal output terminal is at low level.
5. The AMOLED driving and compensating circuit as claimed in claim 4, wherein,
at the first phase, the third thin film transistor, the fourth thin film transistor,
the sixth thin film transistor and the seventh thin film transistor in the external
compensating circuit turn on, and the first thin film transistor in each of the driving
circuits and the second thin film transistor and the fifth thin film transistor in
the external compensating circuit turn off, such that voltage difference over the
compensating capacitor becomes threshold voltage of the driving thin film transistor;
at the second phase, the third thin film transistor, the fourth thin film transistor,
the sixth thin film transistor and the seventh thin film transistor in the external
compensating circuit turn off, and the first thin film transistor in each of the driving
circuits and the second thin film transistor and the fifth thin film transistor in
the external compensating circuit turn on, such that voltage difference over the driving
capacitor in each of the driving circuits becomes grayscale voltage input from a data
line corresponding to the driving circuit; and
at the third phase, the third thin film transistor, the fourth thin film transistor
and the fifth thin film transistor in the external compensating circuit turn on, and
the first thin film transistor in each of the driving circuits and the second thin
film transistor, the sixth thin film transistor and the seventh thin film transistor
in the external compensating circuit turn off, such that gate voltage of a driving
thin film transistor in the driving circuit jumps to a sum of the threshold voltage
of the driving thin film transistor and the grayscale voltage input from the data
line corresponding to the driving circuit.
6. An AMOLED driving and compensating method, comprising:
a first phase, storing threshold voltage of driving thin film transistors of several
driving circuits set inside several pixel regions;
a second phase, storing grayscale voltage of each of the several driving circuits
set inside the several pixel regions;
a third phase, gate voltage of the driving thin film transistor of each of the several
driving circuits set inside the several pixel regions jumping to a sum of the threshold
voltage and the grayscale voltage of the driving circuit.
7. The AMOLED driving and compensating method as claimed in claim 6, wherein,
at the first phase, storing the threshold voltage of the driving thin film transistors
of the several driving circuits set inside the several pixel regions is:
a first clock signal output terminal is at high level, a second clock signal output
terminal is at low level, a third thin film transistor, a fourth thin film transistor,
a sixth thin film transistor and a seventh thin film transistor in a compensating
circuit turn on, a first thin film transistor in each of the driving circuits and
a second thin film transistor and a fifth thin film transistor in the compensating
circuit turn off, and voltage difference over a compensating capacitor becomes the
threshold voltage of the driving thin film transistors of the several driving circuits
set inside the several pixel regions;
at the second phase, storing the grayscale voltage of each of the several driving
circuits set inside the several pixel regions is:
the first clock signal output terminal is at low level, the second clock signal output
terminal is at high level, the third thin film transistor, the fourth thin film transistor,
the sixth thin film transistor and the seventh thin film transistor in the compensating
circuit turn off, the first thin film transistor in each of the driving circuits and
the second thin film transistor and the fifth thin film transistor in the compensating
circuit turn on, and the voltage difference over the compensating capacitor in each
of the driving circuits is the grayscale voltage input from the data line corresponding
to the driving circuit;
at the third phase, the gate voltage of the driving thin film transistor of each of
the several driving circuits set inside the several pixel regions jumping to the sum
of the threshold voltage and the grayscale voltage of the driving circuit is:
the first clock signal output terminal is at low level, the second clock signal output
terminal is at low level, the third thin film transistor, the fourth thin film transistor
and the fifth thin film transistor in the compensating circuit turn on, the first
thin film transistor in each of the driving circuits and the second thin film transistor,
the sixth thin film transistor and the seventh thin film transistor in the compensating
circuit turn off, and the gate voltage of the driving thin film transistor in each
of the several driving circuits set inside the several pixel regions jumps to the
sum of the threshold voltage and the grayscale voltage of the driving circuit.
8. A display device comprising the AMOLED driving and compensating circuit as claimed
in any of claims 1-5.