INTEGRATION OF NON-VOLATILE CHARGE TRAP MEMORY DEVICES AND LOGIC CMOS DEVICES - Patent 2831919

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EP 2 831 919 A1

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(43)	Date of publication:
	04.02.2015 Bulletin 2015/06

(21)	Application number: 13769241.4

(22)	Date of filing: 18.03.2013

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International Patent Classification (IPC):

H01L 29/792^(2006.01)

(86)	International application number:
	PCT/US2013/032777

(87)	International publication number:
	WO 2013/148393 (03.10.2013 Gazette 2013/40)

(84)	Designated Contracting States:
	AL AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HR HU IE IS IT LI LT LU LV MC MK MT NL NO PL PT RO RS SE SI SK SM TR
	Designated Extension States:
	BA ME

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Priority:

31.03.2012 US 201213436878

(71)	Applicant: Cypress Semiconductor Corporation
	San Jose, CA 95134 (US)

(72)	Inventors:
	RAMKUMAR, Krishnaswamy San Jose, California 95129 (US) JENNE, Fredrick Sunnyvale, California 94086 (US) LEVY, Sagy 30900 Zichron-Yoakev (IL)

(74)	Representative: Cooper, John
	Murgitroyd & Company Scotland House 165-169 Scotland Street Glasgow G5 8PL Glasgow G5 8PL (GB)

(54)	INTEGRATION OF NON-VOLATILE CHARGE TRAP MEMORY DEVICES AND LOGIC CMOS DEVICES