(19)
(11) EP 2 843 425 A8

(12) CORRECTED EUROPEAN PATENT APPLICATION
Note: Bibliography reflects the latest situation

(15) Correction information:
Corrected version no 1 (W1 A1)

(48) Corrigendum issued on:
08.04.2015 Bulletin 2015/15

(88) Date of publication A3:
04.03.2015 Bulletin 2015/10

(43) Date of publication:
04.03.2015 Bulletin 2015/10

(21) Application number: 13181895.7

(22) Date of filing: 27.08.2013
(51) International Patent Classification (IPC): 
G01R 19/00(2006.01)
G01R 15/08(2006.01)
G01R 19/165(2006.01)
H03K 17/082(2006.01)
(84) Designated Contracting States:
AL AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HR HU IE IS IT LI LT LU LV MC MK MT NL NO PL PT RO RS SE SI SK SM TR
Designated Extension States:
BA ME

(71) Applicant: NXP B.V.
5656 AG Eindhoven (NL)

(72) Inventor:
  • Aerts,, Steven
    Redhill, Surrey RH1 1SH (GB)

(74) Representative: Crawford, Andrew 
NXP B.V. Intellectual Property & Licensing Red Central 60 High Street
Redhill, Surrey RH1 1SH
Redhill, Surrey RH1 1SH (GB)

 
Remarks:
Amended claims in accordance with Rule 137(2) EPC.
 


(54) Current measuring circuit


(57) A current measuring circuit (100; 200; 300) for providing a current flow signal indicative of current flow between a first terminal (102; 202; 302) and second terminal (104; 204; 304), comprising:
a main transistor (106, 206) having a main drain, a main source (105; 205) and a main gate (109; 209), wherein the main source (105; 205) and the main drain (106; 206) define a main source-drain path, the main drain is connected to the first terminal (102; 202; 302), the main source is connected to the second terminal (104; 204; 304) and the main gate is connected to a first control terminal (109; 209);
a sense transistor having a sense drain, a sense source (107; 207) and a sense gate, wherein the sense source and the sense drain define a sense source-drain path, the sense drain is connected to the first terminal (102; 202; 302) and the sense gate is connected to the first control terminal (109; 209);
a bypass switch (108; 208; 308) having:
a controllable conduction path connected in parallel with the sense drain-source path of the main transistor between the first and second terminals (102; 202; 302, 104; 204; 304); and
a second control terminal (111; 211) for enabling or preventing a current flow through the controllable conduction path;

an output amplifier (110; 210; 310) having:
an input connected to both the sense source of the sense transistor and the controllable conduction path of the bypass switch; and
an output for providing the current flow signal; and

a controller (118; 218; 318) configured to set, in accordance with the current flow signal, a first control signal for the first control terminal (109; 209) and a second control signal for the second control terminal (111; 211) in order to enable current flow through:
each of the respective drain-source paths of the main and sense transistors; or
the controllable conduction path of the bypass switch (108; 208; 308).