(19)
(11) EP 2 887 224 A8

(12) CORRECTED EUROPEAN PATENT APPLICATION
Note: Bibliography reflects the latest situation

(15) Correction information:
Corrected version no 1 (W1 A1)

(48) Corrigendum issued on:
17.02.2016 Bulletin 2016/07

(88) Date of publication A3:
24.06.2015 Bulletin 2015/26

(43) Date of publication:
24.06.2015 Bulletin 2015/26

(21) Application number: 14192168.4

(22) Date of filing: 06.11.2014
(51) International Patent Classification (IPC): 
G06F 13/362(2006.01)
H04L 12/937(2013.01)
G06F 12/08(2006.01)
(84) Designated Contracting States:
AL AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HR HU IE IS IT LI LT LU LV MC MK MT NL NO PL PT RO RS SE SI SK SM TR
Designated Extension States:
BA ME

(30) Priority: 23.12.2013 US 201314138761

(71) Applicant: Intel Corporation
Santa Clara, CA 95054 (US)

(72) Inventors:
  • Doshi, Hem
    Folsom, CA California 95630 (US)
  • Raju, Anand
    El Dorado Hills, CA California 95762 (US)

(74) Representative: Hufton, David Alan 
HGF Limited Fountain Precinct Balm Green
Sheffield S1 2JA
Sheffield S1 2JA (GB)

   


(54) Latency agnostic transaction buffer for request-grant protocols


(57) According to one embodiment, an apparatus includes a transaction data storage to store transaction data to be transmitted over an interconnect of a data processing system, a transaction buffer coupled to the transaction data storage to buffer at least a portion of the transaction data, and a transaction logic coupled to the transaction data storage and the transaction buffer to transmit a request (REQ) signal to an arbiter associated with the interconnect in response to first transaction data that becomes available in the transaction data storage, in response to a grant (GNT) signal received from the arbiter, retrieve second transaction data from the transaction buffer and transmit the second transaction data onto the interconnect, and refill the transaction buffer with third transaction data retrieved from the transaction data storage after the second transaction data has been transmitted onto the interconnect.