<?xml version="1.0" encoding="UTF-8"?>
<!DOCTYPE ep-patent-document PUBLIC "-//EPO//EP PATENT DOCUMENT 1.5//EN" "ep-patent-document-v1-5.dtd">
<ep-patent-document id="EP13858200B1" file="EP13858200NWB1.xml" lang="en" country="EP" doc-number="2928061" kind="B1" date-publ="20180110" status="n" dtd-version="ep-patent-document-v1-5">
<SDOBI lang="en"><B000><eptags><B001EP>ATBECHDEDKESFRGBGRITLILUNLSEMCPTIESILTLVFIROMKCYALTRBGCZEEHUPLSK..HRIS..MTNORS..SM..................</B001EP><B005EP>J</B005EP><B007EP>BDM Ver 0.1.63 (23 May 2017) -  2100000/0</B007EP></eptags></B000><B100><B110>2928061</B110><B120><B121>EUROPEAN PATENT SPECIFICATION</B121></B120><B130>B1</B130><B140><date>20180110</date></B140><B190>EP</B190></B100><B200><B210>13858200.2</B210><B220><date>20131025</date></B220><B240><B241><date>20150427</date></B241></B240><B250>ja</B250><B251EP>en</B251EP><B260>en</B260></B200><B300><B310>2012259641</B310><B320><date>20121128</date></B320><B330><ctry>JP</ctry></B330></B300><B400><B405><date>20180110</date><bnum>201802</bnum></B405><B430><date>20151007</date><bnum>201541</bnum></B430><B450><date>20180110</date><bnum>201802</bnum></B450><B452EP><date>20170810</date></B452EP></B400><B500><B510EP><classification-ipcr sequence="1"><text>H02M   7/5387      20070101AFI20170714BHEP        </text></classification-ipcr><classification-ipcr sequence="2"><text>H02M   3/158       20060101ALI20170714BHEP        </text></classification-ipcr><classification-ipcr sequence="3"><text>H02M   1/00        20060101ALN20170714BHEP        </text></classification-ipcr></B510EP><B540><B541>de</B541><B542>STROMWANDLERSYSTEM UND VERFAHREN ZUR STEUERUNG DAVON</B542><B541>en</B541><B542>POWER CONVERSION SYSTEM AND METHOD FOR CONTROLLING SAME</B542><B541>fr</B541><B542>SYSTÈME DE CONVERSION DE PUISSANCE ET PROCÉDÉ PERMETTANT DE COMMANDER CE DERNIER</B542></B540><B560><B561><text>EP-A2- 1 206 028</text></B561><B561><text>EP-A2- 2 031 749</text></B561><B561><text>EP-A2- 2 048 774</text></B561><B561><text>JP-A- 2001 204 196</text></B561><B561><text>JP-A- 2002 233 159</text></B561><B561><text>JP-A- 2009 106 098</text></B561><B561><text>JP-A- 2010 098 790</text></B561><B561><text>US-A1- 2012 286 705</text></B561><B565EP><date>20170207</date></B565EP></B560></B500><B700><B720><B721><snm>TOBA Akio</snm><adr><str>c/o FUJI ELECTRIC CO. LTD.
1-1 Tanabeshinden
Kawasaki-ku</str><city>Kawasaki-shi
Kanagawa 210-9530</city><ctry>JP</ctry></adr></B721></B720><B730><B731><snm>Fuji Electric Co., Ltd.</snm><iid>101342445</iid><irf>F30810WOEP</irf><adr><str>1-1 Tanabeshinden 
Kawasaki-ku</str><city>Kawasaki-shi, Kanagawa 210-9530</city><ctry>JP</ctry></adr></B731></B730><B740><B741><snm>Appelt, Christian W.</snm><iid>100768809</iid><adr><str>Boehmert &amp; Boehmert 
Anwaltspartnerschaft mbB 
Pettenkoferstrasse 22</str><city>80336 München</city><ctry>DE</ctry></adr></B741></B740></B700><B800><B840><ctry>AL</ctry><ctry>AT</ctry><ctry>BE</ctry><ctry>BG</ctry><ctry>CH</ctry><ctry>CY</ctry><ctry>CZ</ctry><ctry>DE</ctry><ctry>DK</ctry><ctry>EE</ctry><ctry>ES</ctry><ctry>FI</ctry><ctry>FR</ctry><ctry>GB</ctry><ctry>GR</ctry><ctry>HR</ctry><ctry>HU</ctry><ctry>IE</ctry><ctry>IS</ctry><ctry>IT</ctry><ctry>LI</ctry><ctry>LT</ctry><ctry>LU</ctry><ctry>LV</ctry><ctry>MC</ctry><ctry>MK</ctry><ctry>MT</ctry><ctry>NL</ctry><ctry>NO</ctry><ctry>PL</ctry><ctry>PT</ctry><ctry>RO</ctry><ctry>RS</ctry><ctry>SE</ctry><ctry>SI</ctry><ctry>SK</ctry><ctry>SM</ctry><ctry>TR</ctry></B840><B860><B861><dnum><anum>JP2013078907</anum></dnum><date>20131025</date></B861><B862>ja</B862></B860><B870><B871><dnum><pnum>WO2014083980</pnum></dnum><date>20140605</date><bnum>201423</bnum></B871></B870><B880><date>20151007</date><bnum>201541</bnum></B880></B800></SDOBI>
<description id="desc" lang="en"><!-- EPO <DP n="1"> -->
<heading id="h0001">Technical Field</heading>
<p id="p0001" num="0001">The present invention relates to a power conversion system for driving a load, such as an alternating current motor, and to a control method of the power conversion system.</p>
<heading id="h0002">Background Art</heading>
<p id="p0002" num="0002">As a power conversion system wherein the voltage of a direct current power source is boosted and supplied to an inverter, and an alternating current motor is driven by the inverter, for example, the heretofore known technology shown in <figref idref="f0003">Fig. 4</figref> is known.</p>
<p id="p0003" num="0003">In <figref idref="f0003">Fig. 4</figref>, 10 is a direct current power source, 20 is a current reversible boost converter (DC/DC converter), 21 and 22 are semiconductor switches, 23 is a reactor, 30 is a capacitor, 40 is a three-phase voltage inverter, 41 to 46 are semiconductor switches, and 50 is an alternating current motor. As illustrated in the brackets in <figref idref="f0003">Fig. 4</figref>, each of the semiconductor switches 21, 22, and 41 to 46 is configured of a semiconductor switching element, such as an IGBT, and a reflux<!-- EPO <DP n="2"> --> diode connected in reverse parallel thereto.</p>
<p id="p0004" num="0004">To give a brief description of an operation of the heretofore known technology, as storage and emission of energy in and from the reactor 23 are repeated by turning on and off the semiconductor switch 22 of the boost converter 20, the voltage of the capacitor 30 is boosted with respect to the voltage of the direct current power source 10. The inverter 40, by turning on and off the semiconductor switches 41 to 46 by, for example, PWM control, converts the direct current voltage of the capacitor 30 to a three-phase alternating current voltage and supplies the three-phase alternating current voltage to the alternating current motor 50.</p>
<p id="p0005" num="0005">The heretofore known technology shown in <figref idref="f0003">Fig. 4</figref> is described in, for example, PTL 1.</p>
<p id="p0006" num="0006">Also, the heretofore known technology of <figref idref="f0003">Fig. 5</figref> configured so as to boost the voltage of a direct current power source by causing an inverter to operate as a so-called zero-phase converter so that a zero-phase voltage is controlled by the inverter, is known.</p>
<p id="p0007" num="0007">In <figref idref="f0003">Fig. 5</figref>, a direct current power source 10 is connected between a neutral point (the neutral point of a stator winding) 50a of an alternating current motor 50 and a negative side direct current busbar, and the same numbers as in <figref idref="f0003">Fig. 4</figref> are<!-- EPO <DP n="3"> --> given to other components.</p>
<p id="p0008" num="0008">In the heretofore known technology, by repeating the operations of turning on and off, for example, the semiconductor switches 42, 44, and 46 in the lower arm of the inverter 40 at the same timing, a zero-phase equivalent circuit, formed of the direct current power source 10, a leakage inductance (a zero-phase inductance) of the alternating current motor 50, and the inverter 40, comes to have substantially the same circuit configuration as the boost converter 20 in <figref idref="f0003">Fig. 4</figref>, and it is thus possible to control the voltage of the capacitor 30 to a higher value than the voltage of the direct current power source 10. A drive operation of the alternating current motor 50 by the inverter 40 is the same as in <figref idref="f0003">Fig. 4</figref>.</p>
<p id="p0009" num="0009">The heretofore known technology shown in <figref idref="f0003">Fig. 5</figref> is described in, for example, PTL 2.</p>
<p id="p0010" num="0010">Meanwhile, <figref idref="f0004">Fig. 6</figref> is a circuit diagram showing the heretofore known technology described in PTL 3.</p>
<p id="p0011" num="0011">In <figref idref="f0004">Fig. 6</figref>, 70 is a DC/DC converter which operates as a buck-boost chopper, 71 to 74 are semiconductor switches, and 75 is a reactor, wherein the series circuit of the semiconductor switches 71 and 72 is connected in parallel to a direct current power source 10 and capacitor 31, and the series circuit of<!-- EPO <DP n="4"> --> the semiconductor switches 73 and 74 is connected in parallel to a capacitor 32 and inverter 40. 11 and 62 are voltage detectors, 61 is a current detector, and 80 is a control circuit.</p>
<p id="p0012" num="0012">In the heretofore known technology, the duty ratio of the semiconductor switches 71 and 74 to 72 and 73 of the DC/DC converter 70 is controlled, thereby changing energy stored in the reactor 75, and the voltage of the direct current power source 10 is controlled to a desired size and output to the capacitor 32 side.</p>
<p id="p0013" num="0013">A circuit substantially the same as in <figref idref="f0004">Fig. 6</figref> is also described in NPL 1.</p>
<heading id="h0003">Citation List</heading>
<heading id="h0004">Patent Literature</heading>
<p id="p0014" num="0014">
<ul id="ul0001" list-style="none" compact="compact">
<li>PTL 1: <patcit id="pcit0001" dnum="JP2004120844A"><text>JP-A-2004-120844</text></patcit> (<figref idref="f0002">Fig. 2</figref>, <figref idref="f0003">5</figref>, <figref idref="f0004">6</figref>, or the like)</li>
<li>PTL 2: <patcit id="pcit0002" dnum="JP2011041336A"><text>JP-A-2011-41336</text></patcit> (<figref idref="f0001">Fig. 1</figref> or the like)</li>
<li>PTL 3: <patcit id="pcit0003" dnum="JP2004350478A"><text>JP-A-2004-350478</text></patcit> (<figref idref="f0001">Fig. 1</figref>, 7, or the like)</li>
</ul></p>
<p id="p0015" num="0015"><patcit id="pcit0004" dnum="JP2009106098A"><text>JP 2009 106098 A</text></patcit> describes a power conversion system that has a power converter having a plurality of semiconductor switching elements and freewheeling current diodes connected in reverse parallel with the switching elements, respectively, a load M connected with its output terminal, and a power supply<!-- EPO <DP n="5"> --> PS connected between the neutral of the load and the positive side DC terminal or the negative side DC terminal of the power converter, wherein the current capacity (bearing current) of each element is varied by altering the number of parallel connections of switching elements or return current diodes, depending on the powering operation mode and regeneration operation mode of the load.</p>
<p id="p0016" num="0016"><patcit id="pcit0005" dnum="EP1206028A2"><text>EP 1 206 028 A2</text></patcit> describes a direct-current power supply that is connected between the neutral points of two three-phase coils of a 2Y motor constituted of the windings of the two three-phase coils, which are connected in Y-connection and wound on a same stator, and to which three-phase alternating current power is severally supplied with a phase difference of a shifted angle between the windings from two inverter circuits having a positive pole bus and a negative pole bus for common use. A capacitor is connected between the positive pole bus and the negative pole bus. The electric potential difference between the neutral points of the three-phase coils is made larger or smaller than the voltage of the direct-current power supply through the switching control of the inverter circuits. Thereby, the capacitor can be charged or discharged.</p>
<p id="p0017" num="0017"><patcit id="pcit0006" dnum="EP2048774A2"><text>EP 2 048 774 A2</text></patcit> describes that in a rotary electric system, a switch member includes at least one of a first switch and a second switch. The first switch is connected between a neutral point of multiphase stator windings and a high-side electrode<!-- EPO <DP n="6"> --> of a direct current power source. The second switch is connected between the neutral point and a low-side electrode of the direct current power source. A controller works to turn the switch member off and on thereby switching control of the multiphase inverter between full-wave driving mode and half-wave driving mode. The full-wave driving mode allows the controller to drive all of the high-side and low-side switching elements per phase of the multiphase stator windings. The half-wave driving mode allows the controller to drive any one of the high-side switching element and the low-side switching element per phase of the multiphase stator windings.</p>
<p id="p0018" num="0018"><patcit id="pcit0007" dnum="US2012286705A1"><text>US 2012/286705 A1</text></patcit> describes a control apparatus controlling rotary electric machine that includes a conversion circuit converting a DC voltage into an AC voltage so as to rotate the rotary electric machine and a control unit. The conversion circuit includes a high-side switch, a low-side switch that connected to stator windings of the rotary electric machine. The control unit controls the conversion circuit such that both high-side/ low-side switches are controlled to be successively ON and OFF at every predetermined periods for converting the DC voltage into AC voltage. The control unit dynamically controls high-side and low-side neutral switches each connected to a neutral point of the stator windings so as to increase or decrease a voltage at the neutral point whereby current flowing through the rotary electric machine<!-- EPO <DP n="7"> --> is adjusted.</p>
<p id="p0019" num="0019"><patcit id="pcit0008" dnum="EP2031749A2"><text>EP 2 031 749 A2</text></patcit> describes a rotary electric machine for a vehicle that includes a rotor, a stator and a rectifying device for current AC/DC conversion. The machine operates as a motor and a generator. The machine comprises a multi-phase windings, switching elements forming a rectifying device, and a controller for controlling a current path of the multi-phase windings by switching the switching elements on and off to perform two modes of operation. The switching elements are switched such that one end of each windings is connected to either a high electrical potential end or a low electrical potential end of the rectifying device and the other ends of the windings connected together to be the same electrical potential are connected to either the high electrical potential end or the low electrical potential end in the rectifying device.</p>
<heading id="h0005">Non Patent Literature</heading>
<p id="p0020" num="0020">NPL 1: <nplcit id="ncit0001" npl-type="s"><text>Comparative Evaluation of Soft-Switching Concepts for Bi-directional Buck+Boost Dc-Dc Converters, p. 1856-1865</text></nplcit>, The 2010 International Power Electronics Conference (<figref idref="f0001">Fig. 1</figref>)<!-- EPO <DP n="8"> --></p>
<heading id="h0006">Summary of Invention</heading>
<heading id="h0007">Technical Problem</heading>
<p id="p0021" num="0021">The heretofore known technologies shown in <figref idref="f0003">Figs. 4</figref> and <figref idref="f0004">6</figref> have a problem that the reactors 23 and 75 provided in the respective converters 20 and 70 bring about an increase in circuit size and an increase in cost.</p>
<p id="p0022" num="0022">Also, the heretofore known technology of <figref idref="f0003">Fig. 5</figref> has a problem that as the inverter 40 is caused to operate as a zero-phase converter by appropriately switching the inverter 40 in the operation of switching the inverter 40 which drives the alternating current motor 50, a boost operation is constantly carried out while the alternating current motor 50 is operating, due to which the loss in the inverter 40 and alternating current motor 50 increases.</p>
<p id="p0023" num="0023">Furthermore, in the heretofore known technology of <figref idref="f0003">Fig. 5</figref>, by adjusting the on-duty of all the semiconductor switches in the upper arm or lower arm of the inverter 40, it is possible to control the direct current voltage of the inverter 40 (the voltage of the capacitor 30) in accordance with the rotation speed of the alternating current motor 50, and it is possible, for example, when the alternating current motor 50 rotates at high speed, to control the direct current voltage of the inverter 40 to a higher value than the voltage of the direct<!-- EPO <DP n="9"> --> current power source 10, but the degree of freedom of the direct current voltage, and thus the alternating current output voltage, of the inverter 40 is generally low.</p>
<p id="p0024" num="0024">Therefore, a problem to be solved by the invention is to provide a power conversion system wherein by eliminating the need for a boost reactor and constant boost operation, it is possible to achieve a reduction in the size of the whole system and a loss reduction, and to enhance the degree of freedom of the direct current voltage of an inverter, and a control method of the power conversion system.</p>
<heading id="h0008">Solution to Problem</heading>
<p id="p0025" num="0025">In order to solve the heretofore described problem, a power conversion system according to claim 1 includes a power storage device such as a capacitor; an inverter, between the positive and negative direct current terminals of which the power storage device is connected, and between a plurality of alternating current terminals of which a load having an inductance is connected; a first upper and lower arm portion, configured by connecting first and second semiconductor switches in series, of which the connection point of the first and second semiconductor switches is connected to the neutral point of the load; and a direct current power source such as<!-- EPO <DP n="10"> --> a battery connected in parallel to the first upper and lower arm portion, wherein at least one pair of homopolar terminals, of pairs of homopolar terminals out of the positive and negative direct current terminals of the inverter and the positive and negative terminals of the first upper and lower arm portion, are connected by a switch, and the other pair of homopolar terminals are set at the same potential.</p>
<p id="p0026" num="0026">Herein, as according to claim 2, it is also good that only one pair of homopolar terminals, of pairs of homopolar terminals out of the positive and negative direct current terminals of the inverter and the positive and negative terminals of the first upper and lower arm portion, are connected by a switch, and the other pair of homopolar terminals are directly connected together.</p>
<p id="p0027" num="0027">Alternatively, as according to claim 3, it is also good that pairs of homopolar terminals, of the positive and negative direct current terminals of the inverter and the positive and negative terminals of the first upper and lower arm portion, are connected one pair by each switch, and that one switch is constantly placed in an on state, and the other switch is brought into an on and off operation.</p>
<p id="p0028" num="0028">As according to claim 4, semiconductor switches configuring the inverter and the first and second semiconductor switches configuring the first upper and lower arm portion are<!-- EPO <DP n="11"> --> each configured of a semiconductor switching element and a reflux diode connected in reverse parallel thereto.</p>
<p id="p0029" num="0029">Also, as according to claim 5, it is desirable that as the load, an alternating current motor is connected, and that a leakage inductance of the alternating current motor is utilized as a boost inductance.</p>
<p id="p0030" num="0030">As a control method of the power conversion system according to the invention, as according to claim 6, it is possible that by switching the plurality of semiconductor switches configuring the inverter in a condition in which the switch is turned on and the first and second semiconductor switches are turned off, an alternating current voltage is output from the inverter to drive the load.</p>
<p id="p0031" num="0031">Also, as according to claim 7, it is also possible that the switch in claim 2 is turned off, and all the semiconductor switches in the upper arm or lower arm of the inverter are turned on or off at the same time, thereby equivalently configuring a second upper and lower arm portion formed of the series circuit of third and fourth semiconductor switches, and that the first and second semiconductor switches are turned on and off, thereby causing a buck-boost chopper formed of the first upper and lower arm portion, the second upper and lower arm portion, and the inductance of the load to operate, thus charging and discharging the power storage device.<!-- EPO <DP n="12"> --></p>
<p id="p0032" num="0032">Alternatively, as according to claim 8, it is also possible that in a condition in which one switch in claim 3 is constantly turned on, the other switch is turned off, and all the semiconductor switches in the upper arm or lower arm of the inverter are turned on or off at the same time, thereby equivalently configuring a second upper and lower arm portion formed of the series circuit of third and fourth semiconductor switches, and that the first and second semiconductor switches are turned on and off, thereby causing a buck-boost chopper formed of the first upper and lower arm portion, the second upper and lower arm portion, and the inductance of the load to operate, thus charging and discharging the power storage device.</p>
<p id="p0033" num="0033">Furthermore, as according to claim 9 or 10, by adopting an arrangement such that a switching pattern of the inverter for carrying out a buck-boost operation by the second upper and lower arm portion configures one portion of a switching pattern for outputting an alternating current voltage from the inverter to drive the load, it is possible to drive the load with the inverter while carrying out a buck-boost operation for the capacitor.</p>
<heading id="h0009">Advantageous Effects of Invention</heading>
<p id="p0034" num="0034">According to the invention, as the need for a boost<!-- EPO <DP n="13"> --> reactor is eliminated by utilizing an inductance which a load such as an alternating current motor has, it is possible to reduce the size and price of the whole system. Also, as it is possible to select an operation mode in which the load is driven by an inverter without using a boost operation, a simplification in control is achieved, and a loss reduction is possible, compared with a heretofore known technology wherein a boost operation is constantly carried out.</p>
<p id="p0035" num="0035">Furthermore, by enhancing the degree of freedom of the direct current voltage of the inverter, it is possible, when the load is, for example, an alternating current motor, to raise the direct current voltage of the inverter when the motor rotates at high speed, meaning that it is possible to reduce current with the motor set to be of high voltage specifications, and thus achieve a reduction in the diameter of a cable through which to supply power to the motor, a reduction in the size of connection terminals, and the like.</p>
<heading id="h0010">Brief Description of Drawings</heading>
<p id="p0036" num="0036">
<ul id="ul0002" list-style="none" compact="compact">
<li>[<figref idref="f0001">Fig. 1] Fig. 1</figref> is a circuit diagram showing an embodiment of the invention.</li>
<li>[<figref idref="f0002">Fig. 2] Fig. 2</figref> is an equivalent circuit diagram of <figref idref="f0001">Fig. 1</figref>.</li>
<li>[<figref idref="f0002">Fig. 3] Fig. 3</figref> is a schematic characteristic diagram showing a relationship between the speed and torque (current) of an<!-- EPO <DP n="14"> --> alternating current motor.</li>
<li>[<figref idref="f0003">Fig. 4] Fig. 4</figref> is a circuit diagram showing a heretofore known technology.</li>
<li>[<figref idref="f0003">Fig. 5] Fig. 5</figref> is a circuit diagram showing a heretofore known technology.</li>
<li>[<figref idref="f0004">Fig. 6] Fig. 6</figref> is a circuit diagram showing a heretofore known technology.</li>
</ul></p>
<heading id="h0011">Description of Embodiments</heading>
<p id="p0037" num="0037">Hereafter, a description will be given, along the drawings, of an embodiment of the invention.</p>
<p id="p0038" num="0038"><figref idref="f0001">Fig. 1</figref> is a circuit diagram showing an embodiment of the invention. In <figref idref="f0001">Fig. 1</figref>, the positive and negative direct current terminals of a three-phase voltage inverter 40 formed of semiconductor switches 41 to 46 are connected one to each end of a capacitor 30 acting as a power storage device, and a three-phase alternating current motor 50 is connected to the alternating current terminals of the inverter 40.</p>
<p id="p0039" num="0039">Meanwhile, an upper and lower arm portion 90 wherein semiconductor switches 91 and 92 are connected in series are connected between the positive pole and negative pole of a direct current power source 10 formed of a battery or the like, and the connection point of the semiconductor switches 91 and<!-- EPO <DP n="15"> --> 92 is connected to a neutral point 50a of the alternating current motor 50. Herein, the semiconductor switches 91 and 92 are called first and second semiconductor switches, and the upper and lower arm portion 90 is called a first upper and lower arm portion.</p>
<p id="p0040" num="0040">Also, the positive terminal of the upper and lower arm portion 90 (the positive pole of the direct current power source 10) is connected to one direct current terminal (positive terminal) of the inverter 40 via a switch 100 formed of a bidirectional semiconductor switch or a mechanical switch, while the negative terminal of the upper and lower arm portion 90 (the negative pole of the direct current power source 10) is directly connected to the other direct current terminal (negative terminal) of the inverter 40, and both negative terminals are kept at the same potential.</p>
<p id="p0041" num="0041">A configuration may be such that the switch 100 is connected between the negative terminal of the upper and lower arm portion 90 and the negative terminal of the inverter 40, and that the positive terminal of the upper and lower arm portion 90 and the positive terminal of the inverter 40 are directly connected together and kept at the same potential.</p>
<p id="p0042" num="0042">Also, although not shown, switches may be connected, one between the positive terminal of the upper and lower arm portion 90 and the positive terminal of the inverter, and the other between the negative terminal of the upper and lower arm portion<!-- EPO <DP n="16"> --> 90 and the negative terminal of the inverter. In this case, a configuration only has to be such that while a power conversion system is operating, one switch (which corresponds to the switch 100 of the embodiment) is turned on or off by an operation, to be described hereafter, while the other switch is constantly placed in an on state, and both ends of the other switch are kept at the same potential, and that when the power conversion system stops, the other switch is turned off.</p>
<p id="p0043" num="0043">In the heretofore described configuration, the semiconductor switches 41 to 46, 91, and 92 are each configured of a semiconductor switching element, such as an IGBT, and a reflux diode connected in reverse parallel thereto, as illustrated in the brackets in <figref idref="f0001">Fig. 1</figref>.</p>
<p id="p0044" num="0044">Next, a description will be given of an operation of the embodiment.</p>
<p id="p0045" num="0045">When the switch 100 in <figref idref="f0001">Fig. 1</figref> is turned on, and the semiconductor switches 91 and 92 of the upper and lower arm portion 90 are turned off, the direct current power source 10 and the capacitor 30 are connected in parallel to the direct current circuit of the inverter 40, thus configuring an alternating current motor drive system, formed of a common three-phase voltage inverter, as the whole circuit. Because of this, the inverter 40, by carrying out PWM control or the like in accordance with a predetermined voltage command given<!-- EPO <DP n="17"> --> from a control circuit (not shown) and thus turning on and off the semiconductor switches 41 to 46, converts a direct current voltage to a three-phase alternating current voltage and supplies the three-phase alternating voltage to the alternating current motor 50.</p>
<p id="p0046" num="0046">Next, when a switching operation wherein all the semiconductor switches in the upper arm or lower arm of the inverter 40 are turned on or off to control a zero-phase voltage (the inverter 40 is caused to operate as a zero-phase converter), and a switching operation of the inverter 40 by a positive phase voltage command, are carried out in a time-division manner in a condition in which the switch 100 is turned off, the circuit in <figref idref="f0001">Fig. 1</figref> changes equivalently to the kind of circuit in <figref idref="f0002">Fig. 2</figref>.</p>
<p id="p0047" num="0047">In <figref idref="f0002">Fig. 2</figref>, 40A is an upper and lower arm portion which equivalently shows the inverter 40 acting as a zero-phase converter, and an upper-arm semiconductor switch 47 corresponds to the semiconductor switches 41, 43, and 45 in <figref idref="f0001">Fig. 1</figref> which are turned on or off at the same time, while a lower-arm semiconductor switch 48 corresponds to the semiconductor switches 42, 44, and 46 in <figref idref="f0001">Fig. 1</figref> which are turned off or on at the same time. Herein, the semiconductor switches 47 and 48 configuring the upper and lower arm portion 40A are<!-- EPO <DP n="18"> --> called third and fourth semiconductor switches, and the upper and lower arm portion 40A is called a second upper and lower arm portion.</p>
<p id="p0048" num="0048">With the circuit configuration shown in <figref idref="f0001">Fig. 1</figref>, the connection point of the semiconductor switches 47 and 48 in <figref idref="f0002">Fig. 2</figref> is connected to the connection point of the semiconductor switches 91 and 92 of the upper and lower arm portion 90 via a leakage inductance (a zero-phase inductance) 51 of the alternating current motor 50, and a buck-boost converter 70A is configured of the upper and lower arm portions 40A and 90 and the leakage inductance 51.</p>
<p id="p0049" num="0049">The circuit shown in <figref idref="f0002">Fig. 2</figref> is substantially the same in overall configuration as the previously described circuit in <figref idref="f0004">Fig. 6</figref>, and the buck-boost converter 70A in <figref idref="f0002">Fig. 2</figref> has the same function as circuits described in, for example, <figref idref="f0002">Fig. 3</figref> in Japanese Patent No. <patcit id="pcit0009" dnum="JP3666557B"><text>3, 666, 557</text></patcit> and <figref idref="f0001">Figs. 1</figref> and <figref idref="f0002">2</figref> in Japanese Patent No. <patcit id="pcit0010" dnum="JP5029315B"><text>5,029,315</text></patcit>.</p>
<p id="p0050" num="0050">As is obvious from these pieces of known literature, when the positive phase voltage command and the zero-phase voltage command are synthesized and given to the semiconductor switches 41 to 46 configuring the inverter 40 in <figref idref="f0001">Fig. 1</figref>, it is possible, firstly, to convert the voltage of the capacitor 30 to a three-phase alternating current voltage by a normal inverter operation in accordance with the positive phase voltage command,<!-- EPO <DP n="19"> --> and apply the three-phase alternating current voltage to the alternating current motor 50.</p>
<p id="p0051" num="0051">Also, the zero-phase voltage of the inverter 40 is controlled in accordance with the zero-phase voltage command, and zero-phase power is exchanged between the direct current power source 10 and the capacitor 30 by the switching operations of the upper and lower arm portion 40A acting as an equivalently configured zero-phase converter and of the other upper and lower arm portion 90, thus enabling a buck-boost operation to be carried out. For example, when the semiconductor switches 42, 44, and 46 in the lower arm of the inverter 40 in <figref idref="f0001">Fig. 1</figref> are turned on at the same time (the semiconductor switch 48 in <figref idref="f0002">Fig. 2</figref> is turned on), and the semiconductor switch 91 of the upper and lower arm portion 90 is turned on, by the zero-phase voltage command, energy is stored in the leakage inductance 51 from the direct current power source 10. Next, when the semiconductor switches 42, 44, and 46 in the lower arm of the inverter 40 in <figref idref="f0001">Fig. 1</figref> are turned off at the same time (the semiconductor switch 48 in <figref idref="f0002">Fig. 2</figref> is turned off) and the semiconductor switch 91 is turned off, the energy stored in the leakage inductance 51 is supplied to the capacitor 30 via the reflux diodes of the semiconductor switches 41, 43, and 45 (the semiconductor switch 47 in <figref idref="f0002">Fig. 2</figref>) and the reflux diode of the semiconductor switch 92, meaning that it is possible to charge the capacitor 30. When turning off the<!-- EPO <DP n="20"> --> semiconductor switches 42, 44, and 46 at the same time, the semiconductor switch 91 may be maintained in an on state.</p>
<p id="p0052" num="0052">That is, the buck-boost capacitor 70A in <figref idref="f0002">Fig. 2</figref> is such that the semiconductor switches 47 and 48 of the upper and lower arm portion 40A and the semiconductor switches 91 and 92 of the upper and lower arm portion 90 in <figref idref="f0001">Figs. 1</figref> and <figref idref="f0002">2</figref> are turned on and off, thereby causing current to flow from the direct current power source 10 to the leakage inductance 51 in <figref idref="f0002">Fig. 2</figref> and thus storing energy in the leakage inductance 51, and furthermore, the energy is supplied to the capacitor 30 via the reflux diodes of the semiconductor switches 47 and 92 in <figref idref="f0002">Fig. 2</figref>, meaning that it is possible to charge the capacitor 30 using the energy of the direct current power source 10.</p>
<p id="p0053" num="0053">Herein, the semiconductor switches 91 and 92 of the upper and lower arm portion 90 and the leakage inductance 51 operate as a buck chopper, and the semiconductor switches 47 and 48 of the upper and lower arm portion 40A and the leakage inductance 51 operate as a boost chopper. Therefore, by adjusting the duty ratio of the semiconductor switches 91, 92, 47, and 48 configuring the buck and boost choppers, it is possible to control the direct current voltage of the inverter 40 (the voltage of the capacitor 30), and thus the alternating current output voltage of the inverter 40, with respect to the<!-- EPO <DP n="21"> --> voltage of the direct current power source 10 at a high degree of freedom.</p>
<p id="p0054" num="0054">In the embodiment, as heretofore described, in a condition in which the switch 100 in <figref idref="f0001">Fig. 1</figref> is turned on and the semiconductor switches 91 and 92 of the upper and lower arm portion 90 are turned off, it is possible to drive the alternating current motor 50 by the normal operation of the inverter 40 to which the direct current power source 10 is directly connected. As no boost operation is carried out in this operation mode, control is simplified, and no loss occurs either due to the neutral point current of the alternating current motor 50, compared with a heretofore known technology wherein the boost operation is constantly carried out while the inverter 40 is operating, as in <figref idref="f0003">Fig. 5</figref>.</p>
<p id="p0055" num="0055">Also, when turning off the switch 100 in <figref idref="f0001">Fig. 1</figref> and thus causing the inverter 40 to operate as a zero-phase converter, and switching the semiconductor switches 91 and 92 of the upper and lower arm portion 90, it is possible to carry out a buck-boost operation utilizing the leakage inductance 51 even without using a reactor, as heretofore known, meaning that it is possible to reduce the size and price of the whole system.</p>
<p id="p0056" num="0056">At the same time, as the buck-boost converter 70A is caused to operate as a buck-boost chopper, as previously<!-- EPO <DP n="22"> --> described, the degree of freedom of the direct current voltage of the inverter 40 is high, and it is thus possible to output a desired size of alternating current voltage to drive the alternating current motor 50.</p>
<p id="p0057" num="0057">Furthermore, as a permanent magnet synchronous motor used in, for example, an electric vehicle or a hybrid car, in general, having the kinds of speed-torque characteristics shown in <figref idref="f0002">Fig. 3</figref>, is such that the current of the motor is substantially proportional to the torque, it may be conceivable that the speed-current characteristics of the motor are also substantially the same as in <figref idref="f0003">Fig. 4</figref>.</p>
<p id="p0058" num="0058">According to <figref idref="f0002">Fig. 3</figref>, as less current is needed in a higher speed region of the motor, in other words, there is much room for being able to cause the neutral point current (zero-phase current) to flow with respect to a preset heat generation amount, the embodiment is suitable for a kind of case in which a boost operation is carried out in a high speed region which does not require so much torque.</p>
<p id="p0059" num="0059">As the terminal voltage of the alternating current motor, in general, rises along with an increase in rotation speed, in the event that it is possible to carry out a boost operation, it is possible, in accordance therewith, to design the terminal voltage of the motor to be a high voltage. As a result of this, current flowing through the motor is suppressed, thus enabling<!-- EPO <DP n="23"> --> a contribution to a reduction in the diameter of a cable through which to supply power to the motor, a reduction in the size of connection terminals and semiconductor elements, and a reduction in the size, weight, and cost of the whole system owing to the reduced volume.</p>
<heading id="h0012">Industrial Applicability</heading>
<p id="p0060" num="0060">The invention can be utilized in each kind of drive system wherein a load is driven by an inverter, including an in-vehicle power conversion system mounted on, for example, an electric vehicle or hybrid car.</p>
<heading id="h0013">Reference Signs List</heading>
<p id="p0061" num="0061">
<ul id="ul0003" list-style="none" compact="compact">
<li>10: Direct current power source</li>
<li>30: Capacitor</li>
<li>40: Inverter</li>
<li>40A: Second upper and lower arm portion</li>
<li>41 to 48: Semiconductor switches</li>
<li>50: Alternating current motor</li>
<li>50a: Neutral point</li>
<li>70A: Buck-boost converter</li>
<li>90: First upper and lower arm portion</li>
<li>91, 92: Semiconductor switch<!-- EPO <DP n="24"> --></li>
<li>100: Switch</li>
</ul></p>
</description>
<claims id="claims01" lang="en"><!-- EPO <DP n="25"> -->
<claim id="c-en-01-0001" num="0001">
<claim-text>A power conversion system, comprising:
<claim-text>a power storage device (30) which stores direct current power;</claim-text>
<claim-text>an inverter (40), between the positive and negative direct current terminals of which the power storage device (30) is connected, and between a plurality of alternating current terminals of which a load (50) having an inductance is connected, wherein a plurality of semiconductor switches (41, 42, 43, 44, 45, 46) are configuring the inverter (40);</claim-text>
<claim-text>a first upper and lower arm portion, configured by connecting first and second semiconductor switches (91, 92) in series, of which the connection point of the first and second semiconductor switches is connected to the neutral point (50a) of the load;</claim-text>
<claim-text>a direct current power source (10) connected in parallel to the first upper and lower arm portion; and</claim-text>
<claim-text>at least one pair of homopolar terminals, of pairs of homopolar terminals out of the positive and negative direct current terminals of the inverter (40) and the positive and negative terminals of the first upper and lower arm portion, are connected by a switch (100), and the other pair of homopolar terminals are set at the same potential;</claim-text>
<claim-text><b>characterized in that</b></claim-text>
<claim-text>the power conversion system is configured such that by switching the plurality of semiconductor switches (41, 42, 43, 44, 45, 46) configuring the inverter (40) in a<!-- EPO <DP n="26"> --> condition in which the switch (100) is turned on and the first and second semiconductor switches (91, 92) are turned off, an alternating current voltage is output from the inverter (40) to drive the load (50).</claim-text></claim-text></claim>
<claim id="c-en-01-0002" num="0002">
<claim-text>The power conversion system according to claim 1, <b>characterized in that</b><br/>
only one pair of homopolar terminals, of pairs of homopolar terminals out of the positive and negative direct current terminals of the inverter (40) and the positive and negative terminals of the first upper and lower arm portion, are connected by a switch (100), and the other pair of homopolar terminals are directly connected together.</claim-text></claim>
<claim id="c-en-01-0003" num="0003">
<claim-text>The power conversion system according to claim 1, <b>characterized in that</b><br/>
pairs of homopolar terminals, of the positive and negative direct current terminals of the inverter (40) and the positive and negative terminals of the first upper and lower arm portion, are connected one pair by each switch (100).</claim-text></claim>
<claim id="c-en-01-0004" num="0004">
<claim-text>The power conversion system according to claim 1, <b>characterized in that</b><br/>
the semiconductor switches (41, 42, 43, 44, 45, 46) configuring the inverter (40) and the first and second semiconductor switches (91, 92) configuring the first upper and lower arm portion are each configured of a semiconductor switching element and a reflux diode connected in reverse parallel thereto.</claim-text></claim>
<claim id="c-en-01-0005" num="0005">
<claim-text>The power conversion system according to claim 1, <b>characterized in that</b><br/>
the load is an alternating current motor (50), and the inductance which the load<!-- EPO <DP n="27"> --> has is a leakage inductance of the alternating current motor (50).</claim-text></claim>
<claim id="c-en-01-0006" num="0006">
<claim-text>A method for controlling the power conversion system according to any one of claims 1 to 5, <b>characterized in that</b><br/>
by switching the plurality of semiconductor switches (41, 42, 43, 44, 45, 46) configuring the inverter (40) in a condition in which the at least one switch (100) is turned on and the first and second semiconductor switches (91, 92) are turned off, an alternating current voltage is output from the inverter (40) to drive the load (50).</claim-text></claim>
<claim id="c-en-01-0007" num="0007">
<claim-text>The method for controlling the power conversion system according to claim 2, <b>characterized in that</b><br/>
the at least one switch (100) is turned off, and all the semiconductor switches (41, 43, 45) in the upper arm or all the semiconductor switches (42, 44, 46) in the lower arm of the inverter (40) are turned on or off at the same time, thereby equivalently configuring a second upper and lower arm portion (40A) formed of the series circuit of third and fourth semiconductor switches (47, 48), and that the first and second semiconductor switches (91, 92) are turned on and off, thereby causing a buck-boost chopper formed of the first upper and lower arm portion, the second upper and lower arm portion, and the inductance of the load (50) to operate, thus charging and discharging the power storage device (30).</claim-text></claim>
<claim id="c-en-01-0008" num="0008">
<claim-text>The method for controlling the power conversion system according to claim 3, <b>characterized in that</b><br/>
<!-- EPO <DP n="28"> -->in a condition in which one switch is constantly turned on, the other switch is turned off, and all the semiconductor switches (41, 43, 45) in the upper arm or all the semiconductor switches (42, 44, 46) in the lower arm of the inverter (40) are turned on or off at the same time, thereby equivalently configuring a second upper and lower arm portion (40A) formed of the series circuit of third and fourth semiconductor switches (47, 48), and that the first and second semiconductor switches (91, 92) are turned on and off, thereby causing a buck-boost chopper formed of the first upper and lower arm portion, the second upper and lower arm portion (40A), and the inductance of the load (50) to operate, thus charging and discharging the power storage device (30).</claim-text></claim>
<claim id="c-en-01-0009" num="0009">
<claim-text>The method of claim 7 or 8 for controlling the power conversion system, <b>characterized in that</b><br/>
a switching pattern of the inverter (40) for carrying out a buck-boost operation by the second upper and lower arm portion (40A) configures one portion of a switching pattern for outputting an alternating current voltage from the inverter (40) to drive the load (50).</claim-text></claim>
</claims>
<claims id="claims02" lang="de"><!-- EPO <DP n="29"> -->
<claim id="c-de-01-0001" num="0001">
<claim-text>Leistungswandlersystem mit:
<claim-text>einer Leistungsspeichervorrichtung (30), die Gleichstromleistung speichert;</claim-text>
<claim-text>einem Wechselrichter (40) zwischen dem positiven und dem negativen Gleichstromendanschluss, von denen die Leistungsspeichervorrichtung (30) angeschlossen wird, und zwischen mehreren Wechselstromendanschlüssen, von denen eine Last (50), die eine Induktivität aufweist, angeschlossen wird, wobei mehrere Halbleiterschalter (41, 42, 43, 44, 45, 46) den Wechselrichter (40) konfigurieren;</claim-text>
<claim-text>einem ersten oberen und unteren Armteil, der konfiguriert ist durch Anschließen eines ersten und eines zweiten Halbleiterschalters (91, 92) in einer Reihenschaltung, von denen der Verbindungspunkt des ersten und zweiten Halbleiterschalters an den Neutralpunkt (50a) der Last angeschlossen ist;</claim-text>
<claim-text>einer Gleichstromleistungsquelle (10), die parallel zum ersten oberen und unteren Armteil angeschlossen ist; und</claim-text>
<claim-text>mindestens einem Paar von gleichpoligen Endanschlüssen von den Paaren unipolarer Endanschlüsse aus den positiven und negativen Gleichstromendanschlüssen des Wechselrichters (40) und den positiven und negativen Endanschlüssen des ersten oberen und unteren Armteils, die durch einen Schalter (100) verbunden sind, und wobei das andere Paar von unipolaren Endanschlüssen auf das gleiche Potential gelegt ist;</claim-text>
<claim-text><b>dadurch gekennzeichnet, dass</b><!-- EPO <DP n="30"> --></claim-text>
<claim-text>das Leistungswandlersystem derart konfiguriert ist, dass durch das Schalten der mehreren Halbleiterschalter (41, 42, 43, 44, 45, 46), die den Wechselrichter (40) in einem Zustand konfigurieren, in dem der Schalter (100) eingeschaltet ist und der erste und zweite Halbleiterschalter (91, 92) ausgeschaltet sind, vom Wechselrichter (40) eine Wechselstromspannung ausgegeben wird, um die Last (50) anzusteuern.</claim-text></claim-text></claim>
<claim id="c-de-01-0002" num="0002">
<claim-text>Leistungswandlersystem nach Anspruch 1, <b>dadurch gekennzeichnet, dass</b><br/>
nur ein Paar von unipolaren Endanschlüssen von den Paaren unipolarer Endanschlüsse aus den positiven und negativen Gleichstromendanschlüssen des Wechselrichters (40) und den positiven und negativen Endanschlüssen des ersten oberen und unteren Armteils heraus, durch einen Schalter (100) verbunden ist und das andere Paar von unipolaren Endanschlüssen unmittelbar miteinander verbunden ist.</claim-text></claim>
<claim id="c-de-01-0003" num="0003">
<claim-text>Leistungswandlersystem nach Anspruch 1, <b>dadurch gekennzeichnet, dass</b><br/>
Paare unipolarer Endanschlüsse von den positiven und negativen Gleichstromendanschlüssen des Wechselrichters (40) und den positiven und negativen Endanschlüssen des ersten oberen und unteren Armteils durch jeden Schalter (100) in einem Paar verbunden sind.</claim-text></claim>
<claim id="c-de-01-0004" num="0004">
<claim-text>Leistungswandlersystem nach Anspruch 1, <b>dadurch gekennzeichnet, dass</b><br/>
die Halbleiterschalter (41, 42, 43, 44, 45, 46), die den Wechselrichter (40) konfigurieren, und der erste und zweite Halbleiterschalter (91, 92), die den ersten oberen und<!-- EPO <DP n="31"> --> unteren Armteil konfigurieren, jeweils aus einem Halbleiterschaltelement und einer Rücklaufdiode, die parallel dazu in Sperrrichtung geschaltet ist, eingerichtet sind.</claim-text></claim>
<claim id="c-de-01-0005" num="0005">
<claim-text>Leistungswandlersystem nach Anspruch 1, <b>dadurch gekennzeichnet, dass</b><br/>
die Last ein Wechselstrommotor (50) ist und die Induktivität, welche die Last hat, eine Streuinduktivität des Wechselstrommotors (50) ist.</claim-text></claim>
<claim id="c-de-01-0006" num="0006">
<claim-text>Verfahren zum Steuern des Leistungswandlersystems nach einem der Ansprüche 1 bis 5, <b>dadurch gekennzeichnet, dass</b><br/>
durch Schalten der mehreren Halbleiterschalter (41, 42, 43, 44, 45, 46), die den Wechselrichter (40) konfigurieren, in einem Zustand, in dem der mindestens eine Schalter (100) eingeschaltet ist und der erste und zweite Halbleiterschalter (91, 92) ausgeschaltet sind,<br/>
vom Wechselrichter (40) eine Wechselstromspannung ausgegeben wird, um die Last (50) anzusteuern.</claim-text></claim>
<claim id="c-de-01-0007" num="0007">
<claim-text>Verfahren zum Steuern des Leistungswandlersystems nach Anspruch 2, <b>dadurch gekennzeichnet, dass</b><br/>
der mindestens eine Schalter (100) ausgeschaltet wird und alle die Halbleiterschalter (41, 43, 45) in dem oberen Arm oder alle die Halbleiterschalter (42, 44, 46) in dem unteren Arm des Wechselrichters (40) zur gleichen Zeit eingeschaltet oder ausgeschaltet werden, wodurch ein zweiter oberer und unterer Armteil (40A) gleichwertig konfiguriert wird, der aus der Reihenschaltung des dritten und vierten Halbleiterschalters (47, 48) ausgebildet ist, und dass der<!-- EPO <DP n="32"> --> erste und zweite Halbleiterschalter (91, 92) ein- und ausgeschaltet werden, wodurch bewirkt wird, dass ein Abwärts-Aufwärts-Zerhacker, der aus dem ersten oberen und unteren Armteil, dem zweiten oberen und unteren Armteil und der Induktivität der Last (50) ausgebildet ist, derart in Betrieb gesetzt wird, dass die Leistungsspeichervorrichtung (30) aufgeladen und entladen wird.</claim-text></claim>
<claim id="c-de-01-0008" num="0008">
<claim-text>Verfahren zum Steuern des Leistungswandlersystems nach Anspruch 3, <b>dadurch gekennzeichnet, dass</b><br/>
in einem Zustand, in dem ein Schalter ständig eingeschaltet ist, der andere Schalter ausgeschaltet ist und alle Halbleiterschalter (41, 43, 45) in dem oberen Arm oder alle die Halbleiterschalter (42, 44, 46) in dem unteren Arm des Wechselrichters (40) zur gleichen Zeit eingeschaltet oder ausgeschaltet werden, wodurch ein zweiter oberer und unterer Armteil (40A) gleichwertig konfiguriert wird, der aus der Reihenschaltung des dritten und vierten Halbleiterschalters (47, 48) ausgebildet ist, und dass der erste und zweite Halbleiterschalter (91, 92) ein- und ausgeschaltet werden, wodurch bewirkt wird, dass ein Buck-Boost-Chopper, der aus dem ersten oberen und unteren Armteil, dem zweiten oberen und unteren Armteil (40A) und der Induktivität der Last (50) ausgebildet ist, derart in Betrieb gesetzt wird, dass die Leistungsspeichervorrichtung (30) aufgeladen und entladen wird.</claim-text></claim>
<claim id="c-de-01-0009" num="0009">
<claim-text>Verfahren nach Anspruch 7 oder 8 zum Steuern des Leistungswandlersystems, <b>dadurch gekennzeichnet, dass</b><br/>
ein Schaltmuster des Wechselrichters (40) zum Ausführen einer Buck-Boost-Operation durch den zweiten oberen und unteren Armteil (40A) einen Teil eines Schaltmusters zum Ausgeben einer Wechselstromspannung aus dem Wechselrichter<!-- EPO <DP n="33"> --> (40) konfiguriert, um die Last (50) anzusteuern.</claim-text></claim>
</claims>
<claims id="claims03" lang="fr"><!-- EPO <DP n="34"> -->
<claim id="c-fr-01-0001" num="0001">
<claim-text>Système de conversion de puissance, comportant :
<claim-text>un dispositif de stockage de puissance (30) lequel stocke une puissance en courant continu ;</claim-text>
<claim-text>un onduleur (40), entre les bornes de courant continu positives et négatives duquel le dispositif de stockage de puissance (30) est connecté, et entre une pluralité de bornes de courant alternatif duquel une charge (50) présentant une inductance est connectée, dans lequel une pluralité de commutateurs à semi-conducteur (41, 42, 43, 44, 45, 46) configure l'onduleur (40) ;</claim-text>
<claim-text>une première partie de bras supérieur et de bras inférieur, configurée en connectant des premier et second commutateurs à semi-conducteur (91, 92) en série, dont le point de connexion des premier et second commutateurs à semi-conducteur est connecté au point neutre (50a) de la charge ;</claim-text>
<claim-text>une source de puissance en courant continu (10) connectée en parallèle à la première partie de bras supérieur et de bras inférieur ; et</claim-text>
<claim-text>au moins une paire de bornes homopolaires des paires de bornes homopolaires parmi les bornes de courant continu positives et négatives de l'onduleur (40) et les bornes positives et négatives de la première partie de bras supérieur et de bras inférieur, est connectée par un commutateur (100), et l'autre paire de bornes homopolaires est réglée sur le même potentiel ;</claim-text>
<claim-text><b>caractérisé en ce que</b> :
<claim-text>le système de conversion de puissance est configuré de sorte que, en commutant la pluralité de commutateurs à semi-conducteur (41, 42, 43, 44, 45, 46) configurant l'onduleur (40) dans un état dans lequel le commutateur (100) est sous tension et les premier et second commutateurs à semi-conducteur (91, 92) sont hors tension, une tension alternative est délivrée en sortie à partir de l'onduleur (40) en vue de commander la charge (50).</claim-text></claim-text></claim-text></claim>
<claim id="c-fr-01-0002" num="0002">
<claim-text>Système de conversion de puissance selon la revendication 1, <b>caractérisé en ce que</b> :<!-- EPO <DP n="35"> -->
<claim-text>seule une paire de bornes homopolaires des paires de bornes homopolaires parmi les bornes de courant continu positives et négatives de l'onduleur (40) et les bornes positives et négatives de la première partie de bras supérieur et de bras inférieur, est connectée par un commutateur (100), et <b>en ce que</b> les bornes de l'autre paire de bornes homopolaires sont connectées directement ensemble.</claim-text></claim-text></claim>
<claim id="c-fr-01-0003" num="0003">
<claim-text>Système de conversion de puissance selon la revendication 1, <b>caractérisé en ce que</b> :
<claim-text>des paires de bornes homopolaires des bornes de courant continu positives et négatives de l'onduleur (40) et des bornes positives et négatives de la première partie de bras supérieur et de bras inférieur, sont connectées, une paire par chaque commutateur (100).</claim-text></claim-text></claim>
<claim id="c-fr-01-0004" num="0004">
<claim-text>Système de conversion de puissance selon la revendication 1, <b>caractérisé en ce que</b> :
<claim-text>les commutateurs à semi-conducteur (41, 42, 43, 44, 45, 46) configurant l'onduleur (40) et les premier et second commutateurs à semi-conducteur (91, 92) configurant la première partie de bras supérieur et de bras inférieur sont chacun configurés avec un élément de commutation à semi-conducteur et une diode de reflux connectée en parallèle inversement à celui-ci.</claim-text></claim-text></claim>
<claim id="c-fr-01-0005" num="0005">
<claim-text>Système de conversion de puissance selon la revendication 1, <b>caractérisé en ce que</b> :
<claim-text>la charge est un moteur à courant alternatif (50), et l'inductance que la charge présente est une inductance de fuite du moteur à courant alternatif (50).</claim-text></claim-text></claim>
<claim id="c-fr-01-0006" num="0006">
<claim-text>Procédé de commande du système de conversion de puissance selon l'une quelconque des revendications 1 à 5, <b>caractérisé en ce que</b> :
<claim-text>en commutant la pluralité de commutateurs à semi-conducteur (41, 42, 43, 44, 45, 46) configurant l'onduleur (40) dans un état dans lequel ledit au moins un commutateur (100) est sous tension et les premier et second commutateurs à semi-conducteur (91, 92) sont hors tension, une tension alternative est délivrée en sortie à partir de l'onduleur (40) en vue de commander la charge (50).</claim-text></claim-text></claim>
<claim id="c-fr-01-0007" num="0007">
<claim-text>Procédé de commande du système de conversion de puissance selon la revendication 2, <b>caractérisé en ce que</b> :
<claim-text>ledit au moins un commutateur (100) est hors tension, et tous les commutateurs à<!-- EPO <DP n="36"> --> semi-conducteur (41, 43, 45) dans le bras supérieur, ou tous les commutateurs à semi-conducteur (42, 44, 46) dans le bras inférieur de l'onduleur (40), sont mis sous tension ou hors tension simultanément, ce qui permet de configurer par conséquent de façon équivalente une seconde partie de bras supérieur et de bras inférieur (40A) formée du circuit en série des troisième et quatrième commutateurs à semi-conducteur (47, 48), et <b>en ce que</b> les premier et second commutateurs à semi-conducteur (91, 92) sont mis sous tension et hors tension, ce qui amène par conséquent un hacheur dévoltcur-survolteur formé de la première partie de bras supérieur et de bras inférieur, de la seconde partie de bras supérieur et de bras inférieur et de l'inductance de la charge (50), à fonctionner, chargeant et déchargeant ainsi le dispositif de stockage de puissance (30).</claim-text></claim-text></claim>
<claim id="c-fr-01-0008" num="0008">
<claim-text>Procédé de commande du système de conversion de puissance selon la revendication 3, <b>caractérisé en ce que</b> :
<claim-text>dans un état dans lequel un commutateur est constamment sous tension, l'autre commutateur est hors tension, et tous les commutateurs à semi-conducteur (41, 43, 45) dans le bras supérieur ou tous les commutateurs à semi-conducteur (42, 44, 46) dans le bras inférieur de l'onduleur (40) sont mis sous tension ou hors tension simultanément, ce qui permet par conséquent de configurer de façon équivalente une seconde partie de bras supérieur et de bras inférieur (40A) formée du circuit en série des troisième et quatrième commutateurs à semi-conducteur (47, 48), et <b>en ce que</b> les premier et second commutateurs à semi-conducteur (91, 92) sont sous tension et hors tension, ce qui amène par conséquent un hacheur dévolteur-survolteur formé de la première partie de bras supérieur et de bras inférieur, de la seconde partie de bras supérieur et de bras inférieur (40A) et de l'inductance de la charge (50), à fonctionner, chargeant et déchargeant ainsi le dispositif de stockage de puissance (30).</claim-text></claim-text></claim>
<claim id="c-fr-01-0009" num="0009">
<claim-text>Procédé selon la revendication 7 ou 8, pour commander le système de conversion de puissance, <b>caractérisé en ce que</b> :
<claim-text>un motif de commutation de l'onduleur (40) pour mettre en oeuvre une opération de dévoltage-survoltage par la seconde partie de bras supérieur et de bras inférieur (40A) configure une partie d'un motif de commutation pour délivrer en sortie une tension alternative à partir de l'onduleur (40) en vue de commander la charge (50).</claim-text></claim-text></claim>
</claims>
<drawings id="draw" lang="en"><!-- EPO <DP n="37"> -->
<figure id="f0001" num="1"><img id="if0001" file="imgf0001.tif" wi="162" he="171" img-content="drawing" img-format="tif"/></figure><!-- EPO <DP n="38"> -->
<figure id="f0002" num="2,3"><img id="if0002" file="imgf0002.tif" wi="157" he="233" img-content="drawing" img-format="tif"/></figure><!-- EPO <DP n="39"> -->
<figure id="f0003" num="4,5"><img id="if0003" file="imgf0003.tif" wi="158" he="215" img-content="drawing" img-format="tif"/></figure><!-- EPO <DP n="40"> -->
<figure id="f0004" num="6"><img id="if0004" file="imgf0004.tif" wi="160" he="137" img-content="drawing" img-format="tif"/></figure>
</drawings>
<ep-reference-list id="ref-list">
<heading id="ref-h0001"><b>REFERENCES CITED IN THE DESCRIPTION</b></heading>
<p id="ref-p0001" num=""><i>This list of references cited by the applicant is for the reader's convenience only. It does not form part of the European patent document. Even though great care has been taken in compiling the references, errors or omissions cannot be excluded and the EPO disclaims all liability in this regard.</i></p>
<heading id="ref-h0002"><b>Patent documents cited in the description</b></heading>
<p id="ref-p0002" num="">
<ul id="ref-ul0001" list-style="bullet">
<li><patcit id="ref-pcit0001" dnum="JP2004120844A"><document-id><country>JP</country><doc-number>2004120844</doc-number><kind>A</kind></document-id></patcit><crossref idref="pcit0001">[0014]</crossref></li>
<li><patcit id="ref-pcit0002" dnum="JP2011041336A"><document-id><country>JP</country><doc-number>2011041336</doc-number><kind>A</kind></document-id></patcit><crossref idref="pcit0002">[0014]</crossref></li>
<li><patcit id="ref-pcit0003" dnum="JP2004350478A"><document-id><country>JP</country><doc-number>2004350478</doc-number><kind>A</kind></document-id></patcit><crossref idref="pcit0003">[0014]</crossref></li>
<li><patcit id="ref-pcit0004" dnum="JP2009106098A"><document-id><country>JP</country><doc-number>2009106098</doc-number><kind>A</kind></document-id></patcit><crossref idref="pcit0004">[0015]</crossref></li>
<li><patcit id="ref-pcit0005" dnum="EP1206028A2"><document-id><country>EP</country><doc-number>1206028</doc-number><kind>A2</kind></document-id></patcit><crossref idref="pcit0005">[0016]</crossref></li>
<li><patcit id="ref-pcit0006" dnum="EP2048774A2"><document-id><country>EP</country><doc-number>2048774</doc-number><kind>A2</kind></document-id></patcit><crossref idref="pcit0006">[0017]</crossref></li>
<li><patcit id="ref-pcit0007" dnum="US2012286705A1"><document-id><country>US</country><doc-number>2012286705</doc-number><kind>A1</kind></document-id></patcit><crossref idref="pcit0007">[0018]</crossref></li>
<li><patcit id="ref-pcit0008" dnum="EP2031749A2"><document-id><country>EP</country><doc-number>2031749</doc-number><kind>A2</kind></document-id></patcit><crossref idref="pcit0008">[0019]</crossref></li>
<li><patcit id="ref-pcit0009" dnum="JP3666557B"><document-id><country>JP</country><doc-number>3666557</doc-number><kind>B</kind></document-id></patcit><crossref idref="pcit0009">[0049]</crossref></li>
<li><patcit id="ref-pcit0010" dnum="JP5029315B"><document-id><country>JP</country><doc-number>5029315</doc-number><kind>B</kind></document-id></patcit><crossref idref="pcit0010">[0049]</crossref></li>
</ul></p>
<heading id="ref-h0003"><b>Non-patent literature cited in the description</b></heading>
<p id="ref-p0003" num="">
<ul id="ref-ul0002" list-style="bullet">
<li><nplcit id="ref-ncit0001" npl-type="s"><article><atl/><serial><sertitle>Comparative Evaluation of Soft-Switching Concepts for Bi-directional Buck+Boost Dc-Dc Converters</sertitle></serial><location><pp><ppf>1856</ppf><ppl>1865</ppl></pp></location></article></nplcit><crossref idref="ncit0001">[0020]</crossref></li>
</ul></p>
</ep-reference-list>
</ep-patent-document>
