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<!DOCTYPE ep-patent-document PUBLIC "-//EPO//EP PATENT DOCUMENT 1.5//EN" "ep-patent-document-v1-5.dtd">
<ep-patent-document id="EP13867509B1" file="EP13867509NWB1.xml" lang="en" country="EP" doc-number="2939307" kind="B1" date-publ="20181003" status="n" dtd-version="ep-patent-document-v1-5">
<SDOBI lang="en"><B000><eptags><B001EP>ATBECHDEDKESFRGBGRITLILUNLSEMCPTIESILTLVFIROMKCYALTRBGCZEEHUPLSK..HRIS..MTNORS..SM..................</B001EP><B003EP>*</B003EP><B005EP>J</B005EP><B007EP>BDM Ver 0.1.63 (23 May 2017) -  2100000/0</B007EP></eptags></B000><B100><B110>2939307</B110><B120><B121>EUROPEAN PATENT SPECIFICATION</B121></B120><B130>B1</B130><B140><date>20181003</date></B140><B190>EP</B190></B100><B200><B210>13867509.5</B210><B220><date>20130912</date></B220><B240><B241><date>20150626</date></B241><B242><date>20170609</date></B242></B240><B250>en</B250><B251EP>en</B251EP><B260>en</B260></B200><B300><B310>20120154094</B310><B320><date>20121227</date></B320><B330><ctry>KR</ctry></B330><B310>20130108857</B310><B320><date>20130911</date></B320><B330><ctry>KR</ctry></B330></B300><B400><B405><date>20181003</date><bnum>201840</bnum></B405><B430><date>20151104</date><bnum>201545</bnum></B430><B450><date>20181003</date><bnum>201840</bnum></B450><B452EP><date>20180518</date></B452EP></B400><B500><B510EP><classification-ipcr sequence="1"><text>H01P   3/16        20060101AFI20160928BHEP        </text></classification-ipcr><classification-ipcr sequence="2"><text>H01P   5/107       20060101ALI20160928BHEP        </text></classification-ipcr><classification-ipcr sequence="3"><text>H01P   3/12        20060101ALI20160928BHEP        </text></classification-ipcr></B510EP><B540><B541>de</B541><B542>NIEDERLEISTUNGS- UND HOCHGESCHWINDIGKEITS-MEHRKANAL-CHIP-ZU-CHIP-SCHNITTSTELLE MIT EINEM DIELEKTRISCHEN WELLENLEITER</B542><B541>en</B541><B542>LOW POWER, HIGH SPEED MULTI-CHANNEL CHIP-TO-CHIP INTERFACE USING DIELECTRIC WAVEGUIDE</B542><B541>fr</B541><B542>INTERFACE ENTRE PUCES À PLUSIEURS CANAUX, À GRANDE VITESSE ET À FAIBLE PUISSANCE UTILISANT UN GUIDE D'ONDES DIÉLECTRIQUE</B542></B540><B560><B561><text>EP-A2- 2 105 961</text></B561><B561><text>JP-A- 2008 193 161</text></B561><B561><text>US-A- 5 528 074</text></B561><B561><text>US-A1- 2006 145 778</text></B561><B561><text>US-A1- 2006 145 778</text></B561><B561><text>US-A1- 2010 148 891</text></B561><B561><text>US-A1- 2011 181 375</text></B561><B561><text>US-A1- 2011 194 240</text></B561><B561><text>US-A1- 2012 176 285</text></B561><B562><text>SATOSHI FUKUDA ET AL: "A 12.5+12.5 Gb/s Full-Duplex Plastic Waveguide Interconnect", IEEE JOURNAL OF SOLID-STATE CIRCUITS, IEEE SERVICE CENTER, PISCATAWAY, NJ, USA, vol. 46, no. 12, 1 December 2011 (2011-12-01), pages 3113-3125, XP011379217, ISSN: 0018-9200, DOI: 10.1109/JSSC.2011.2168870</text></B562><B565EP><date>20161006</date></B565EP></B560></B500><B700><B720><B721><snm>BAE, Hyeon Min</snm><adr><str>c/o Korea Advanced Institute of Science 
and Technology
291 Daehak-ro, Yuseong-gu</str><city>Daejeon, 34141</city><ctry>KR</ctry></adr></B721><B721><snm>SONG, Ha II</snm><adr><str>c/o Korea Advanced Institute of Science and
Technology
291 Daehak-ro, Yuseong-gu</str><city>Daejeon, 34141</city><ctry>KR</ctry></adr></B721><B721><snm>JIN, Huxian</snm><adr><str>c/o Korea Advanced Institute of Science
and Technology
291 Daehak-ro, Yuseong-gu</str><city>Daejeon, 34141</city><ctry>KR</ctry></adr></B721></B720><B730><B731><snm>Korea Advanced Institute Of Science And Technology</snm><iid>101755680</iid><irf>P108444EP00</irf><adr><str>291 Daehak-ro, Yuseong-gu</str><city>Daejeon, 34141</city><ctry>KR</ctry></adr></B731></B730><B740><B741><snm>V.O.</snm><iid>101551773</iid><adr><str>P.O. Box 87930</str><city>2508 DH Den Haag</city><ctry>NL</ctry></adr></B741></B740></B700><B800><B840><ctry>AL</ctry><ctry>AT</ctry><ctry>BE</ctry><ctry>BG</ctry><ctry>CH</ctry><ctry>CY</ctry><ctry>CZ</ctry><ctry>DE</ctry><ctry>DK</ctry><ctry>EE</ctry><ctry>ES</ctry><ctry>FI</ctry><ctry>FR</ctry><ctry>GB</ctry><ctry>GR</ctry><ctry>HR</ctry><ctry>HU</ctry><ctry>IE</ctry><ctry>IS</ctry><ctry>IT</ctry><ctry>LI</ctry><ctry>LT</ctry><ctry>LU</ctry><ctry>LV</ctry><ctry>MC</ctry><ctry>MK</ctry><ctry>MT</ctry><ctry>NL</ctry><ctry>NO</ctry><ctry>PL</ctry><ctry>PT</ctry><ctry>RO</ctry><ctry>RS</ctry><ctry>SE</ctry><ctry>SI</ctry><ctry>SK</ctry><ctry>SM</ctry><ctry>TR</ctry></B840><B860><B861><dnum><anum>KR2013008240</anum></dnum><date>20130912</date></B861><B862>en</B862></B860><B870><B871><dnum><pnum>WO2014104536</pnum></dnum><date>20140703</date><bnum>201427</bnum></B871></B870></B800></SDOBI>
<description id="desc" lang="en"><!-- EPO <DP n="1"> -->
<heading id="h0001"><b>Technical field</b></heading>
<p id="p0001" num="0001">The present invention relates to a board-to-board interconnection device with an electrical fiber.</p>
<heading id="h0002"><b>Background Art</b></heading>
<p id="p0002" num="0002">Ever increasing demand for bandwidth in the wire line communications necessitates high-speed, low-power, low-cost I/O. The drastic attenuation in the conventional copper wire line interconnects caused by skin effect in high frequencies limits the system performance. Penalty in receiver power, cost and area is occurred to compensate for the loss in the interconnection, and increases exponentially as the data rate or transmit distance increases. A new chip-to-chip interface using dielectrics as transmitting channels is presented to resolve the problems mentioned above.</p>
<p id="p0003" num="0003"><patcit id="pcit0001" dnum="US2006145778A"><text>US2006145778</text></patcit> discloses an RF interconnection between RF Printed Wiring Boards that includes a waveguide transmission line coupled between the RF Printed Wiring Boards. Waveguide feed circuits are use to launch signals into and couple signals out of the transmission line. The feed circuits are provided as micro-strip ("patch") antenna elements on Printed Wiring Board surfaces. The ends of the waveguide are conductively attached to the ground planes of the respective Printed Wiring Boards.</p>
<p id="p0004" num="0004"><patcit id="pcit0002" dnum="US5528074A"><text>US5528074</text></patcit> discloses a semiconductor device with a substrate that has a microwave semiconductor element, a microwave transmission line and a<!-- EPO <DP n="2"> --> waveguide terminal structure. The waveguide terminal structure is connected to an end of an external waveguide. Input and output of microwave signals between the semiconductor device and an external device are carried out simply by applying an end of the external waveguide to the waveguide terminal structure. The external dielectric waveguide has a dielectric core, a dielectric cladding and ground metal film coating the cladding.<br/>
<patcit id="pcit0003" dnum="US2011194240A"><text>US2011194240</text></patcit> discloses a wireless communication unit with hinged sections. An antenna is located within a first section and a radio wave transceiver section is located in a second section. A waveguide assembly provides coupling through the sections such that the antenna is electrically coupled to the radio wave transceiver section. Part of the waveguide assembly is a flexible waveguide, and the document describes the possibility of using a flexible waveguide with a dielectric core and a conductive plating, which may be copper, gold, aluminum etc.</p>
<p id="p0005" num="0005"><patcit id="pcit0004" dnum="JP2008193161B"><text>JP2008193161</text></patcit> discloses a micro strip line-waveguide converter to perform conversion between transmission modes of a micro strip line and a waveguide with a small transmission loss over a wide frequency band and having a flat frequency characteristic. The waveguide is formed by a hollow metal pipe with rectangular cross section. The micro strip line is provided on a substrate that extends perpendicularly to the axial direction of the pipe on the opening diameter of the pipe. The end of the strip line is located over the rectangular cross section on the top of the substrate. On the underside of the substrate. which that faces the opening diameter of the waveguide pipe, a conductor island is provides that form a patch antenna.</p>
<p id="p0006" num="0006">To increase the bandwidth, the substrate of <patcit id="pcit0005" dnum="JP2008193161B"><text>JP2008193161</text></patcit> comprises a stack of a plurality of dielectric layers. First holes penetrate the dielectric substrate layers outside an opening diameter of the waveguide. Second holes, penetrating only the top dielectric substrate layer, are located inside the opening diameter<!-- EPO <DP n="3"> --> of the waveguide. This reduces the volume of the dielectric part of <patcit id="pcit0006" dnum="JP2008193161B"><text>JP2008193161</text></patcit>, making it possible to suppress the occurrence of higher-order resonance mode in the in the dielectric substrate.</p>
<heading id="h0003"><b>Disclosure of Invention</b></heading>
<heading id="h0004"><b>Solution to problem</b></heading>
<p id="p0007" num="0007">A board-to-board interconnection device according to claim 1 is provided.<!-- EPO <DP n="4"> --></p>
<p id="p0008" num="0008">It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory and are intended to provide further explanation of the invention as claimed.</p>
<heading id="h0005">Brief Description of the Drawings</heading>
<p id="p0009" num="0009">The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification, illustrate embodiments of the invention, and together with the description serve to explain the principles of the invention.
<ul id="ul0001" list-style="none">
<li><figref idref="f0001">FIG. 1</figref> shows an isometric perspective view according to an exemplary embodiment of the invention.</li>
<li><figref idref="f0001 f0002">FIG. 2</figref> shows a simplified model of the overall interconnect as a 2-Port network and a relation between reflected waves and transmitted waves at each transitions according to an exemplary embodiment of the present invention.</li>
<li><figref idref="f0002 f0003">FIG. 3</figref> shows a graph of analytic estimation and simulated results for S-parameters of the overall interconnect constructed in accordance with the invention.</li>
<li><figref idref="f0003 f0004">FIG. 4</figref> shows a graph of analytic estimation and simulated results for S-parameters of the overall interconnect constructed in accordance with the invention.</li>
<li><figref idref="f0004">FIG. 5</figref> shows a graph of anlytic estimation and simulated results for Group Delay of the overall interconnect constructed in accordance with the invention.<!-- EPO <DP n="5"> --></li>
<li><figref idref="f0005">FIG. 6</figref> shows a side view of a waveguide to microstrip transition constructed in accordance with one embodiment of the invention.</li>
<li><figref idref="f0005">FIG. 7</figref> shows a front view of a waveguide to microstrip transition constructed in accordance with one embodiment of the invention.</li>
<li><figref idref="f0006">FIG. 8</figref> shows an exploded view of a waveguide to microstrip transition constructed in accordance with one embodiment of the invention.</li>
<li><figref idref="f0006">FIG. 9</figref> shows an isometric view of different length of an electrical fiber with that of metal cladding and tapered waveguide constructed in accordance with the invention.</li>
<li><figref idref="f0007">FIG. 10</figref> shows an isometric view of a board-to-waveguide connector constructed in accordance with an embodiment of the invention.</li>
<li><figref idref="f0007">FIG. 11</figref> shows a graph of simulated results for S-parameters of the overall interconnect constructed in accordance with the invention.<!-- EPO <DP n="6"> --></li>
<li><figref idref="f0007">FIG. 12</figref> shows a graph of simulated results for Eye diagram of PAM4 28Gbps PRBS 2<sup>14</sup>-1 for 65GHz channel.</li>
</ul></p>
<heading id="h0006"><b>Mode for the Invention</b></heading>
<p id="p0010" num="0010">The invention is described more fully hereinafter with reference to the accompanying drawings, in which exemplary embodiments of the invention are shown. This invention may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these exemplary embodiments are provided so that this disclosure is thorough, and will fully convey the scope of the invention to those skilled in the art. In the drawings, the size and relative sizes of layers and regions may be exaggerated for clarity. Like reference numerals in the drawings denote like elements.</p>
<p id="p0011" num="0011">An exemplary embodiment of the present invention may provide an improved interconnect instead of electrical wire line. A novel type of dielectric waveguide named, for example, an electrical fiber may be presented to replace conventional copper line. The electrical fiber may be defined as a dielectric waveguide with metal cladding.</p>
<p id="p0012" num="0012">Dielectrics with frequency independent attenuation characteristics may enable high data rate transfer with little or even without any additional receiver-side compensation. Parallel channel data transfer may be available due to vertical coupling of the electrical fiber and PCB (printed circuit board). The PCB with the electrical fiber for board-to-board interconnect between tranceiver I/O may be defined as a board-to-board interconnection device. For example, the interconnection device may comprise the electrical fiber, a transmitter side board, a receiver side board, a board-to-fiber connector, a microstrip feeding line, a slotted ground plane, a ground plane, and a patch.</p>
<p id="p0013" num="0013">A novel board-to-fiber connector may be presented to securely fix multiple the electrical fibers to PCB as close as to each other to maximize area efficiency. Physically flexible characteristic of the electrical fiber may support to connect any termination in any location in free space. The metal cladding of the electrical fiber may maintain the total transceiver power consumption regardless of a length of the electrical fiber. The cladding also may isolate the interference of the signals in other wireless channels and adjacent electrical fibers, which typically may cause band-limitation problem.</p>
<p id="p0014" num="0014">Slot coupled patch type microstrip-to-waveguide transition may be adapted to minimize the reflection between microstrip and waveguide. Microstrip-to-waveguide transition may transit microstrip signal into waveguide signal, and it may have the advantage of low cost because it may be available in general PCB manufacture process</p>
<p id="p0015" num="0015"><figref idref="f0001">FIG. 1</figref> shows an isometric perspective view according to an exemplary embodiment<!-- EPO <DP n="7"> --> of the invention.</p>
<p id="p0016" num="0016">Referring to <figref idref="f0001">FIG.1</figref>, an overall interconnect of an exemplary embodiment of the invention may be shown in isometric perspective view. <figref idref="f0001">FIG.1</figref> may illustrate the electrical fiber 101 used as a board-to-board interconnect. Incident signal may come from the 50-Ohm matched output of the transmitter die 102 to propagate along the transmission line 103 and then Microstrip-to-Waveguide Transition 104 (for example, MWT) on the transmitter side board may convert the microstrip signal into the waveguide signal. The wave, for example the waveguide signal, may transmit along the electrical fiber 101 and then may be converted into microstrip signal at the MWT 105 on the receiver side board. Likewise, signal may propagate along the transmission line 106 and then may go into the 50-Ohm matched receiver input 107. Herein, the dielectric waveguide may propagate a signal from the transmitter side board to the receiver side board.</p>
<p id="p0017" num="0017"><figref idref="f0001 f0002">FIG. 2</figref> shows a simplified model of the overall interconnect as a 2-Port network and a relation between reflected waves and transmitted waves at each transitions according to the exemplary embodiment of the present invention.</p>
<p id="p0018" num="0018">At each end side of the electrical fiber, impedance discontinuity may lead to inefficient transmission of energy both from the transmission line to the waveguide and from the waveguide to the transmission line. To analyze the effect of these discontinuities, overall interconnect may be considered as the simple 2-port networks as <figref idref="f0001 f0002">FIG. 2</figref>, Equation 1, Equation 2 and Equation 3.<maths id="math0001" num="[Equation 1]"><math display="block"><mfenced open="[" close="]"><mtable><mtr><mtd><msubsup><mi mathvariant="normal">u</mi><mn>1</mn><mo>−</mo></msubsup></mtd></mtr><mtr><mtd><msup><mi>w</mi><mo>+</mo></msup></mtd></mtr></mtable></mfenced><mo>=</mo><mfenced open="[" close="]"><mtable><mtr><mtd><mrow><msub><mi>r</mi><mn>1</mn></msub><mi mathvariant="normal"> </mi><msup><mi>e</mi><mrow><mi>j</mi><msub><mi>α</mi><mn>1</mn></msub></mrow></msup></mrow></mtd><mtd><mrow><msub><mi>t</mi><mn>2</mn></msub><mi mathvariant="normal"> </mi><msup><mi>e</mi><mrow><mi>j</mi><msub><mi>β</mi><mn>2</mn></msub></mrow></msup></mrow></mtd></mtr><mtr><mtd><mrow><msub><mi>t</mi><mn>1</mn></msub><mi mathvariant="normal"> </mi><msup><mi>e</mi><mrow><mi>j</mi><msub><mi>β</mi><mn>1</mn></msub></mrow></msup></mrow></mtd><mtd><mrow><msub><mi>r</mi><mn>2</mn></msub><mi mathvariant="normal"> </mi><msup><mi>e</mi><mrow><mi>j</mi><msub><mi>α</mi><mn>2</mn></msub></mrow></msup></mrow></mtd></mtr></mtable></mfenced><mfenced open="[" close="]"><mtable><mtr><mtd><msubsup><mi>u</mi><mn>1</mn><mo>+</mo></msubsup></mtd></mtr><mtr><mtd><msup><mi>w</mi><mo>−</mo></msup></mtd></mtr></mtable></mfenced></math><img id="ib0001" file="imgb0001.tif" wi="47" he="21" img-content="math" img-format="tif"/></maths> <maths id="math0002" num="[Equation 2]"><math display="block"><mfenced open="[" close="]"><mtable><mtr><mtd><mrow><msup><mi>w</mi><mo>+</mo></msup><mo>′</mo></mrow></mtd></mtr><mtr><mtd><mrow><msup><mi>w</mi><mo>−</mo></msup><mo>′</mo></mrow></mtd></mtr></mtable></mfenced><mo>=</mo><mfenced open="[" close="]"><mtable><mtr><mtd><mrow><mi>s</mi><mi mathvariant="normal"> </mi><msup><mi>e</mi><mrow><mo>−</mo><mi mathvariant="italic">ikl</mi></mrow></msup></mrow></mtd><mtd><mn>0</mn></mtd></mtr><mtr><mtd><mn>0</mn></mtd><mtd><mrow><mi>s</mi><mi mathvariant="normal"> </mi><msup><mi>e</mi><mrow><mo>−</mo><mi mathvariant="italic">ikl</mi></mrow></msup></mrow></mtd></mtr></mtable></mfenced><mfenced open="[" close="]"><mtable><mtr><mtd><msup><mi>w</mi><mo>+</mo></msup></mtd></mtr><mtr><mtd><msup><mi>w</mi><mo>−</mo></msup></mtd></mtr></mtable></mfenced></math><img id="ib0002" file="imgb0002.tif" wi="54" he="19" img-content="math" img-format="tif"/></maths> <maths id="math0003" num="[Equation 3]"><math display="block"><mfenced open="[" close="]"><mtable><mtr><mtd><mrow><msup><mi>w</mi><mo>−</mo></msup><mo>′</mo></mrow></mtd></mtr><mtr><mtd><msubsup><mi>u</mi><mn>2</mn><mo>+</mo></msubsup></mtd></mtr></mtable></mfenced><mo>=</mo><mfenced open="[" close="]"><mtable><mtr><mtd><mrow><msub><mi>r</mi><mn>2</mn></msub><mi mathvariant="normal"> </mi><msup><mi>e</mi><mrow><mi>j</mi><msub><mi>α</mi><mn>2</mn></msub></mrow></msup></mrow></mtd><mtd><mrow><msub><mi>t</mi><mn>1</mn></msub><mi mathvariant="normal"> </mi><msup><mi>e</mi><mrow><mi>j</mi><msub><mi>β</mi><mn>1</mn></msub></mrow></msup></mrow></mtd></mtr><mtr><mtd><mrow><msub><mi>t</mi><mn>2</mn></msub><mi mathvariant="normal"> </mi><msup><mi>e</mi><mrow><mi>j</mi><msub><mi>β</mi><mn>2</mn></msub></mrow></msup></mrow></mtd><mtd><mrow><msub><mi>r</mi><mn>1</mn></msub><mi mathvariant="normal"> </mi><msup><mi>e</mi><mrow><mi>j</mi><msub><mi>α</mi><mn>1</mn></msub></mrow></msup></mrow></mtd></mtr></mtable></mfenced><mfenced open="[" close="]"><mtable><mtr><mtd><msubsup><mi>u</mi><mn>1</mn><mo>+</mo></msubsup></mtd></mtr><mtr><mtd><msup><mi>w</mi><mo>−</mo></msup></mtd></mtr></mtable></mfenced></math><img id="ib0003" file="imgb0003.tif" wi="55" he="20" img-content="math" img-format="tif"/></maths></p>
<p id="p0019" num="0019">At the transition from the transmission line to the waveguide, the incident waves on the transmission line side and on the waveguide side may be expressed as <maths id="math0004" num=""><math display="inline"><msubsup><mstyle mathvariant="bold-italic"><mi>u</mi></mstyle><mn>1</mn><mo>+</mo></msubsup></math><img id="ib0004" file="imgb0004.tif" wi="5" he="5" img-content="math" img-format="tif" inline="yes"/></maths> and <b><i>w</i><sup>-</sup></b>, respectively. And, the reflected waves may be expressed as <b><i>w</i><sup>+</sup></b> and <maths id="math0005" num=""><math display="inline"><msubsup><mstyle mathvariant="bold-italic"><mi>u</mi></mstyle><mn>1</mn><mo>−</mo></msubsup><mo>.</mo></math><img id="ib0005" file="imgb0005.tif" wi="6" he="4" img-content="math" img-format="tif" inline="yes"/></maths> Likewise, at the transition from the waveguide to the transmission line, the incident waves on the<!-- EPO <DP n="8"> --> waveguide side and on the transmission line side may be expressed as <b><i>w</i><sup>+'</sup></b> and <maths id="math0006" num=""><math display="inline"><msubsup><mstyle mathvariant="bold-italic"><mi>u</mi></mstyle><mn>2</mn><mo>−</mo></msubsup><mo>.</mo></math><img id="ib0006" file="imgb0006.tif" wi="9" he="6" img-content="math" img-format="tif" inline="yes"/></maths> And, the reflected waves may be expressed as <b><i>w</i><sup>-'</sup></b> and <maths id="math0007" num=""><math display="inline"><msubsup><mstyle mathvariant="bold-italic"><mi>u</mi></mstyle><mn>2</mn><mo>+</mo></msubsup><mo>.</mo></math><img id="ib0007" file="imgb0007.tif" wi="5" he="4" img-content="math" img-format="tif" inline="yes"/></maths> From this simplified model, an equations of the relationship between the reflected waves and the transmitted waves may be made assumed that a complex reflection coefficient is <i>r</i><sub>1</sub> <i>e</i><sup><i>jα</i><sub2>1</sub2></sup> and a complex transmission coefficient is <i>t<sub>1</sub> e</i><sup><i>jβ</i><sub2>1</sub2></sup> at the transition from the transmission line to the waveguide and a complex reflection coefficient is <i>r</i><sub>2</sub> <i>e</i><sup><i>jα</i><sub2>2</sub2></sup> and a complex transmission coefficient is <i>t</i><sub>2</sub> <i>e</i><sup><i>jβ</i><sub2>2</sub2></sup> at the transition from the waveguide to the transmission line.</p>
<p id="p0020" num="0020">The following equations may express a scattering matrix (for example, S-parameter) of the overall interconnect.<maths id="math0008" num="[Equation 4]"><math display="block"><mfenced open="[" close="]"><mtable><mtr><mtd><msubsup><mi>u</mi><mn>1</mn><mo>−</mo></msubsup></mtd></mtr><mtr><mtd><msubsup><mi>u</mi><mn>2</mn><mo>+</mo></msubsup></mtd></mtr></mtable></mfenced><mo>=</mo><mfenced open="[" close="]"><mtable><mtr><mtd><msub><mi>S</mi><mn>11</mn></msub></mtd><mtd><msub><mi>S</mi><mn>12</mn></msub></mtd></mtr><mtr><mtd><msub><mi>S</mi><mn>21</mn></msub></mtd><mtd><msub><mi>S</mi><mn>22</mn></msub></mtd></mtr></mtable></mfenced><mo>⋅</mo><mfenced open="[" close="]"><mtable><mtr><mtd><msubsup><mi>u</mi><mn>1</mn><mo>+</mo></msubsup></mtd></mtr><mtr><mtd><msubsup><mi>u</mi><mn>2</mn><mo>−</mo></msubsup></mtd></mtr></mtable></mfenced></math><img id="ib0008" file="imgb0008.tif" wi="65" he="24" img-content="math" img-format="tif"/></maths> <maths id="math0009" num="[Equation 5]"><math display="block"><mrow><mo>|</mo><msub><mi>S</mi><mn>21</mn></msub><mo>|</mo></mrow><mo>=</mo><msup><mrow><mo>|</mo><mrow><mi>s</mi><mfrac><mrow><msub><mi>T</mi><mn>1</mn></msub><msub><mi>T</mi><mn>2</mn></msub><mo>−</mo><msub><mi>R</mi><mn>1</mn></msub><msub><mi>R</mi><mn>2</mn></msub><mo>−</mo><msub><mi>R</mi><mn>1</mn></msub></mrow><mrow><mi>E</mi><mo>−</mo><msup><mi>E</mi><mrow><mo>−</mo><mn>1</mn></mrow></msup><msubsup><mi>R</mi><mn>2</mn><mn>2</mn></msubsup></mrow></mfrac></mrow><mo>|</mo></mrow><mn>2</mn></msup><mo>,</mo><mfenced><mrow><msub><mi>T</mi><mi>i</mi></msub><mo>=</mo><msub><mi>t</mi><mi>i</mi></msub><mi mathvariant="normal"> </mi><msup><mi>e</mi><mrow><mi>i</mi><msub><mi>β</mi><mi>i</mi></msub></mrow></msup><mo>,</mo><mi mathvariant="normal"> </mi><msub><mi>R</mi><mi>i</mi></msub><mo>=</mo><msub><mi>r</mi><mi>i</mi></msub><mi mathvariant="normal"> </mi><msup><mi>e</mi><mrow><mi>i</mi><msub><mi>α</mi><mi>i</mi></msub></mrow></msup><mo>,</mo><mi>E</mi><mo>=</mo><msup><mi>e</mi><mi mathvariant="italic">ikl</mi></msup></mrow></mfenced></math><img id="ib0009" file="imgb0009.tif" wi="95" he="18" img-content="math" img-format="tif"/></maths> <maths id="math0010" num="[Equation 6]"><math display="block"><mrow><mo>|</mo><msub><mi>S</mi><mn>11</mn></msub><mo>|</mo></mrow><mo>=</mo><msup><mrow><mo>|</mo><mfrac><mrow><mi>E</mi><msub><mi>R</mi><mn>1</mn></msub><mo>−</mo><msup><mi>E</mi><mrow><mo>−</mo><mn>1</mn></mrow></msup><msub><mi>R</mi><mn>2</mn></msub><mfenced><mrow><msub><mi>T</mi><mn>1</mn></msub><msub><mi>T</mi><mn>2</mn></msub><mo>−</mo><msub><mi>R</mi><mn>1</mn></msub><msub><mi>R</mi><mn>2</mn></msub></mrow></mfenced></mrow><mrow><mi>E</mi><mo>−</mo><msup><mi>E</mi><mrow><mo>−</mo><mn>1</mn></mrow></msup><msubsup><mi>R</mi><mn>2</mn><mn>2</mn></msubsup></mrow></mfrac><mo>|</mo></mrow><mn>2</mn></msup></math><img id="ib0010" file="imgb0010.tif" wi="81" he="23" img-content="math" img-format="tif"/></maths> <maths id="math0011" num="[Equation 7]"><math display="block"><mi>G</mi><mi>r</mi><mi>o</mi><mi>u</mi><mi>p</mi><mi mathvariant="normal"> </mi><mi mathvariant="italic">Delay</mi><mo>=</mo><mfrac><mrow><mi>d</mi><mo>∠</mo><msub><mi>S</mi><mn>21</mn></msub></mrow><mi mathvariant="italic">dω</mi></mfrac></math><img id="ib0011" file="imgb0011.tif" wi="52" he="20" img-content="math" img-format="tif"/></maths> <maths id="math0012" num="[Equation 8]"><math display="block"><mo>∠</mo><msub><mi>S</mi><mn>21</mn></msub><mo>=</mo><msup><mi>tan</mi><mrow><mo>−</mo><mn>1</mn></mrow></msup><mfenced><mfrac><mrow><mi mathvariant="italic">Img</mi><mfenced open="{" close="}"><mrow><msub><mi>T</mi><mn>1</mn></msub><msub><mi>T</mi><mn>2</mn></msub></mrow></mfenced><mo>−</mo><mi mathvariant="italic">Img</mi><mfenced open="{" close="}"><mrow><msub><mi>R</mi><mn>1</mn></msub><msub><mi>R</mi><mn>2</mn></msub></mrow></mfenced><mo>−</mo><mi mathvariant="italic">Img</mi><mfenced open="{" close="}"><msub><mi>R</mi><mn>1</mn></msub></mfenced></mrow><mrow><mi mathvariant="italic">Re</mi><mfenced open="{" close="}"><mrow><msub><mi>T</mi><mn>1</mn></msub><msub><mi>T</mi><mn>2</mn></msub></mrow></mfenced><mo>−</mo><mi mathvariant="italic">Re</mi><mfenced open="{" close="}"><mrow><msub><mi>R</mi><mn>1</mn></msub><msub><mi>R</mi><mn>2</mn></msub></mrow></mfenced><mo>−</mo><mi mathvariant="italic">Re</mi><mfenced open="{" close="}"><msub><mi>R</mi><mn>1</mn></msub></mfenced></mrow></mfrac></mfenced><mo>−</mo><msup><mi>tan</mi><mrow><mo>−</mo><mn>1</mn></mrow></msup><mfenced><mfrac><mrow><mi mathvariant="italic">Img</mi><mfenced open="{" close="}"><mi>E</mi></mfenced><mo>−</mo><mi mathvariant="italic">Img</mi><mfenced open="{" close="}"><mrow><msub><mi>R</mi><mn>1</mn></msub><msub><mi>R</mi><mn>2</mn></msub><msup><mi>E</mi><mrow><mo>−</mo><mn>1</mn></mrow></msup></mrow></mfenced></mrow><mrow><mi mathvariant="italic">Re</mi><mfenced open="{" close="}"><mi>E</mi></mfenced><mo>−</mo><mi mathvariant="italic">Re</mi><mfenced open="{" close="}"><mrow><msub><mi>R</mi><mn>1</mn></msub><msub><mi>R</mi><mn>2</mn></msub><msup><mi>E</mi><mrow><mo>−</mo><mn>1</mn></mrow></msup></mrow></mfenced></mrow></mfrac></mfenced></math><img id="ib0012" file="imgb0012.tif" wi="132" he="18" img-content="math" img-format="tif"/></maths></p>
<p id="p0021" num="0021"><figref idref="f0002 f0003">FIG. 3</figref> shows a graph of analytic estimation and simulated results for S-parameters of the overall interconnect constructed in accordance with the invention. <figref idref="f0003 f0004">FIG. 4</figref> shows a graph of analytic estimation and simulated results for S-parameters of the overall interconnect constructed in accordance with the invention. <figref idref="f0004">FIG. 5</figref> shows a graph of anlytic estimation and simulated results for Group Delay of the overall interconnect constructed in accordance with the invention.</p>
<p id="p0022" num="0022"><figref idref="f0002 f0003">FIG. 3</figref>, <figref idref="f0003 f0004">FIG. 4</figref>, and <figref idref="f0004">FIG. 5</figref> may show a graph of analytic estimation results for S-parameters<!-- EPO <DP n="9"> --> of the overall interconnect constructed in accordance with the exemplary embodiment of the invention. For example, <figref idref="f0002 f0003">FIG. 3</figref>, <figref idref="f0003 f0004">FIG. 4</figref>, and <figref idref="f0004">FIG. 5</figref> may plot the above equation 5, equation 6, equation 7, and equation 8 and indicate the result from the different case of waveguide length (for instance, 5cm and 10cm). And each result may be compared to the simulation results from 3D Electromagnetic Simulation Tool (Ansys. HFSS).</p>
<p id="p0023" num="0023"><figref idref="f0002 f0003">FIG. 3</figref>, <figref idref="f0003 f0004">FIG. 4</figref>, and <figref idref="f0004">FIG. 5</figref> may say that there exists a waveguide-length- dependent-oscillation in the results of S-parameters and Group Delay of the overall interconnect. The longer the waveguide is, the more serious the impact of the oscillation may be shown up. If the eye diagram is used as a metric for the evaluation of this transmission system, the oscillation may make serious problem on the eye opening and zero crossing and even be the major reason of increased bit error rate.</p>
<p id="p0024" num="0024">The oscillation in the results of S-parameters and Group Delay may result from the fact that the reflected wave occured at the impedance discontinuity undergoes a slight attenuation along the propagation and it may make a phenomenon similar to what is happening in the cavity resonator. The wave may bounce back and forth within the electrical fiber and reinforce the standing wave.</p>
<p id="p0025" num="0025">Strategies for resolving this problem may be the followings: first, to make reflection coefficient (r2) as low as possible, second, to make proper attenuation along the electrical fiber while ensuring a relatively small level of channel loss, third, to use a low dielectric constant material for the waveguide. These strategies may be proved by the above equation 5, equation 6, equation 7, and equation 8. Accordingly, the MWT may be an object of the exemplary embodiment of the present invention to provide a lower reflection (r2).</p>
<p id="p0026" num="0026"><figref idref="f0005">FIG. 6</figref> shows a side view of a waveguide to microstrip transition constructed in accordance with one embodiment of the invention. <figref idref="f0005">FIG. 7</figref> shows a front view of a waveguide to microstrip transition constructed in accordance with one embodiment of the invention.</p>
<p id="p0027" num="0027"><figref idref="f0005">FIG. 6</figref> may show side view of the MWT and <figref idref="f0005">FIG. 7</figref> may show front view of the MWT constructed in accordance with one embodiment of the invention. The electrical fiber 604, 704 with a metal cladding 601,701 may be in contact with the microstrip circuit, especially with a patch element 603, 703 disposed on the board. Herein, the metal cladding 601, 701 may wrap up a dielectric waveguide 602, 702. For example, the metal cladding 601, 701 may comprise a copper cladding, and the patch element 603, 703 may comprise the microstrip line. The patch element 603, 703 may radiate the signal at a resonance frequency.</p>
<p id="p0028" num="0028">In accordance with an example of the present invention, the metal cladding 601, 701 may wrap up the dielectric waveguide 602, 702 with a predetermined form. For<!-- EPO <DP n="10"> --> example, the predetermined form of the metal cladding 601, 701 may expose a middle of the dielectric waveguide 602, 702, and the predetermined form of the metal cladding 601, 701 may be punctured to expose a specific part of the dielectric waveguide 602, 702. Also the predetermined form of the metal cladding 601, 701 may be various form.</p>
<p id="p0029" num="0029"><figref idref="f0006">FIG. 8</figref> shows an exploded view of a waveguide to microstrip transition constructed in accordance with one embodiment of the invention.</p>
<p id="p0030" num="0030"><figref idref="f0006">FIG. 8</figref> may show a detailed structure of each layer of the board. The 3-layers structure may be used in the manufacture of the board. The microstrip feeding line 801 may be located at a first floor, and the slotted ground plane 802, which is pierced by aperture, may be disposed on a second layer. A patch element 803 and the ground plane 804 may be disposed on a third layer. For example, the microstrip feeding line 801 may feed the signal to the microstrip circuit at the first layer, the slotted ground plane 802 may include a slot to minimize a ratio of backward propagation wave to forward propagation wave at the second layer, and the ground plane may include a via 807 to make an electrical connection between the slotted ground plane 802 and the ground plane 804 at the third layer. Herein, a via 807 may be disposed as an array.</p>
<p id="p0031" num="0031">A core substrate 805 between the first and the second layer may be made of Taconic. CER-10 having dimensions of 12mm × 5.68mm and thickness of 0.28mm. Another core substrate 806 between the second and the third layer may be made of Rogers. RO3010 Prepreg having dimensions of 12mm × 5.68mm and thickness of 0.287mm.</p>
<p id="p0032" num="0032">The Via 807 may play a role of making an electrical connection between the second and the third ground plane. The microstrip width, the substrate thickness, the slot size, the patch size, the via diameter, the via spacing, the waveguide size, the waveguide material may be modified depending on a particular resonance frequency of the microstrip circuit and the mode of the propagation wave along the electrical fiber, as it will be apparent to one skilled in the art.</p>
<p id="p0033" num="0033">Specially, the size of the slot and the aperture may be an important factor in the transmission and reflection of the signal. Those sizes may be optimized to minimize the ratio of backward propagation wave to forward propagation wave by iterative simulation. A cutoff frequency and an impedance of waveguide may be determined by the dimensions of the cross section and a kind of material used. For this invention, the dimensions of 2.9mm × 2.7mm and ECCOSTOCK PP (Laird TECHNOLOGIES.) may be used to pass 60 GHz band signal with a minimum reflection at the MWT. The larger the size of the cross section of the waveguide is, the larger the number of the TE/TM modes may be able to propagate. And it may lead to improvement in the insertion loss of the transition.</p>
<p id="p0034" num="0034"><figref idref="f0006">FIG. 9</figref> shows an exploded isometric view of different length of the electrical fiber with that of metal cladding and tapered waveguide constructed in accordance with one<!-- EPO <DP n="11"> --> embodiment of the invention.</p>
<p id="p0035" num="0035">To reduce the impact of the oscillation in the result of S-parameter, not only minimizing the reflection occurred at the MWT but taking optimized attenuation along the electrical fiber 901, 902, 903 may be used. This strategy may be embodied by shortening a length of the metal cladding which wraps up the dielectric waveguide of the electrical fiber 901, 902, 903 at each end. The metal cladding may perfectly confine the electromagnetic wave preventing a radiation loss of energy. For this reason, utilizing a short metal cladding may result in a large radiation loss. This kind of energy loss may be considered as an attenuation along the electrical fiber 901, 902, 903 and it may greatly influence the oscillation in the result of S-parameter.</p>
<p id="p0036" num="0036">Also, the dielectric loss may be considered as attenuation along the electrical fiber 901, 902, 903. It may result from a tangent loss of the dielectric waveguide and be relevant to the length of waveguide. The dielectric loss dissipated along the long waveguide may reduce the effect of the oscillation.</p>
<p id="p0037" num="0037">Therefore, long electrical fiber 903 may have bigger proportionality of metal cladding than short electrical fiber 901 while taking same amount of channel loss. One end of the electrical fiber 904 may indicate the isometric drawing of a tapered waveguide. It may be for the impedance matching between the dielectrics used for the dielectric waveguide and the microstrip circuits on the board. For example, a proportionality of a length of the metal cladding on a length of the dielectric waveguide may be designed based on a length of the electrical fiber 901, 902, 903.</p>
<p id="p0038" num="0038">Also, based on the well-known fact that the dimensions of the waveguide determines its impedance, linearly shaping at least one of both ends of the dielectric waveguide may be efficient for finding optimal impedance. Specifically, at least one of both ends of the dielectric waveguide may be tapered for impedance matching between the dielectric waveguide and microstrip circuits. For example, at least one of both ends of the dielectric waveguide may be shaped linearly to optimize an impedance of the dielectric waveguide with largest power transfer efficiency.</p>
<p id="p0039" num="0039">In accordance with one embodiment of the present invention, the interconnection device with the electrical fiber 901, 902, 903 for a board-to-board interconnect between tranceiver I/O, the interconnection device comprising, the electrical fiber 901, 902, 903 to propagate the signal from the transmitter side board to the receiver side board with the metal cladding and the microstrip circuit to contact with the electrical fiber 901, 902, 903 with the MWT.</p>
<p id="p0040" num="0040"><figref idref="f0007">FIG. 10</figref> shows an isometric view of a board-to-waveguide connector constructed in accordance with an embodiment of the invention.</p>
<p id="p0041" num="0041"><figref idref="f0007">FIG. 10</figref> may show an isometric view of the board-to-fiber connector 1001. The electrical fiber may be firmly fixed to the board with the board-to-fiber connector<!-- EPO <DP n="12"> --> 1001. Connector bridges 1002, 1003 may be inserted into holes bored through the board to fix it on the board. For example, the board-to-fiber connector 1001 connects the electrical fiber to at least one of the transmitter side board and the receiver side board vertically.</p>
<p id="p0042" num="0042">Also there may be an array of transition apparatuses 1004, 1005, 1006 in the connector for physical fixation of the electrical fiber. Using this connector, the electrical fiber may contact the microstrip circuit on the board. It may be a very efficient way for saving an area that the both end sides of the dielectric waveguide are vertically coupled with the transmitter side board and the receiver side board as illustrated in the <figref idref="f0007">FIG.10</figref>. Because of this configuration, a number of the electrical fiber may be used to connect the multiple channels concurrently for a parallel system with wide bandwidth. For example, the dielectric waveguide may be vertically coupled with at least one of the transmitter side board and the receiver side board.</p>
<p id="p0043" num="0043"><figref idref="f0007">FIG. 11</figref> shows a graph of simulated results for S-parameters of the overall interconnect constructed in accordance with one embodiment of the invention.</p>
<p id="p0044" num="0044">Referring to <figref idref="f0007">FIG. 11</figref>, simulated results for S-parameters of the overall interconnect constructed in accordance with one embodiment of the invention may be shown in the graph. For example, the results may be achieved using the 50 cm electrical fiber. For a return loss of 10 dB, a 15 GHz bandwidth, from 54 GHz to 79 GHz, may be achieved. The insertion loss on the passband may be found to be less than 15 dB and also constant along the wide band.</p>
<p id="p0045" num="0045"><figref idref="f0007">FIG. 12</figref> shows a graph of simulated results for Eye diagram of PAM4 28Gbps PRBS 2<sup>14</sup>-1 for 65GHz channel.</p>
<p id="p0046" num="0046">To evaluate the performance of the overall interconnect, <figref idref="f0007">FIG. 12</figref> may show an Eye-diagram of PAM4 28Gbps PRBS 2<sup>14</sup>-1. The Eye-diagram may represent the demodulated data pattern which may be modulated on the 65 GHz carrier and passed through the channel of the interconnect constructed in accordance with an exemplary embodiment.</p>
<p id="p0047" num="0047">The electrical fiber may propose a new method to make high-speed data communication possible. The MWT structure may transit the wideband signal while minimizing the reflection at the discontinuity. The metal cladding which wraps up the dielectric waveguide may reduce the radiation loss and be effective to decrease the channel loss.</p>
<p id="p0048" num="0048">Moreover, if a center frequency may move to higher frequency band, a wider bandwidth may be achieved without any additional complexity or cost. Therefore, the electrical fiber may be promising solution to I/O channel having a demand to transmit data with very high-speed. Especially, the electrical fiber may be able to replace the all copper wire line in the 100 Gbps backplane interface based on the IEEE 802.3 bj KR<!-- EPO <DP n="13"> --> standard. And it may be applied to IEEE 802.3 bj SR standard with lengthened transmission distance. A board-to-board interface may take the electrical fiber as a prospective solution in the datacenter market.</p>
<p id="p0049" num="0049">It will be apparent to those skilled in the art that various modifications and variation can be made. The scope of protection follows from the claims.</p>
</description>
<claims id="claims01" lang="en"><!-- EPO <DP n="14"> -->
<claim id="c-en-01-0001" num="0001">
<claim-text>A board-to-board interconnection device with an electrical fiber (101, 604, 704), the interconnection device comprising:
<claim-text>a transmitter side board and a receiver side board; an electrical fiber (101, 604, 704) configured to propagate a signal from the transmitter side board to the receiver side board with a metal cladding (601, 701);</claim-text>
<claim-text>a microstrip circuit disposed on the transmitter side board and the receiver side board and configured to contact with the electrical fiber (101, 604, 704) with a microstrip-to-waveguide transition (105);</claim-text>
<claim-text>wherein at least one of both ends of the electrical fiber (101, 604, 704) is tapered for impedance matching between the electrical fiber and the microstrip circuit on the interconnection device;</claim-text>
<claim-text>a board-to-fiber connector (1001) configured to connect multiple electrical fibers (101, 604, 704) to at least one of the transmitter side board and the receiver side board vertically;</claim-text>
<claim-text>wherein the board-to-fiber connector (1001) comprises:
<claim-text>connector bridges (1002, 1003) inserted into holes bored through at least one of the transmitter side board and the receiver side board;</claim-text>
<claim-text>multiple transition apparatuses (1004, 1005, 1006) for physical fixation of the multiple electrical fibers, respectively, to at least one of the transmitter side board and the receiver side board.</claim-text></claim-text></claim-text></claim>
<claim id="c-en-01-0002" num="0002">
<claim-text>The interconnection device of claim 1, wherein at least one of both ends of the electrical fiber is tapered linearly to optimize an impedance of the electrical fiber with a largest power transfer efficiency.</claim-text></claim>
<claim id="c-en-01-0003" num="0003">
<claim-text>The interconnection device of claim 1, wherein the metal cladding comprises a copper cladding.<!-- EPO <DP n="15"> --></claim-text></claim>
<claim id="c-en-01-0004" num="0004">
<claim-text>The interconnection device of claim 1, wherein a proportionality of a length of the metal cladding on a length of the electrical fiber is designed based on a length of the electrical fiber.</claim-text></claim>
<claim id="c-en-01-0005" num="0005">
<claim-text>The interconnection device of claim 1, wherein the interconnection device further comprises,<br/>
a microstrip feeding line configured to feed the signal to the microstrip circuit at a first layer;<br/>
a slotted ground plane including a slot configured to minimize a ratio of backward propagation wave to forward propagation wave at a second layer; a ground plane including an array of vias configured to make an electrical connection between the slotted ground plane and the ground plane at a third layer; and a patch configured to radiate the signal at a resonance frequency.</claim-text></claim>
<claim id="c-en-01-0006" num="0006">
<claim-text>The interconnection device of claim 1, wherein the metal cladding wraps up the dielectric waveguide with a predetermined form.</claim-text></claim>
</claims>
<claims id="claims02" lang="de"><!-- EPO <DP n="16"> -->
<claim id="c-de-01-0001" num="0001">
<claim-text>Platine-zu-Platine-Verbindungsvorrichtung mit einer elektrischen Faser (101, 604, 704), die Verbindung umfassend:
<claim-text>eine senderseitige Platine und eine empfängerseitige Platine;</claim-text>
<claim-text>eine elektrische Faser (101, 604, 704), konfiguriert zum Verbreiten eines Signals von der senderseitigen Platine zu der empfängerseitigen Platine mit einer Metallummantelung (601, 701);</claim-text>
<claim-text>einen Mikrostreifenstromkreis, angeordnet auf der senderseitigen Platine und der empfängerseitigen Platine und konfiguriert für Kontakt mit der elektrischen Faser (101, 604, 704) mit einem Mikrostreifen-zu-Wellenleiter-Übergang (105);</claim-text>
<claim-text>wobei mindestens eines von beiden Enden der elektrischen Faser (101, 604, 704) verjüngt ist für Impedanzanpassung zwischen der elektrischen Faser und dem Mikrostreifen-Stromkreis auf der Verbindungsvorrichtung;</claim-text>
<claim-text>einen Platine-zu-Faser-Konnektor (1001), konfiguriert zum vertikalen Verbinden von mehreren elektrischen Fasern (101, 604, 704) mit mindestens einer der senderseitigen Platine und der empfängerseitigen Platine;</claim-text>
<claim-text>wobei der Platine-zu-Faser-Konnektor (1001) Folgendes umfasst:
<claim-text>Konnektorbrücken (1002, 1003), eingesetzt in Löcher, gebohrt durch mindestens eine der senderseitigen Platine und der empfängerseitigen Platine;</claim-text>
<claim-text>mehrere Übergangsvorrichtungen (1004, 1005, 1006) für physikalische Befestigung der mehreren elektrischen Fasern an jeweils mindestens einer der senderseitigen Platine und der empfängerseitigen Platine.</claim-text></claim-text></claim-text></claim>
<claim id="c-de-01-0002" num="0002">
<claim-text>Verbindungsvorrichtung nach Anspruch 1, wobei mindestens eines von beiden Enden der elektrischen Faser linear verjüngt ist, um eine Impedanz der elektrischen Faser mit einer größten Leistungsübertragungseffizienz zu optimieren.<!-- EPO <DP n="17"> --></claim-text></claim>
<claim id="c-de-01-0003" num="0003">
<claim-text>Verbindungsvorrichtung nach Anspruch 1, wobei die Metallummantelung eine Kupferummantelung umfasst.</claim-text></claim>
<claim id="c-de-01-0004" num="0004">
<claim-text>Verbindungsvorrichtung nach Anspruch 1, wobei eine Proportionalität einer Länge der Metallummantelung auf einer Länge der elektrischen Faser konzipiert ist auf der Basis einer Länge der elektrischen Faser.</claim-text></claim>
<claim id="c-de-01-0005" num="0005">
<claim-text>Verbindungsvorrichtung nach Anspruch 1, wobei die Verbindungsvorrichtung ferner umfasst:
<claim-text>eine Mikrostreifen-Zuführleitung, konfiguriert zum Zuführen des Signals zu dem Mikrostreifen-Stromkreis an einer ersten Schicht;</claim-text>
<claim-text>eine schlitzförmige Masseplatte mit einem Schlitz, konfiguriert zum Minimieren eines Verhältnisses von Rückwärtsverbreitungswelle zu Vorwärtsverbreitungswelle an einer zweiten Schicht;</claim-text>
<claim-text>eine Masseplatte mit einer Anordnung von Lücken, konfiguriert um eine elektrische Verbindung zwischen der schlitzförmigen Masseplatte und der Masseplatte an der dritten Schicht herzustellen; und</claim-text>
<claim-text>ein Patch, konfiguriert zum Ausstrahlen des Signals mit einer Resonanzfrequenz.</claim-text></claim-text></claim>
<claim id="c-de-01-0006" num="0006">
<claim-text>Verbindungsvorrichtung nach Anspruch 1, wobei die Metallummantelung den dielektrischen Wellenleiter mit einer vorbestimmten Form aufwickelt.</claim-text></claim>
</claims>
<claims id="claims03" lang="fr"><!-- EPO <DP n="18"> -->
<claim id="c-fr-01-0001" num="0001">
<claim-text>Dispositif d'interconnexion carte à carte au moyen d'une fibre électrique (101, 604, 704), le dispositif d'interconnexion comprenant :
<claim-text>une carte côté émetteur et une carte côté récepteur ;</claim-text>
<claim-text>une fibre électrique (101, 604, 704), configurée pour propager un signal de la carte côté émetteur à la carte côté récepteur, munie d'une gaine métallique (601, 701) ;</claim-text>
<claim-text>un circuit microruban disposé sur la carte côté émetteur et la carte côté récepteur et configuré pour être en contact avec la fibre électrique (101, 604, 704) au moyen d'une transition microruban-guide d'ondes (105) ;</claim-text>
<claim-text>au moins une des deux extrémités de la fibre électrique (101, 604, 704) étant effilée pour l'adaptation d'impédance entre la fibre électrique et le circuit microruban sur le dispositif d'interconnexion ;</claim-text>
<claim-text>un connecteur carte à fibre (1001) configuré pour connecter de multiples fibres électriques (101, 604, 704) à au moins une de la carte côté émetteur et de la carte côté récepteur verticalement ;</claim-text>
<claim-text>le connecteur carte à fibre (1001) comprenant :
<claim-text>des ponts connecteurs (1002, 1003) insérés dans des trous percés à travers au moins une de la carte côté émetteur et de la carte côté récepteur ;</claim-text>
<claim-text>de multiples appareils de transition (1004, 1005, 1006) pour la fixation physique des multiples fibres électriques, respectivement, à au moins une de la carte côté émetteur et de la carte côté récepteur.</claim-text></claim-text></claim-text></claim>
<claim id="c-fr-01-0002" num="0002">
<claim-text>Dispositif d'interconnexion selon la revendication 1, dans lequel au moins une des deux extrémités de la fibre électrique est effilée linéairement pour optimiser l'impédance de la fibre électrique avec un rendement de transfert de puissance maximal.</claim-text></claim>
<claim id="c-fr-01-0003" num="0003">
<claim-text>Dispositif d'interconnexion selon la revendication 1, dans lequel la gaine métallique comprend une gaine en cuivre.</claim-text></claim>
<claim id="c-fr-01-0004" num="0004">
<claim-text>Dispositif d'interconnexion selon la revendication 1, dans lequel une proportion de la longueur de la gaine métallique sur la longueur de la fibre électrique est établie en fonction de la longueur de la fibre électrique.<!-- EPO <DP n="19"> --></claim-text></claim>
<claim id="c-fr-01-0005" num="0005">
<claim-text>Dispositif d'interconnexion selon la revendication 1, le dispositif d'interconnexion comprenant en outre :
<claim-text>une ligne d'alimentation microruban configurée pour appliquer le signal au circuit microruban au niveau d'une première couche ;</claim-text>
<claim-text>un plan de masse à fente comportant une fente configurée pour réduire au minimum un rapport ondes régressives sur ondes progressives au niveau d'une deuxième couche ;</claim-text>
<claim-text>un plan de masse comportant un groupement de trous d'interconnexion configurés pour établir une connexion électrique entre le plan de masse à fente et le plan de masse au niveau d'une troisième couche ; et</claim-text>
<claim-text>une plaque configurée pour rayonner le signal à une fréquence de résonance.</claim-text></claim-text></claim>
<claim id="c-fr-01-0006" num="0006">
<claim-text>Dispositif d'interconnexion selon la revendication 1, dans lequel la gaine métallique enveloppe le guide d'ondes diélectrique avec une forme prédéterminée.</claim-text></claim>
</claims>
<drawings id="draw" lang="en"><!-- EPO <DP n="20"> -->
<figure id="f0001" num="1,2a"><img id="if0001" file="imgf0001.tif" wi="124" he="222" img-content="drawing" img-format="tif"/></figure><!-- EPO <DP n="21"> -->
<figure id="f0002" num="2b,3a,3b"><img id="if0002" file="imgf0002.tif" wi="98" he="233" img-content="drawing" img-format="tif"/></figure><!-- EPO <DP n="22"> -->
<figure id="f0003" num="3c,3d,4a,4b,4c"><img id="if0003" file="imgf0003.tif" wi="108" he="221" img-content="drawing" img-format="tif"/></figure><!-- EPO <DP n="23"> -->
<figure id="f0004" num="4d,5a,5b"><img id="if0004" file="imgf0004.tif" wi="131" he="211" img-content="drawing" img-format="tif"/></figure><!-- EPO <DP n="24"> -->
<figure id="f0005" num="6,7"><img id="if0005" file="imgf0005.tif" wi="95" he="194" img-content="drawing" img-format="tif"/></figure><!-- EPO <DP n="25"> -->
<figure id="f0006" num="8,9"><img id="if0006" file="imgf0006.tif" wi="113" he="233" img-content="drawing" img-format="tif"/></figure><!-- EPO <DP n="26"> -->
<figure id="f0007" num="10,11,12"><img id="if0007" file="imgf0007.tif" wi="106" he="233" img-content="drawing" img-format="tif"/></figure>
</drawings>
<ep-reference-list id="ref-list">
<heading id="ref-h0001"><b>REFERENCES CITED IN THE DESCRIPTION</b></heading>
<p id="ref-p0001" num=""><i>This list of references cited by the applicant is for the reader's convenience only. It does not form part of the European patent document. Even though great care has been taken in compiling the references, errors or omissions cannot be excluded and the EPO disclaims all liability in this regard.</i></p>
<heading id="ref-h0002"><b>Patent documents cited in the description</b></heading>
<p id="ref-p0002" num="">
<ul id="ref-ul0001" list-style="bullet">
<li><patcit id="ref-pcit0001" dnum="US2006145778A"><document-id><country>US</country><doc-number>2006145778</doc-number><kind>A</kind></document-id></patcit><crossref idref="pcit0001">[0003]</crossref></li>
<li><patcit id="ref-pcit0002" dnum="US5528074A"><document-id><country>US</country><doc-number>5528074</doc-number><kind>A</kind></document-id></patcit><crossref idref="pcit0002">[0004]</crossref></li>
<li><patcit id="ref-pcit0003" dnum="US2011194240A"><document-id><country>US</country><doc-number>2011194240</doc-number><kind>A</kind></document-id></patcit><crossref idref="pcit0003">[0004]</crossref></li>
<li><patcit id="ref-pcit0004" dnum="JP2008193161B"><document-id><country>JP</country><doc-number>2008193161</doc-number><kind>B</kind></document-id></patcit><crossref idref="pcit0004">[0005]</crossref><crossref idref="pcit0005">[0006]</crossref><crossref idref="pcit0006">[0006]</crossref></li>
</ul></p>
</ep-reference-list>
</ep-patent-document>
