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(11) | EP 3 091 433 A3 |
| (12) | EUROPEAN PATENT APPLICATION |
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| (54) | SYSTEM AND METHOD TO REDUCE LOAD-STORE COLLISION PENALTY IN SPECULATIVE OUT OF ORDER ENGINE |
| (57) A load-store collision detection system for a speculative out of order processing
engine which includes a scheduler that dispatches instructions to multiple instruction
pipelines. The instruction pipelines include a load pipeline that provides a load
valid signal when a speculatively dispatched load instruction is executing. The load-store
collision detection system includes comparator logic, broadcast logic, and kill logic.
The comparator logic asserts a clear signal when a virtual address of the speculatively
dispatched load instruction matches at least one store instruction virtual address
of a previously dispatched store instruction whose corresponding store data is not
ready yet. The broadcast logic broadcasts the load valid signal to the scheduler to
enable dispatch of any instructions dependent upon the speculatively dispatched load
instruction. The kill logic invalidates the load valid signal when the clear signal
is asserted to avoid a load-store collision that reduces processing performance.
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