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(11) | EP 3 349 089 A1 |
| (12) | EUROPEAN PATENT APPLICATION |
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| (54) | FOLDBACK CIRCUIT OF A POWER SUPPLY BUS |
| (57) A foldback circuit of a power supply bus is described herein. One device includes
a current loop to bias a series pass element during a bus idle condition of the power
supply bus, and a current limiter to provide a constant current through the series
pass element and compensate for ambient temperature variation to limit the current
through the series pass element, where the foldback circuit is to limit the current
through the series pass element in response to a short circuit condition of the power
supply bus.
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Technical Field
Background
[0002] In a two wire communication bus, power and data transmission can occur on a same pair of wires. Devices may be controlled and/or monitored by the bus via a bi-directional data transmission over the wires. For example, lighting devices such as electrical ballasts, LED drivers, and/or dimmers may be controlled and/or monitored.
[0003] Data transmission over the bus may be performed by shorting the wires of the bus. For example, a transistor may be enabled to short the wires so that the voltage drop across the wires can drop below a threshold to transmit data. The transistor may then be disabled so that the wires are no longer shorted and the bus can go back to an idle condition.
Brief Description of the Drawings
[0004]
Figure 1 illustrates an example foldback circuit, in accordance with one or more embodiments of the present disclosure.
Figure 2 is a flow chart of a method for operating a foldback circuit of a power supply bus, in accordance with one or more embodiments of the present disclosure.
Detailed Description
[0005] A power supply bus having a foldback circuit is described herein. For example, one or more embodiments include a foldback circuit of a power supply bus, the foldback circuit including a current loop to bias a series pass element during a bus idle condition of the power supply bus, a current limiter to provide a constant current through the series pass element and compensate for ambient temperature variation to limit the current through the series pass element, where the foldback circuit is to limit the current through the series pass element in response to a short circuit condition of the power supply bus.
[0006] During a bus idle condition, a constant current regulator may power the bus. However, during a short circuit condition, such as during data transmission, voltage of the bus is close to zero volts. During the short circuit condition, a sizeable amount of power may be dissipated by the constant current regulator. The power dissipation can cause the constant current regulator to overheat, which could result in thermal shutdown of the bus.
[0007] A foldback circuit can be utilized to reduce the current in the bus to avoid thermal shutdown of the constant current regulator. However, constant current regulator circuits based on bipolar junction transistors (BJT) and/or field effect transistors (FET) may not reduce the current to a level to reduce power dissipation and the associated heating of the constant current regulator. As a result, large semi-conductor devices may be needed to accomplish the required reduction in power dissipation. Further, these foldback circuits may not be temperature compensated, so the current can vary with respect to ambient temperature.
[0008] In the following detailed description, reference is made to the accompanying drawings that form a part hereof. The drawings show by way of illustration how one or more embodiments of the disclosure may be practiced.
[0009] These embodiments are described in sufficient detail to enable those of ordinary skill in the art to practice one or more embodiments of this disclosure. It is to be understood that other embodiments may be utilized and that process, electrical, and/or structural changes may be made without departing from the scope of the present disclosure.
[0010] As will be appreciated, elements shown in the various embodiments herein can be added, exchanged, combined, and/or eliminated so as to provide a number of additional embodiments of the present disclosure. The proportion and the relative scale of the elements provided in the figures are intended to illustrate the embodiments of the present disclosure, and should not be taken in a limiting sense.
[0011] The figures herein follow a numbering convention in which the first digit or digits correspond to the drawing figure number and the remaining digits identify an element or component in the drawing. Similar elements or components between different figures may be identified by the use of similar digits.
[0012] As used herein, "a" or "a number of" something can refer to one or more such things. For example, "a number of resistors" can refer to one or more resistors.
[0013] Figure 1 illustrates an example foldback circuit 100, in accordance with one or more embodiments of the present disclosure. As shown in Figure 1, foldback circuit 100 can include a current loop 102, a series pass element 104, a current limiter 106, a resistor-capacitor loop 108, a resistor-diode loop 110, a feedback resistor 112, and a power supply 118.
[0014] The foldback circuit 100 can include a current loop 102 to bias series pass element 104 during a bus idle condition. As used herein, a series pass element is a circuit element in series with a load that controls an output voltage by dropping a variable portion of an input voltage. In some embodiments, series pass element 104 can be, for example, a P-type metal-oxide-semiconductor (PMOS). In some embodiments, series pass element 104 can be, for example, a PNP bipolar junction transistor (BJT). In some embodiments, series pass element 104 can be an N-type metal-oxide-semiconductor (NMOS) or a NPN BJT.
[0015] Power supply 118 can operate as a direct current (DC) power source to comply with the Digital Addressable Lighting Interface (DALI) technical standard for controlling lighting devices. The values of the various electrical components (e.g., resistors, capacitors, etc.) of the foldback circuit 100 may be selected such that a power supply including the foldback circuit 100 may comply with the DALI technical standard for controlling lighting devices. The values of these various electrical components will be further described herein. However, embodiments of the present disclosure are not limited to operation of power supply 118 and selection of electrical component values for the DALI technical standard. For instance, operation of power supply 118 and selection of electrical component values may be selected such that the foldback circuit 100 may comply with other technical standards, such as Digital Standard Interface (DSI), although embodiments of the present disclosure are not so limited to the DALI or DSI technical standards.
[0016] The current loop 102 of the foldback circuit 100 can be connected to series pass element 104, resistor-capacitor loop 108, and resistor-diode loop 110. Current loop 102 can include two resistors, a capacitor, a three-terminal voltage reference, and two transistors 114-1, 114-2.
[0017] As used herein, a three-terminal voltage reference refers to a three-terminal electrical component that functions as a voltage reference. As used herein, a resistor refers to an electrical component that implements electrical resistance as a circuit element. As used herein, a transistor refers to an electrical semiconductor device that amplifies or switches electronic signals and electrical power. As used herein, a capacitor refers to an electrical component that stores electrical energy.
[0018] A first of the two resistors of the current loop 102 can be connected in parallel with the capacitor of the current loop 102. For example, the first of the two resistors and the capacitor of the current loop 102 can be connected by two or more paths (e.g., current can take two or more paths as it flows through the first of the two resistors and the capacitor of the current loop 102).
[0019] A first of the two resistors of the current loop 102 can be connected in series with a first of the two transistors 114-1 of the current loop 102. For example, the first of the two resistors and the first of the two transistors 114-1 of the current loop 102 can be connected along a single path (e.g., the same current flows through the first of the two resistors and the first of the two transistors 114-1 of the current loop 102).
[0020] A second of the two transistors 114-2 of the current loop 102 can be connected in series with the first of the two transistors 114-1 of the current loop 102. For example, the second of the two transistors 114-2 and the first of the two transistors 114-1 of the current loop 102 can be connected along a single path.
[0021] A second of the two transistors 114-2 of the current loop 102 can be connected in series with the second of the two resistors of the current loop 102. For example, the second of the two transistors 114-2 and the second of the two resistors of the current loop 102 can be connected along a single path. The second of the two resistors of the current loop 102 can be connected to ground.
[0022] The diode of the current loop 102 can be connected in series with the second of the two resistors of the current loop 102. For example, the diode and the second of the two resistors of the current loop 102 can be connected along a single path. The diode of the current loop 102 can be connected to ground.
[0023] The three -terminal voltage reference of the current loop 102 can be connected in parallel with the second of the two transistors 114-2 of the current loop 102. For example, the three-terminal voltage reference and the second of the two transistors 114-2 of the current loop 102 can be connected by two or more paths.
[0024] The three -terminal voltage reference of the current loop 102 can be an adjustable shunt regulator.
[0025] The first of the two resistors of the current loop 102 can be a 1 K Ohm resistor. However, embodiments of the present disclosure are not limited to a 1 K Ohm resistor. For example, the resistance of the first of the two resistors of the current loop 102 can be selected based on the DALI standard and/or other standards.
[0026] The second of the two resistors of the current loop 102 can be a 2.5K Ohm resistor. However, embodiments of the present disclosure are not limited to a 2.5K Ohm resistor. For example, the resistance of the second of the two resistors of the current loop 102 can be selected based on the DALI standard and/or other standards.
[0027] The capacitor of the current loop 102 can be a 1 NanoFarad capacitor. However, embodiments of the present disclosure are not limited to a 1 NanoFarad capacitor. For example, the capacitance of the capacitor of the current loop 102 can be selected based on the DALI standard and/or other standards.
[0028] The foldback circuit 100 can include a number of resistors 116-1, 116-2, 116-3, 116-4 (referred to collectively as number of resistors 116). As shown in Figure 1, the number of resistors 116 can be located in different locations in the foldback circuit 100.
[0029] The foldback circuit 100 can include a current limiter 106 to provide a constant current through the series pass element 104. The current limiter 106 can be connected with power supply 118, series pass element 104, and resistor-diode loop 110. The current limiter 106 can include three resistors, a diode, a transistor, and two capacitors. For example, the current limiter 106 can include three resistors 116-2, 116-3, and 116-4, a diode, first of two transistors 114-1 of current loop 102, a capacitor of resistor-capacitor loop 108, and a capacitor of current loop 102.
[0030] The diode of the current limiter 106 can be connected in series with the resistor 116-4 of the current limiter 106. For example, the diode and the resistor 116-4 of the current limiter 106 can be connected along a single path. The current limiter 106 can be connected with power supply 118, series pass element 104, and resistor-diode loop 110.
[0031] Current limiter 106 can compensate for ambient temperature variation to limit the current through series pass element 104. For instance, current through series pass element 104 can vary (e.g., within 1 mA) across an ambient temperature range of -25°C to 55°C when the supply voltage from a power supply is between 17V to 23V. Current limiter 106 can compensate for ambient temperature variation during a short circuit condition, as will be further described herein.
[0032] Resistor 116-1 can be a 10k Ohm resistor. However, embodiments of the present disclosure are not limited to a 10k Ohm resistor. For example, the resistance of resistor 116-1 can be selected based on the DALI standard and/or other standards.
[0033] As previously described, resistor 116-2 can be a 1 k Ohm resistor. However, embodiments of the present disclosure are not limited to a 1 k Ohm resistor. For example, the resistance of resistor 116-2 can be selected based on the DALI standard and/or other standards.
[0034] Resistor 116-3 can be a 560 Ohm resistor. However, embodiments of the present disclosure are not limited to a 560 Ohm resistor. For example, the resistance of resistor 116-3 can be selected based on the DALI standard and/or other standards.
[0035] The resistor 116-4 of the current limiter 106 can be a 3.6 Ohm resistor. However, embodiments of the present disclosure are not limited to a 3.6 Ohm resistor. For example, the resistance of the resistor 116-4 of the current limiter 106 can be selected based on the DALI standard and/or other standards.
[0036] The foldback circuit 100 can include a resistor-capacitor loop 108. The resistor-capacitor loop 108 can be connected to series pass element 104, feedback resistor 112, current loop 102, and power supply 118.
[0037] The resistor-capacitor loop 108 can include a resistor and a capacitor. The resistor of the resistor-capacitor loop 108 can be connected in parallel with the capacitor of the resistor-capacitor loop 108.
[0038] The resistor of the resistor-capacitor loop 108 can be a 560 Ohm resistor. However, embodiments of the present disclosure are not limited to a 560 Ohm resistor. For example, the resistance of the resistor of the resistor-capacitor loop 108 can be selected based on the DALI standard and/or other standards.
[0039] The capacitor of the resistor-capacitor loop 108 can be a 100 picoFarad capacitor. However, embodiments of the present disclosure are not limited to a 100 picoFarad capacitor. For example, the capacitance of the capacitor of the resistor-capacitor loop 108 can be selected based on the DALI standard and/or other standards.
[0040] The foldback circuit 100 can include a resistor-diode loop 110. The resistor-diode loop 110 can be connected to current limiter 106, series pass element 104, current loop 102, and power supply 118.
[0041] The resistor-diode loop 110 can include a resistor and a diode. The resistor of the resistor-diode loop 110 can be connected in parallel with the diode of the resistor-diode loop 110. The resistor-diode loop 110 can protect series pass element 104. For example, resistor-diode loop 110 can protect series pass element 104 from a power surge, among other potential events that could damage series pass element 104.
[0042] The resistor of the resistor-diode loop 110 can be a 1000K Ohm resistor. However, embodiments of the present disclosure are not limited to a 1000K Ohm resistor. For example, the resistance of the resistor of the resistor-diode loop 110 can be selected based on the DALI standard and/or other standards.
[0043] The foldback circuit 100 can include a feedback resistor 112. The feedback resistor 112 can be connected in series with resistor-capacitor loop 108, resistor-diode loop 110, and series pass element 104.
[0044] The feedback resistor 112 can be a 15K Ohm resistor. However, embodiments of the present disclosure are not limited to a 15K Ohm resistor. For example, the resistance of the feedback resistor 112 can be selected based on the DALI standard and/or other standards.
[0045] The foldback circuit 100 can limit the current through series pass element 104 in response to a short circuit condition of the power supply bus. For example, in response to a bus clamp condition, current can flow through feedback resistor 112 and resistor-capacitor loop 108, resulting in a voltage developing on feedback resistor 112 and resistor 116-3. As a result of the voltage developed on feedback resistor 112 and resistor 116-3, the current that flows through series pass element 104 is in turn limited, reducing power dissipation across series pass element 104 during the short circuit condition. The reduction in power dissipation across series pass element 104 can also reduce heat during the short circuit condition.
[0046] The short circuit condition can include a bus clamp condition. Although not shown in Figure 1 for clarity and so as not to obscure embodiments of the present disclosure, the foldback circuit 100 can include a further portion of the power supply bus circuit. For example, the configuration of the rest of the bus circuit is shown in Figure 1 (e.g., To Rest of Bus Circuit).
[0047] A clamping transistor included in the rest of the bus circuit can cause a bus clamp condition to occur. For instance, a clamping transistor can be enabled such that the bus clamp condition occurs.
[0048] The bus clamp condition can occur in response to a data transmission to an external load connected to the power supply that includes the foldback circuit 100. For example, a data transmission, such as a bi-directional data transmission, can occur from the power supply to an external load connected to the power supply. An external load may include a lighting device (e.g., electrical ballasts, LED drivers, and/or dimmers, etc.), although embodiments of the present disclosure are not limited to a lighting device as an external load. The data transmission can include a logic zero transmission, as will be further described in connection with Figure 2.
[0049] A foldback circuit of a power supply bus can allow for lower power dissipation during a short circuit condition. The lower power dissipation can allow for better efficiency over a full operating temperature range of the power supply bus. Additionally, the foldback circuit, in accordance with the present disclosure, can include less electrical components than linear constant current regulators based on BJTs, FETs, and/or large semi-conductor devices, thereby allowing for a smaller circuit footprint. Further, the foldback circuit can reduce and/or eliminate thermal failures, allowing the circuits to continue working after a short circuit condition, and reducing the frequency of customers having to replace overheated equipment.
[0050] Figure 2 is a flow chart of a method for operating a foldback circuit of a power supply bus, in accordance with one or more embodiments of the present disclosure. Method 220 can be performed by, for example, foldback circuit 100, described in connection with Figure 1.
[0051] At 222, the method 220 can include reducing an amount of current through a series pass element (e.g., series pass element 104, previously described in connection with Figure 1) of a foldback circuit (e.g., foldback circuit 100, previously described in connection with Figure 1) of a power supply bus in response to a bus clamp condition of the power supply such that the foldback circuit is in a foldback condition. For instance, the power supply can be in a short circuit condition that can include a bus clamp condition. Based on the bus clamp condition, the current through series pass element of the foldback circuit can be reduced.
[0052] In response to the bus clamp condition, current can flow through a feedback resistor and a resistor-capacitor loop. This current can cause a voltage to develop on the feedback resistor and the resistor of the resistor-capacitor loop, resulting in the current flowing through the series pass element being reduced.
[0053] The current through the series pass element can be reduced in response to the bus clamp condition occurring in response to a data transmission to an external load connected to the power supply that includes the foldback circuit. For example, the bus clamp condition can allow for a voltage drop across communication wires of the power supply to drop below a predetermined threshold in order to transmit a valid logic low (e.g., logic zero) bit.
[0054] The logic zero bit transmission can relate to levels of binary logic for transmission to an external load connected to the power supply. The external load may include lighting devices, such as electrical ballasts, LED drivers, dimmers, etc. The logic bit transmission can control external loads connected to the power supply.
[0055] The predetermined threshold can be set by a communication protocol. For example, the DALI standard can determine the threshold voltage drop at which a valid logic low bit (e.g., logic zero) may be transmitted to an external load.
[0056] The series pass element can operate in a linear region in response to the short circuit condition. For example, as previously described in connection with Figure 1, the series pass element can be a BJT or a MOSFET operating in the linear operational region in response to the short circuit condition (e.g., bus clamp condition) of the foldback circuit. The series pass element can be fully turned on during the non-short circuit condition.
[0057] During the short circuit condition, a first of the two transistors (e.g., first of the two transistors 114-1, previously described in connection with Figure 1) of the current loop (e.g., current loop 102, previously described in connection with Figure 1) can be operating in a linear region with less current than the first of the two transistors operating in a non-linear region in response to the short circuit condition. The first of the two transistors can operate in a linear region during a non-short circuit condition.
[0058] A number of resistors can delay the transition between the bus clamp condition and bus idle condition. A number of capacitors can bypass the number of resistors (e.g., number of resistors 116, previously described in connection with Figure 1) during the transient state of the bus (e.g., when the bus is being clamped/bus is being released). For example, the capacitor included in the resistor-capacitor loop (e.g., resistor-capacitor loop 108, previously described in connection with Figure 1) and the capacitor of the current loop can bypass the number of resistors during transient conditions of the foldback circuit.
[0059] At 224, the method 220 can include providing a constant current through the series pass element in response to the bus clamp condition. A current loop included in the foldback circuit can bias the series pass element to provide the constant current through the series pass element. The current loop can include two resistors, a capacitor, a diode, and two transistors. The current loop and the current limiter can be utilized to provide a constant current to the series pass element during constant and/or varying input voltages.
[0060] At 226, the method 220 can include compensating for ambient temperature variation to limit the current through the series pass element in response to the bus clamp condition. The current loop and the current limiter can be used to compensate for ambient temperature variation.
[0061] The voltage of a base emitter of a transistor (e.g., first transistor 114-1 of two transistors of current loop 102, previously described in connection with Figure 1) can vary with the ambient temperature. The current loop and the current limiter can be used to compensate for variation in ambient temperature. For instance, the diode and the two resistors can be used to compensate for ambient temperature variation. For instance, the change in the diode forward voltage can track the change in the base emitter voltage of the transistor (e.g., first transistor 114-1). The resistance of resistor 116-2 (e.g., previously described in connection with Figure 1) and the current through first transistor 114-1 (e.g., set by the current loop) can nullify the difference in absolute voltage values of the diode and absolute voltage value of the base emitter of transistor 114-1.
[0062] The method 220 can include transmitting a logic zero transmission during the bus clamp condition. For example, a valid logic low bit (e.g., logic zero) may be transmitted to an external load during the bus clamp condition as per the DALI standard. A logic zero transmission may include a transmission to control a lighting device, such as an electrical ballast, LED drivers, and/or dimmers.
[0063] The method 220 can include increasing the current through the series pass element of the foldback circuit in response to the bus clamp condition ending. For example, once a bus clamp condition has ended, voltage developed on the feedback resistor and the resistor of the resistor-capacitor loop will dissipate, resulting in the current flowing through the series pass element being increased. A logic one transmission may be transmitted during the bus idle condition.
[0064] As used herein, "logic" is an alternative or additional processing resource to execute the actions and/or functions, etc., described herein, which includes hardware (e.g., various forms of transistor logic, application specific integrated circuits (ASICs), etc.), as opposed to computer executable instructions (e.g., software, firmware, etc.) stored in memory and executable by a processor. It is presumed that logic similarly executes instructions for purposes of the embodiments of the present disclosure.
[0065] Although specific embodiments have been illustrated and described herein, those of ordinary skill in the art will appreciate that any arrangement calculated to achieve the same techniques can be substituted for the specific embodiments shown. This disclosure is intended to cover any and all adaptations or variations of various embodiments of the disclosure.
[0066] It is to be understood that the above description has been made in an illustrative fashion, and not a restrictive one. Combination of the above embodiments, and other embodiments not specifically described herein will be apparent to those of skill in the art upon reviewing the above description.
[0067] The scope of the various embodiments of the disclosure includes any other applications in which the above structures and methods are used. Therefore, the scope of various embodiments of the disclosure should be determined with reference to the appended claims, along with the full range of equivalents to which such claims are entitled.
[0068] In the foregoing Detailed Description, various features are grouped together in example embodiments illustrated in the figures for the purpose of streamlining the disclosure. This method of disclosure is not to be interpreted as reflecting an intention that the embodiments of the disclosure require more features than are expressly recited in each claim.
a current loop (102) configured to bias a series pass element (104) during a bus idle condition of the power supply bus; and
a current limiter (106) configured to:
provide a constant current through the series pass element (104); and
compensate for ambient temperature variation to limit the current through the series pass element (104);
wherein the foldback circuit (100) is configured to limit the current through the series pass element (104) in response to a short circuit condition of the power supply bus.
current through the series pass element (104) is reduced during the short circuit condition; and
the series pass element (104) operates in a linear region in response to the short circuit condition.
a first transistor (114-1) of the two transistors (114-1, 114-2) of the current loop (102) operates in a linear region during a non-short circuit condition; and
the first transistor (114-1) of the two transistors (114-1, 114-2) of the current loop (102) is fully turned on in response to the short circuit condition.
a current loop (102) configured to bias a series pass element (104) during a bus idle condition of the power supply bus, wherein the current loop (102) includes two resistors, a capacitor, a three-terminal voltage reference, and two transistors (114-1, 114-2); and
a current limiter (106) configured to:
provide a constant current through the series pass element (104); and
compensate for ambient temperature variation to limit the current through the series pass element (104);
wherein the current limiter (106) includes three resistors, a diode, a transistor, and two capacitors; and
wherein the foldback circuit (100) is configured to limit the current through the series pass element (104) in response to a short circuit condition of the power supply bus.
a first of the two resistors of the current loop (102) is connected in parallel with the capacitor of the current loop (102) and connected in series with a first (114-1) of the two transistors (114-1, 114-2) of the current loop (102);
a second (114-2) of the two transistors (114-1, 114-2) of the current loop is connected in series with the first (114-1) of the two transistors (114-1, 114-2) and the second of the two resistors of the current loop (102), wherein the second of the two resistors of the current loop (102) is connected to ground;
the three-terminal voltage reference of the current loop (102) is connected in series with the second of the two resistors of the current loop (102) and connected in parallel with the second (114-1) of the two transistors (114-1, 114-2) of the current loop (102).
the resistor of the resistor-capacitor loop (108) is connected in parallel with the capacitor of the resistor-capacitor loop (108);
the resistor of the resistor-diode loop (110) is connected in parallel with the diode of the resistor-diode loop (110); and
the feedback resistor (114) is connected in series with the resistor-capacitor loop (108) and the resistor-diode loop (110).
Amended claims in accordance with Rule 137(2) EPC.
a current loop (102) including two resistors, a capacitor, a three-terminal voltage reference, and two transistors (114-1, 114-2) and configured to bias a series pass element (104) during a bus idle condition of the power supply bus, wherein:
a first of the two resistors of the current loop (102) is connected in parallel with the capacitor of the current loop (102) and connected in series with a first (114-1) of the two transistors (114-1, 114-2) of the current loop (102);
a second (114-2) of the two transistors (114-1, 114-2) of the current loop (102) is connected in series with the first (114-1) of the two transistors (114-1, 114-2) and the second of the two resistors of the current loop (102), wherein the second of the two resistors of the current loop (102) is connected to ground; and
a current limiter (106) including three resistors, a diode, a transistor, and two capacitors and configured to:
provide a constant current through the series pass element (104); and
compensate for ambient temperature variation to limit the current through the series pass element (104);
wherein the diode of the current limiter (106) is connected in series with a first of the three resistors of the current limiter (106);
wherein the foldback circuit (100) is configured to limit the current through the series pass element (104) in response to a short circuit condition of the power supply bus.
current through the series pass element (104) is reduced during the short circuit condition; and
the series pass element (104) operates in a linear region in response to the short circuit condition.
the first transistor (114-1) of the two transistors (114-1, 114-2) of the current loop (102) operates in a linear region during a non-short circuit condition; and
the first transistor (114-1) of the two transistors (114-1, 114-2) of the current loop (102) is fully turned on in response to the short circuit condition.
a current loop (102) including two resistors, a capacitor, a three-terminal voltage reference, and two transistors (114-1, 114-2) and configured to bias a series pass element (104) during a bus idle condition of the power supply bus wherein:
a first of the two resistors of the current loop (102) is connected in parallel with the capacitor of the current loop (102) and connected in series with a first (114-1) of the two transistors (114-1, 114-2) of the current loop (102);
a second (114-2) of the two transistors (114-1, 114-2) of the current loop (102) is connected in series with the first (114-1) of the two transistors (114-1, 114-2) and the second of the two resistors of the current loop (102), wherein the second of the two resistors of the current loop (102) is connected to ground; and
a current limiter (106) including three resistors, a diode, a transistor, and two capacitors and configured to:
provide a constant current through the series pass element (104); and
compensate for ambient temperature variation to limit the current through the series pass element (104);
wherein the diode of the current limiter (106) is connected in series with a first of the three resistors of the current limiter (106); and
wherein the foldback circuit (100) is configured to limit the current through the series pass element (104) in response to a short circuit condition of the power supply bus.
the resistor of the resistor-capacitor loop (108) is connected in parallel with the capacitor of the resistor-capacitor loop (108);
the resistor of the resistor-diode loop (110) is connected in parallel with the diode of the resistor-diode loop (110); and
the feedback resistor (112) is connected in series with the resistor-capacitor loop (108) and the resistor-diode loop (110).