(19)
(11) EP 3 386 199 B8

(12) CORRECTED EUROPEAN PATENT SPECIFICATION
Note: Bibliography reflects the latest situation

(15) Correction information:
Corrected version no 1 (W1 B1)

(48) Corrigendum issued on:
11.08.2021 Bulletin 2021/32

(45) Mention of the grant of the patent:
30.06.2021 Bulletin 2021/26

(21) Application number: 16889122.4

(22) Date of filing: 08.12.2016
(51) International Patent Classification (IPC): 
H04N 19/426(2014.01)
H04N 19/52(2014.01)
H04N 19/182(2014.01)
H04N 19/59(2014.01)
(86) International application number:
PCT/CN2016/108969
(87) International publication number:
WO 2017/133315 (10.08.2017 Gazette 2017/32)

(54)

LOSSLESS COMPRESSION METHOD AND SYSTEM APPLIED TO VIDEO HARD DECODING

AUF HARTE VIDEODECODIERUNG ANGEWANDTES VERLUSTLOSES KOMPRESSIONSVERFAHREN UND -SYSTEM

PROCÉDÉ ET SYSTÈME DE COMPRESSION SANS PERTE APPLIQUÉ AU DÉCODAGE VIDÉO À DÉCISION STRICTE


(84) Designated Contracting States:
AL AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HR HU IE IS IT LI LT LU LV MC MK MT NL NO PL PT RO RS SE SI SK SM TR

(30) Priority: 03.02.2016 CN 201610077393

(43) Date of publication of application:
10.10.2018 Bulletin 2018/41

(73) Proprietor: Allwinner Technology Co. Ltd.
Zhuhai, Guangdong 519080 (CN)

(72) Inventors:
  • YANG, Shaojun
    Zhuhai Guangdong 519080 (CN)
  • XIE, Chengxing
    Zhuhai Guangdong 519080 (CN)

(74) Representative: Kramer Barske Schmidtchen Patentanwälte PartG mbB 
European Patent Attorneys Landsberger Strasse 300
80687 München
80687 München (DE)


(56) References cited: : 
CN-A- 101 022 553
CN-A- 102 740 075
CN-A- 103 729 449
US-A1- 2009 324 112
CN-A- 101 252 694
CN-A- 103 152 571
CN-A- 105 578 190
US-A1- 2009 324 112
   
  • ZHOU JINJIA ET AL: "A Frame-Parallel 2 Gpixel/s Video Decoder Chip for UHDTV and 3-DTV/FTV Applications", IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, IEEE SERVICE CENTER, PISCATAWAY, NJ, USA, vol. 23, no. 12, 1 December 2015 (2015-12-01), pages 2768-2781, XP011590975, ISSN: 1063-8210, DOI: 10.1109/TVLSI.2014.2385780 [retrieved on 2015-11-20] & DAJIANG ZHOU ET AL: "A 530 Mpixels/s 4096x2160@uarr 0fps H.264/AVC High Profile Video Decoder Chip", IEEE JOURNAL OF SOLID-STATE CIRCUITS, IEEE SERVICE CENTER, PISCATAWAY, NJ, USA, vol. 46, no. 4, 1 April 2011 (2011-04-01), pages 777-788, XP011351091, ISSN: 0018-9200, DOI: 10.1109/JSSC.2011.2109550
  • DAJIANG ZHOU ET AL: "Reducing power consumption of HEVC codec with lossless reference frame recompression", 2014 IEEE INTERNATIONAL CONFERENCE ON IMAGE PROCESSING (ICIP), IEEE, 27 October 2014 (2014-10-27), pages 2120-2124, XP032966966, DOI: 10.1109/ICIP.2014.7025425 [retrieved on 2015-01-28]
   
Note: Within nine months from the publication of the mention of the grant of the European patent, any person may give notice to the European Patent Office of opposition to the European patent granted. Notice of opposition shall be filed in a written reasoned statement. It shall not be deemed to have been filed until the opposition fee has been paid. (Art. 99(1) European Patent Convention).