BACKSIDE SEMICONDUCTOR GROWTH

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EP 3 497 715 B8

(12)	CORRECTED EUROPEAN PATENT SPECIFICATION
	Note: Bibliography reflects the latest situation

(15)	Correction information:
	Corrected version no 1 (W1 B1)

(48)	Corrigendum issued on:
	09.07.2025 Bulletin 2025/28

(45)	Mention of the grant of the patent:
	04.06.2025 Bulletin 2025/23

(21)	Application number: 17745908.8

(22)	Date of filing: 12.07.2017

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International Patent Classification (IPC):

H10D 86/01^(2025.01)
H10D 30/67^(2025.01)
H01L 21/3115^(2006.01)
H01L 23/66^(2006.01)
H10D 62/822^(2025.01)
H10D 30/60^(2025.01)

H10D 86/00^(2025.01)
H01L 21/768^(2006.01)
H01L 21/762^(2006.01)
H01L 23/485^(2006.01)
H04B 1/00^(2006.01)

(52)	Cooperative Patent Classification (CPC):
	H01L 21/76898; H01L 21/76256; H01L 21/76264; H04B 1/006; H01L 2224/11; H01L 23/485; H01L 21/76895; H01L 23/66; H01L 2223/6677; H10D 86/01; H10D 86/201; H10D 62/822; H10D 30/6713; H10D 30/797; H10D 30/6744

(86)	International application number:
	PCT/US2017/041755

(87)	International publication number:
	WO 2018/031175 (15.02.2018 Gazette 2018/07)

(54)	BACKSIDE SEMICONDUCTOR GROWTH RÜCKSEITIGES HALBLEITERWACHSTUM CROISSANCE DE SEMI-CONDUCTEURS SUR LA FACE ARRIÈRE

(84)	Designated Contracting States:
	AL AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HR HU IE IS IT LI LT LU LV MC MK MT NL NO PL PT RO RS SE SI SK SM TR

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Priority:

11.08.2016 US 201615234889

(43)	Date of publication of application:
	19.06.2019 Bulletin 2019/25

(73)	Proprietor: Qualcomm Incorporated
	San Diego, CA 92121-1714 (US)

(72)	Inventors:
	GOKTEPELI, Sinan San Diego, California 92121-1714 (US) HAMMOND, Richard Stoke-on-Trent Staffordshire ST7 4JZ (GB)

(74)	Representative: Jaeger, Michael David
	Maucher Jenkins Seventh Floor Offices Artillery House 11-19 Artillery Row London SW1P 1RT London SW1P 1RT (GB)

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References cited: :

WO-A1-2006/070310
DE-A1- 102004 033 149
US-A1- 2004 222 471
US-A1- 2009 020 761
US-B1- 7 897 468

WO-A1-2017/052667
JP-A- H0 483 348
US-A1- 2006 043 485
US-A1- 2015 091 092

ALLAIN F ET AL: "Bonded Planar Double-Metal-Gate NMOS Transistors Down to 10 nm", IEEE ELECTRON DEVICE LETTERS, IEEE SERVICE CENTER, NEW YORK, NY, US, vol. 26, no. 5, 1 May 2005 (2005-05-01), pages 317 - 319, XP011131287, ISSN: 0741-3106, DOI: 10.1109/LED.2005.846580

Note: Within nine months from the publication of the mention of the grant of the European patent, any person may give notice to the European Patent Office of opposition to the European patent granted. Notice of opposition shall be filed in a written reasoned statement. It shall not be deemed to have been filed until the opposition fee has been paid. (Art. 99(1) European Patent Convention).