(19)
(11) EP 4 024 441 A8

(12) CORRECTED EUROPEAN PATENT APPLICATION
Note: Bibliography reflects the latest situation

(15) Correction information:
Corrected version no 1 (W1 A1)

(48) Corrigendum issued on:
18.01.2023 Bulletin 2023/03

(43) Date of publication:
06.07.2022 Bulletin 2022/27

(21) Application number: 21214061.0

(22) Date of filing: 13.12.2021
(51) International Patent Classification (IPC): 
H01L 21/67(2006.01)
(52) Cooperative Patent Classification (CPC):
H01L 21/67288; H01L 21/67248
(84) Designated Contracting States:
AL AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HR HU IE IS IT LI LT LU LV MC MK MT NL NO PL PT RO RS SE SI SK SM TR
Designated Extension States:
BA ME
Designated Validation States:
KH MA MD TN

(30) Priority: 01.02.2021 TW 110103942

(71) Applicant: Ableprint Technology Co., Ltd.
Zhunan Township Miao li 35053 (TW)

(72) Inventor:
  • HORNG, Chih-Horng
    Taiwan (TW)

(74) Representative: Renaudo, Adrien Hanouar 
Patendibüroo Käosaar OÜ Tähe 94
50107 Tartu
50107 Tartu (EE)

   


(54) METHOD FOR SUPPRESSING MATERIAL WARPAGE BY INCREASING GAS DENSITY DURING AN ANNEALING STEP


(57) Disclosed is a method for suppressing material warpage by increasing a gas density. The method comprises the following steps: a. placing a plurality of semiconductor elements in a processing chamber; b. increasing a temperature in the processing chamber to a first predetermined temperature and importing a gas, to increase pressure to predetermined pressure and apply the processing chamber in a high-temperature and high-pressure working environment; and performing an isothermal-isobaric process at the first predetermined temperature and the predetermined pressure, to improve temperature uniformity by the high pressure gas; and c. decreasing the temperature in the processing chamber from the first predetermined temperature to a second predetermined temperature and continuing to import the gas into the processing chamber, to maintain the processing chamber at the predetermined pressure; and performing a cooling and isobaric process on each semiconductor element, to suppress warpage of each semiconductor element.