Technical Field
[0001] The present invention relates to a technology for calculating a square root in secret
computation.
Background Art
[0002] Secure computation is a cryptographic technology for calculating any function while
hiding data. A data utilization form is expected to be developed taking advantage
of this feature so that data does not leak to either a system operator or a data user.
There are several schemes for secure computation, and among them, the schemes including
secret sharing as a component are known to have a small data processing unit and be
able to perform high-speed processing.
[0003] Secret sharing is a method of converting secret information into several fragments
called shares. For example, there is secret sharing called a (k, n) threshold method
in which n shares are generated from the secret information and secrets can be restored
from k or more shares, and thus, secret information is not leaked as long as the number
of shares to restore the secret information is smaller than k. Shamir secret sharing,
duplicate secret sharing, and the like are known as specific methods for configuring
secret sharing. In the present specification, one fragment of a value shared by secret
sharing is referred to as "share". Further, an entire set of all shares is called
a "share value".
[0004] In recent years, research on advanced statistics or machine learning using secure
computation has been actively performed. However, most of calculations thereof include
calculations of an inverse, a square root, an exponent, a logarithm, and the like,
going beyond calculations good for secure computation such as addition, subtraction,
and multiplication. Calculation of a square root is one of basic calculations in a
computer or the like, and is used in various situations. Generally, for calculation
of a square root, calculation as √x = x/√x via the inverse of the square root is known
to be efficient. NPL 1 discloses a method of calculating a square root using the inverse
of the square root in secure computation. Further, various function calculations including
a square root may require processing for performing normalization so that a numerical
value falls in a certain range. In the secure computation, normalization of a numerical
value is performed by moving a most significant bit (msb).
Citation List
Non Patent Literature
Summary of the Invention
Technical Problem
[0006] However, the method disclosed in NPL 1 is computationally expensive because the inverse
of a square root is obtained and then multiplication is performed.
[0007] An object of the present invention is to provide a secure computation technology
capable of calculating a square root at high speed in view of the technical difficulty
as described above.
Means for Solving the Problem
[0008] To solve the above problem, a secure square root computation system of a first aspect
of the present invention is a secure square root computation system for receiving
a share value [a] of a value a as an input, and calculating a share value [√a] of
a square root of the value a. The secure square root computation system includes a
plurality of secure computation apparatuses. λ is a decimal point position of the
value a, and λ' is the smallest integer equal to or greater than λ/2. Each of the
plurality of secure computation apparatuses includes a flag sequence generation unit
configured to generate a first sequence of share values {x
0}, ..., {x
λ - 1} of a flag sequence xo, ..., x
λ - 1 indicating a most significant bit of the value a; a bit sequence generation unit
configured to calculate an exclusive logical sum of share values {x
2i} and share values {x
2i + 1} of the first sequence of share values to obtain share values {y
i} of a bit yi to generate a second sequence of share values {y
0}, ..., {y
λ' - 1} of a bit sequence yo, ..., y
λ' - 1 where i is an integer equal to or greater than 0 and smaller than λ'; a flag calculation
unit configured to calculate an exclusive logical sum of all share values {x
j} of the first sequence of share values to obtain a share value {r} of a division
flag r where j is an odd number equal to or greater than 0 and smaller than λ; a public
value multiplier setting unit configured to set a public value multiplier r', the
public value multiplier r' being √2 when λ is an odd number and 1 when λ is an even
number; an inverse normalization multiplier generation unit configured to generate
a share value [c'] of an inverse normalization multiplier c' obtained by bit-connecting
the second sequence of share values {y
0}, ..., {y
λ' - 1} in order from the front; a normalization multiplier generation unit configured to
generate a share value [c] of a normalization multiplier c obtained by bit-connecting
the first sequence of share values {x
0}, ..., {x
λ - 1} in reverse order; a normalization unit configured to calculate a share value [b]
obtained by multiplying the share value [a] by the share value [c]; a square root
calculation unit configured to use the share value [b], the share value {r}, and the
public value multiplier r' and calculate [√b]
∗ (r'/√2) when r = 1 and [√b]
∗ r' when r = 0 to obtain a share value [w]; and an inverse normalization unit configured
to calculate the share value [√a] obtained by shifting right a multiplication result
of the share value [w] and the share value [c'] by λ' bits.
[0009] A secure normalization system of a second aspect of the present invention is a secret
normalization system for normalizing a share value [a] of a value a to calculate the
share value [√a] of a square root of the value a. The secret normalization system
includes a plurality of secure computation apparatuses. λ is a decimal point position
of the value a, and λ' is the smallest integer equal to or greater than λ/2.Each of
the plurality of secure computation apparatus includes a flag sequence generation
unit configured to generate a first sequence of share values {x
0}, ..., {x
λ - 1} of a flag sequence x
0, ..., x
λ - 1 indicating a most significant bit of the value a; a bit sequence generation unit
configured to calculate an exclusive logical sum of share values {x
2i} and share values {x
2i + 1} of the first sequence of share values to obtain share values {y
i} of bits yi to generate a sequence of share values {y
0}, ..., {y
λ' - 1} of a bit sequence yo, ..., y
λ' - 1 where i is an integer i equal to or greater than 0 and smaller than λ'; a flag calculation
unit configured to calculate an exclusive logical sum of all share values {x
j} of the first sequence of share values to obtain a share value {r} of a division
flag r where j is an odd number equal to or greater than 0 and smaller than λ; a public
value multiplier setting unit configured to set a public value multiplier r', the
public value multiplier r' being √2 when λ is an odd number and 1 when λ is an even
number; an inverse normalization multiplier generation unit configured to generate
a share value [c'] of an inverse normalization multiplier c' obtained by bit-connecting
the second sequence of share values {y
0}, ..., {y
λ' - 1} in order from the front; a normalization multiplier generation unit configured to
generate a share value [c] of a normalization multiplier c obtained by bit-connecting
the first sequence of share values {x
0}, ..., {x
λ - 1} in reverse order; and a normalization unit configured to calculate a share value
[b] obtained by multiplying the share value [a] by the share value [c].
Effects of the Invention
[0010] According to the present invention, it is possible to calculate the square root at
high speed in secure computation.
Brief Description of Drawings
[0011]
Fig. 1 is a diagram illustrating a functional configuration of a secure square root
computation system.
Fig. 2 is a diagram illustrating a functional configuration of a secure computation
apparatus.
Fig. 3 is a diagram illustrating a functional configuration of a square root calculation
unit.
Fig. 4 is a diagram illustrating a processing procedure of a secure square root computation
method.
Fig. 5 is a diagram illustrating a processing procedure of the square root calculation
unit.
Fig. 6 is a diagram illustrating a functional configuration of a computer.
Description of Embodiments
[0012] Hereinafter, embodiments of the present invention will be described in detail. In
the drawings, components having the same function are denoted by the same numbers,
and duplicate description thereof will be omitted.
[0013] In the present specification, the following notation is used.
[0014] [·] is data in which a numerical value • is hidden. For example, share values of
Shamir secret sharing, duplicate secret sharing, or the like can be used.
[0015] {·} is data in which a bit • is hidden. For example, a share value of replication
secret sharing on Z
2, or the like can be used.
[0016] λ denotes a decimal point position. About a half of the number |p| of bits of a ring
or a field used for secure computation is assumed.
[0017] [a?b:c] represents b when a = 1 and c when a = 0.

[0018] Symbols described above indicate a logical negation (NOT), a logical product (AND),
a logical sum (OR), and an exclusive OR (XOR), respectively.
[0019] An integer in a ring can be regarded as a fixed-point real number by setting a public
decimal point position for the integer. In the present invention, the fixed-point
real number represented in the ring in this way is simply referred to as a real number.
Embodiment: Secure Square Root Computation System
[0020] An embodiment of the present invention is a secure square root computation system
and method in which a share value [a] of a value a is an input and a share value [√a]
of a square root of the value a is calculated with the value a hidden. Hereinafter,
an overview of a square root protocol executed by the secure square root calculation
system of the embodiment will be described.
[0021] In the related art, in secure computation, a group of elementary functions such as
an inverse, a square root, an exponential function, and a logarithm function that
go beyond addition, subtraction, and multiplication has a high processing cost and
has not been implemented. In order to solve these problems, the present invention
enables a square root to be efficiently calculated using an algorithm that can efficiently
and uniformly approximate a group of elementary functions in the secure computation.
With this approximation scheme, it is possible to approximate major elementary functions
including a square root simply by changing parameters with a single scheme. Further,
this approximation scheme is an amount of communication/the number of rounds for three
real number multiplications in single precision (23 bits), which is a theoretically
optimized efficiency.
[0022] In square root calculation for plaintext, the following normalization may be performed
for efficient calculation. A difference between a position of a digit of 1 (that is,
2
0) at a decimal point position of an input a and a most significant bit (msb) of the
input a is set to e and the following modification is performed. That is, multiplication
by 2
e is performed for normalization to a section [1, 2), a square root √ (2
ea) is obtained, and then multiplication by 1/√2
e is performed.

[0023] In NPL 1, a method using a relationship 1/√a × a = √a was used. In the present invention,
√a is obtained directly for more efficient calculation. In this case, inverse calculation
of normalization after approximation is division. Thus, this is processing for performing
multiplication by √2
λ - e and division by √2
λ for division by √2
e.
[0024] An algorithm for approximating a group of elementary functions in the secure computation
with an eighth degree polynomial is shown hereinafter.
Algorithm 1: Function Approximation Protocol using Eighth Degree Polynomial
[0025]
Input: [x] ∈ [L, R)
Parameters: a, b, c, d, f, g, H, i, j, k, l, m, n, o, p, q, α, β, y, δ, and ζ
Output: [func (x)] corresponding to a target function func
- 1: Calculate [y']: = [x(δx + a - i) -j] using a sum of products, and lower a decimal
point position by right shift.
- 2: Calculate [y]: = [y' + (ix + j)].
- 3: Calculate [z']: = [y(ζy + b - k) + (c - 1)x - m] by sum of products, and lower
the decimal point position by right shift.
- 4: Calculate [z]: = [z' + (ky + lx + m)].
- 5: Calculate [w'/γ]: = [z(az + d - n/γ) + (βx + f - ο/γ) y + (g - p)x + (H - q)/γ]
by sum of products, and perform multiplication by γ and lowering a decimal point position
at the same time to obtain [w'].
- 6: Output [w]: = [w' + (nz + oy + px + q)].
[0026] The lowering of the decimal point position executed in steps 1 and 3 of algorithm
1 can be efficiently performed by using, for example, a public divisor division disclosed
in NPL 1.
[0027] Simultaneous execution of the public value multiplication and lowering of the decimal
point executed in step 5 of algorithm 1 can be efficiently performed by using, for
example, the following algorithm.
Algorithm 2: Multiplication of Public Value at Same Time without Increasing Processing
Cost from Right Shift
[0028]
Input: [x], multiplier m, shift amount σ
Output: [mx] after shift
- 1: Calculate a public value 2σ/m.
- 2: Calculate the following equation through public value division. Here, [mx] is regarded
as an expression the decimal point position of which is σ lower than that of [x].

[0029] Parameters L, R, a, b, c, d, f, g, H, i, j, k, l, m, n, o, p, q, α, β, y, δ, and
ζ used in algorithm 1 are set according to the approximate function func. When a square
root function, which is a target in the present invention, is approximated, the respective
parameters are set as shown in the following table, for example. Note that e
x, e
y, e
z, and e
w are decimal point positions of x, y, z, and w, and e'
y, e'
z, and e'
w are decimal point positions of y', z', and w'. These are parameters that determine
an amount of right shift in eighth degree polynomial approximation. For example, the
amount of right shift when y is calculated from y' is e'
y - e
y.
[Table 1]
| L |
1 |
| R |
2 |
| a |
-0.428141400291061 |
| b |
0.410120079876874 |
| c |
-0.0120309584327484 |
| d |
-3.71795672639017 |
| f |
-0.64377993662956 |
| g |
0.44709763892185 |
| H |
0.232903741490693 |
| i |
0 |
| j |
-0.366610117286381 |
| k |
0 |
| 1 |
0 |
| m |
-0.106711930503672 |
| n |
0 |
| o |
0 |
| p |
0 |
| q |
0.765 |
| α |
-14.25 |
| β |
0.125 |
| γ-1 |
1.07420733657823 |
| δ |
2-3 |
| ζ |
2-1 |
| ex |
28 |
| ey |
29 |
| ez |
29 |
| ew |
28 |
| e'y |
62 |
| e'z |
64 |
| e'w |
60 |
[0030] An algorithm for calculating a square root in the secure computation using algorithm
1 is shown hereafter. An algorithm for normalizing an input, which is a calculation
target, for calculation of a square root (algorithm 3) and an algorithm for calculating
the square root using algorithm 3 (algorithm 4) will be separately described herein.
Algorithm 3: Normalization Protocol for Square Root
[0031]
Input: [a]
Output: [b], [r], [c'] (where b is a value obtained by moving a most significant bit
of a to a decimal point position λ (that is, a value obtained by normalizing a to
[1, 2); r is a truth value indicating whether a calculation result is divided by √2;
c' is a number of a power of 2 that is used for an inverse calculation of normalization.)
1: Obtain a bit representation {a0}, ..., {aλ - 1} of [a] through bit decomposition.
2: Obtain a bit sequence {x0}, ..., {xλ - 1} in which only the value at a position of the most significant bit of a is 1.
3: Set λ' using the following equation. That is, let λ' be a smallest integer equal
to or greater than λ/2

4: Set {yi} using the following equation where i < λ'. That is, an exclusive logical sum of
{x2i} and {x2i + 1} is calculated.

However, when λ is an odd number, {yλ' - 1} is set according to the following equation:

5: Set {r} using the following equation. That is, an exclusive logical sum of all
{xj} is calculated where j is an odd number equal to or greater than 0 and smaller than
λ. r indicates whether it is necessary to perform division by √2.

6: Change {r} to [r] through mod p conversion.
7: Connect {y0}, ..., {yλ' - 1} through bit connection to obtain [c'].
8: Connect {xλ - 1}, ..., {x0} through bit connection to obtain [c].
9: Calculate [b]: = [a][c] and output [b], [r], and [c'].
Algorithm 4: Square Root Protocol
[0032]
Input: [a]
Output: [√a]
1: Obtain the value [b] obtained by normalizing [a] to [1, 2), and [c'] and [r'] required
for inverse calculation of normalization using algorithm 3.
2: Set λ' using the following equation. That is, set a smallest integer equal to or
greater than λ/2 as λ'.

3: When λ is an odd number, r' is set to √2, and when λ is an even number, r' is set
to 1.
4: Execute algorithm 1 for [b] and calculate a square root of [b]. In this case, for
multiplication of a public value y performed in step 5 of algorithm 1, selective public
multiplication is executed with a condition being [r] and options being r'γ and (r'/√2)γ,
and [w'/γ] ∗ γ ∗ [r?√2:1] ∗ r' is calculated. A result is [w].
5: Calculate [w][c']. In this case, right shift is performed with extra of λ' bits
unlike usual.
[0033] Generation of a flag sequence indicating the most significant bit executed in step
2 of algorithm 3 can be efficiently performed by using, for example, the following
algorithm.
Algorithm 5: MSB Flag Sequence Acquisition Protocol
[0034]
Input: Bit-represented integer {a0}, ..., {aλ - 1}
Output: Bit sequence {x0}, ..., {xλ - 1} in which only the value at the position of the msb of a is 1.
- 1: Under 0 ≤ i < λ - 1, assume {fi}: = {fi + 1 ∨ ai}.
- 2: Assume {fλ - 1}: = {aλ - 1}. Here, {f0}, ..., {fλ - 1} is a bit sequence in which 0s and Is are lined up with msb as a boundary, such as
0, 0, 0, 1, 1, 1, ..., 1.
- 3: Under 0 ≤ i < λ - 1, assume {xi}: = {fi XOR fi + 1}.
- 4: Assume {xλ - 1}: = {aλ - 1}. Here, {x0}, ..., {xλ - 1} is a bit sequence in which only the value at the position of msb is 1, such as 0,
0, 0, 1, 0, 0, ..., 0.
[0035] The selective public multiplication executed in step 4 of algorithm 4 can be efficiently
executed by using, for example, the following algorithm.
Algorithm 6: Multiplication of Required Right Shift Value by Selective Public Multiplier
[0036]
Input: [a], multipliers mo and m1, condition [c]
Output: [m1a] if c = 1 and [moa] if c = 0
- 1: Calculate [m1a] and [moa].
- 2: Output [c?m1a:m0a] using an if-then-else gate.
[0037] The public value multiplication executed in step 1 of algorithm 6 can be efficiently
performed, for example, by combining algorithm 2 with the following algorithm.
Algorithm 7: Right Shift in Plurality of Divisors/Public Divisor Division
[0038]
Input: [a], divisor do, d1, ..., dn - 1
Output: [a/do], [a/di], ..., [a/dn - 1]
- 1: Obtain a quotient [q] of [a].
- 2: Use the quotient [q] to calculate and output [a/di] for each i by right shift/public
divisor division.
[0039] The quotient obtained in step 1 of algorithm 7 can be efficiently obtained through
quotient transfer (see Reference 1).
Secure Square Root Computation System 100
[0041] The secure square root calculation system 100 of the embodiment is an information
processing system that executes the above square root protocol. The secure square
root computation system 100 includes N (≥ 3) secure computation apparatuses 1
1, ..., 1
N, as illustrated in Fig. 1. In this embodiment, the secure computation apparatuses
1
1, ..., 1
N are connected to a communication network 9. The communication network 9 is a circuit-switched
or packet-switched communication network configured so that respective connected apparatuses
can communicate with each other and, for example, the Internet, a local area network
(LAN), a wide area network (WAN), or the like can be used. It is not necessary for
each apparatus to be able to communicate online via the communication network 9. For
example, information to be input to a secure computation apparatus 1
n (n = 1, ..., N) may be stored in a portable recording medium such as a magnetic tape
or a USB memory and input offline from the portable recording medium to the secure
computation apparatus 1
n.
[0042] The secure computation apparatus 1
n included in the secure square root calculation system 100 of the embodiment includes,
for example, a bit decomposition unit 11, a flag sequence generation unit 12, a bit
sequence generation unit 13, a flag calculation unit 14, a flag conversion unit 15,
a public value multiplier setting unit 16, an inverse normalization multiplier generation
unit 17, a normalization multiplier generation unit 18, a normalization unit 19, a
square root calculation unit 20, an inverse normalization unit 21, and a right shift
unit 22, as shown in Fig. 2. The square root calculation unit 20 includes, for example,
a parameter storage unit 200, a first sum-of-products unit 201, a first addition unit
202, a second sum-of-products unit 203, a second addition unit 204, and a third sum-of-products
unit 205, a selective product calculation unit 206, and a third addition unit 207,
as illustrated in Fig. 3. A secure square root computation method of the embodiment
is realized by the secure computation apparatus 1
n performing processing of each step to be described below in cooperation with another
secure computation apparatus 1
n' (n' = 1, ..., N, where n ≠ n').
[0043] The secure computation apparatus 1
n is a special apparatus configured by loading a special program into a publicly known
or dedicated computer including, for example, a central processing unit (CPU), a main
storage device (RAM: Random Access Memory), and the like. The secure computation apparatus
1
n executes each process under the control of the central processing unit, for example.
Data input to the secure computation apparatus 1
n or data obtained by each processing is stored in, for example, the main storage device,
and the data stored in the main storage device is read to the central processing unit
as needed, and used for other processing. At least a part of each processing unit
of the secure computation apparatus 1
n may be configured by hardware such as an integrated circuit. Each storage unit included
in the secure computation apparatus 1
n can be configured of, for example, a main storage device such as a random access
memory (RAM), an auxiliary storage device configured of a hard disk, an optical disc,
or a semiconductor memory element such as a flash memory, or middleware such as a
relational database or a key value store.
[0044] A processing procedure of the secure square root computation method executed by the
secure square root computation system 100 of the embodiment will be described with
reference to Fig. 4.
[0045] In step S11, the bit decomposition unit 11 of each secure computation apparatus 1
n bit-decomposes the share value [a] of the value a input to the secure square root
computation system 100 to obtain a sequence of the share values {a
0}, ..., {a
λ - 1} of the bit representation ao, ..., a
λ - 1 of the value a. The bit decomposition unit 11 outputs a sequence of share values
{a
0}, ..., {a
λ - 1} to the flag sequence generation unit 12.
[0046] In step S12, the flag sequence generation unit 12 of each secure computation apparatus
1
n uses the sequence of share values {a
0}, ..., {a
λ - 1} to generate a sequence of share values {x
0}, ..., {x
λ - 1} of a flag sequence xo, ..., x
λ - 1 indicating a most significant bit of a value a. The flag sequence indicating the
most significant bit is, for example, a flag sequence in which only the value at the
position of the most significant bit obtained by using the above algorithm 5 is 1.
The flag sequence generation unit 12 outputs the sequence of share values {x
0}, ..., {x
λ - 1} to the bit sequence generation unit 13, the flag calculation unit 14, and the normalization
multiplier generation unit 18.
[0047] In step S13, the bit sequence generation unit 13 of each secure computation apparatus
1
n uses the sequence of share values {x
0}, ..., {x
λ - 1} to generate a sequence of share values {y
0}, ..., {y
λ' - 1} of a bit sequence yo, ..., y
λ' - 1 that becomes {y
i}: = {x
2i} XOR {x
2i + 1} where i < λ'. Here, λ' is the smallest integer equal to or greater than λ/2. That
is, share values {y
i} of the bit yi obtained by calculating an exclusive logical sum of the share values
{x
2i}and the share values {x
2i + 1} are obtained where i is an integer equal to or greater than 0 and smaller than λ'.
Further, when λ is an odd number, {y
λ' - 1}: = {x
2i} is assumed. The bit sequence generation unit 13 outputs the sequence of share values
{y
0}, .., {y
λ' - 1} to the inverse normalization multiplier generation unit 17.
[0048] In step S14, the flag calculation unit 14 of each secure computation apparatus 1
n uses the sequence of share values {x
0}, ..., {x
λ - 1} to calculate a share value {r} of the flag r (hereinafter also referred to as a
"division flag") indicating whether a calculation result is divided by √2. Specifically,
an exclusive logical sum of all share values {x
j} is calculated where j is an odd number equal to or greater than 0 and smaller than
λ. The flag calculation unit 14 outputs the share value {r} to the flag conversion
unit 15.
[0049] In step S15, the flag conversion unit 15 of each secure computation apparatus 1
n converts the share value {r} of the division flag r into the share value [r] through
mod p conversion.
The flag conversion unit 15 outputs the share value [r] to the square root calculation
unit 20.
[0050] In step S16, the public value multiplier setting unit 16 of each secure computation
apparatus 1
n sets r' = √2 when λ is an odd number and r' = 1 when λ is an even number, and sets
a public value r' by which a calculation result is multiplied (hereinafter also referred
to as a "public value multiplier"). The public value multiplier setting unit 16 outputs
the public value multiplier r' to the square root calculation unit 20.
[0051] In step S17, the normalization multiplier generation unit 17 of each secure computation
apparatus 1
n bit-connects the sequence of share values {y
0}, ..., {y
λ' - 1} in order from the front to generate a share value [c'] of the multiplier c' by which
a calculation result is multiplied in order to perform an inverse calculation of normalization
(hereinafter also referred to as a "inverse normalization multiplier"). The inverse
normalization multiplier generation unit 17 outputs the share value [c'] to the inverse
normalization unit 21.
[0052] In step S18, the normalization multiplier generation unit 18 of each secure computation
apparatus 1
n bit-connects the sequence of share values {x
0}, ..., {x
λ - 1} in reverse order to generate a share value [c] of a multiplier c by which an input
is multiplied for normalization (hereinafter also referred to as a "normalization
multiplier"). The normalization multiplier generation unit 18 outputs the share value
[c] to the normalization unit 19.
[0053] In step S19, the normalization unit 19 of each secure computation apparatus 1
n multiplies the share value [a] of the value a by the share value [c] of the normalization
multiplier c to calculate a share value [b] of a value b obtained by normalizing the
value a. The normalization unit 19 outputs the share value [b] to the square root
calculation unit 20.
[0054] In step S20, the square root calculation unit 20 of each secure computation apparatus
1
n uses parameters for approximating a square root function with an eighth degree polynomial
to execute algorithm 1, so that the square root is calculated for the share value
[b] of the value b. In this case, multiplication of the public value γ performed in
step 5 of algorithm 1 is performed by executing algorithm 6 with a condition being
the share value [r] of the division flag r and options being r'γ and (r'/√2)γ. That
is, the square root calculation unit 20 uses the share value [b] of the value b and
the share value [r] of the division flag r to calculate [√b]
∗ (r'/√2) when r = 1 and [√b]
∗ r' when r = 0 to generate a share value [w] of a calculation result w. The square
root calculation unit 20 outputs the share value [w] to the inverse normalization
unit 21.
[0055] In step S21, the inverse normalization unit 21 of each secure computation apparatus
1
n multiplies the share value [w] of the calculation result w by the share value [c']
of the inverse normalization multiplier c'. The inverse normalization unit 21 outputs
the multiplication result [w][c'] to the right shift unit 22.
[0056] In step S22, the right shift unit 22 of each secure computation apparatus 1
n shifts right the multiplication result [w][c'] by λ' bits and outputs a share value
[√a] of the square root of the value a.
[0057] A processing procedure that is executed by the square root calculation unit 20 will
be described in detail with reference to Fig. 5.
[0058] Parameters a, b, c, d, f, g, H, i, j, k, l, m, n, o, p, q, α, β, γ, δ, and ζ for
approximating the square root function with an eighth degree polynomial are stored
in the parameter storage unit 200. Each parameter is determined in advance according
to a function to be approximated, and when the square root function is approximated,
values shown in Table 1 are set.
[0059] In step S201, the first sum-of-products unit 201 of the square root calculation unit
20 calculates [y']: = [x(δx + a - i) - j] through a sum of products, and lowers a
decimal point position through right shift. Here, x is a value b obtained by normalizing
the value a. That is, [x]: = [b]. The first sum-of-products unit 201 outputs [y']
to the first addition unit 202.
[0060] In step S202, the first addition unit 202 of the square root calculation unit 20
calculates [y]: = [y' + (ix + j)].The first addition unit 202 outputs [y] to the second
sum-of-products unit 203.
[0061] In step S203, the second sum-of-products unit 203 of the square root calculation
unit 20 calculates [z']: = [y(ζy + b - k) + (c - l)x - m] through a sum of products,
and lowers a decimal point position through right shift. The second sum-of-products
unit 203 outputs [z'] to the second addition unit 204.
[0062] In step S204, the second addition unit 204 of the square root calculation unit 20
calculates [z]: = [z' + (ky + lx + m)]. The second addition unit 204 outputs [z] to
the third sum-of-products unit 205.
[0063] In step S205, the third sum-of-products unit 205 of the square root calculation unit
20 calculates [w'/γ]: = [z(az + d - n/γ) + (βx + f - o/y)y + (g - p)x + (H - q)/γ]
through a sum of products. The third sum-of-products unit 205 outputs [w'/γ] to the
selective product calculation unit 206.
[0064] In step S206, the selective product calculation unit 206 of the square root calculation
unit 20 executes algorithm 6 with a condition being [r] and options being r'γ and
(r'/√2)γ. That is, using the share value [r] of the division flag r, [w']: = [w'/γ]
∗ (r'/√2)γ is calculated when r = 1, and [w']: = [w'/γ]
∗ r'γ is calculated when r = 0. The selective product calculation unit 206 outputs
[w'] to the third addition unit 207.
[0065] In step S207, the third addition unit 207 of the square root calculation unit 20
calculates [w]: = [w' + (nz + oy + px + q)].
Modification Example: Secure Normalization System
[0066] The secure square root computation system 100 of the embodiment is configured to
execute both normalization for square root calculation (algorithm 3) and square root
calculation (algorithm 4). A secret normalization system of the modification example
is configured to execute only a part of the secure square root computation system
100 that performs normalization (algorithm 3) for the square root calculation. That
is, the secret normalization system receives a share value [a] of a value a, and outputs
a share value [b] of a value b obtained by normalizing the value a to [1, 2), a share
value [c'] of an inverse normalization multiplier c', and a share value [r] of a division
flag r. Specifically, the secure computation apparatus 1
n included in the secret normalization system of the modification example includes
a bit decomposition unit 11, a flag sequence generation unit 12, a bit sequence generation
unit 13, a flag calculation unit 14, a flag conversion unit 15, an inverse normalization
multiplier generation unit 17, a normalization multiplier generation unit 18, and
a normalization unit 19.
[0067] Although the embodiments of the present invention have been described above, a specific
configuration is not limited to these embodiments, and even when a design is appropriately
changed without departing from the spirit of the present invention, it is obvious
that this is included in the present invention. Various processing described in the
embodiments may be not only executed in chronological order according to order of
description, but may also be executed in parallel or individually according to a processing
capacity of an apparatus that executes processing or as necessary.
Program and Recording Medium
[0068] When various processing functions in each apparatus described in the above embodiment
are realized by a computer, processing content of the function to be included in each
apparatus is described by a program. This program is loaded into a storage unit 1020
of a computer illustrated in Fig. 6 and a control unit 1010, an input unit 1030, an
output unit 1040, and the like are operated according to the program so that various
processing functions in each of the above apparatuses are realized on the computer.
[0069] A program in which processing content thereof has been described can be recorded
on a computer-readable recording medium. The computer-readable recording medium may
be, for example, a magnetic recording device, an optical disc, a magnetooptical recording
medium, or a semiconductor memory.
[0070] Further, distribution of this program is performed, for example, by selling, transferring,
or renting a portable recording medium such as a DVD or CD-ROM on which the program
has been recorded. Further, the program may be distributed by being stored in a storage
device of a server computer and transferred from the server computer to another computer
via a network.
[0071] The computer that executes such a program first temporarily stores, for example,
the program recorded on the portable recording medium or the program transferred from
the server computer in a storage device of the computer. When the computer executes
the processing, the computer reads the program stored in the recording medium of the
computer and executes processing according to the read program. Further, as another
embodiment of the program, the computer may directly read the program from the portable
recording medium and execute the processing according to the program, and further,
processing according to a received program may be sequentially executed each time
the program is transferred from the server computer to the computer. Further, a configuration
may be adopted in which the above-described processing is executed by a so-called
application service provider (ASP) type service for realizing a processing function
according to only an execution instruction and result acquisition without transferring
the program from the server computer to the computer. It is assumed that the program
in the present embodiment includes information provided for processing of an electronic
calculator and being pursuant to the program (such as data that is not a direct command
to the computer, but has properties defining processing of the computer).
[0072] Further, in this embodiment, although the present apparatus is configured by a predetermined
program being executed on the computer, at least a part of processing content of thereof
may be realized by hardware.
1. A secure square root computation system for receiving a share value [a] of a value
a as an input, and calculating a share value [√a] of a square root of the value a,
the secure square root computation system comprising:
a plurality of secure computation apparatuses,
wherein λ is a decimal point position of the value a, and λ' is the smallest integer
equal to or greater than λ/2, and each of the plurality of secure computation apparatuses
comprises:
a flag sequence generation unit configured to generate a first sequence of share values
{x0}, ..., {xλ - 1} of a flag sequence xo, ..., xλ - 1 indicating a most significant bit of the value a;
a bit sequence generation unit configured to calculate an exclusive logical sum of
share values {x2i} and share values {x2i + 1} of the first sequence of share values to obtain share values {yi} of a bit yi to generate a second sequence of share values {y0}, ..., {yλ' - 1} of a bit sequence yo, ..., yλ' - 1 where i is an integer equal to or greater than 0 and smaller than λ';
a flag calculation unit configured to calculate an exclusive logical sum of all share
values {xj} of the first sequence of share values to obtain a share value {r} of a division
flag r where j is an odd number equal to or greater than 0 and smaller than λ;
a public value multiplier setting unit configured to set a public value multiplier
r', the public value multiplier r' being √2 when λ is an odd number and 1 when λ is
an even number;
an inverse normalization multiplier generation unit configured to generate a share
value [c'] of an inverse normalization multiplier c' obtained by bit-connecting the
second sequence of share values {y0}, ..., {yλ' - 1} in order from the front;
a normalization multiplier generation unit configured to generate a share value [c]
of a normalization multiplier c obtained by bit-connecting the first sequence of share
values {x0}, ..., {xλ - 1} in reverse order;
a normalization unit configured to calculate a share value [b] obtained by multiplying
the share value [a] by the share value [c];
a square root calculation unit configured to use the share value [b], the share value
{r}, and the public value multiplier r' and calculate [√b] ∗ (r'/√2) when r = 1 and [√b] ∗ r' when r = 0 to obtain a share value [w]; and
an inverse normalization unit configured to calculate the share value [√a] obtained
by shifting right a multiplication result of the share value [w] and the share value
[c'] by λ' bits.
2. The secure square root computation system according to claim 1,
wherein a, b, c, d, f, g, H, i, j, k, l, m, n, o, p, q, α, β, γ, δ, and ζ are parameters
for approximating a square root function with an eighth degree polynomial, and [x]:
= [b] is assumed, and
the square root calculation unit includes
a first sum-of-products unit configured to calculate [y']: = [x(δx + a - i) - j];
a first addition unit configured to calculate [y]: = [y' + (ix + j)];
a second sum-of-products unit configured to calculate [z']: = [y(ζy + b - k) + (c
- l)x - m];
a second addition unit configured to calculate [z]: = [z' + (ky + lx + m)];
a third sum-of-products unit configured to calculate [w'/γ]: = [z(az + d - n/γ) +
(βx + f - o/γ)y + (g - p)x + (H - q)/γ];
a selective product calculation unit configured to use the share value {r} to calculate
[w'/γ] ∗ (r'/√2)γ when r = 1 and [w'/γ] ∗ r'γ when r = 0 to obtain a calculation result [w']; and
a third addition unit configured to calculate [w]: = [w' + (nz + op + px + q)].
3. A secret normalization system for normalizing a share value [a] of a value a to calculate
a share value [√a] of a square root of the value a, the secret normalization system
comprising:
a plurality of secure computation apparatuses
wherein λ is a decimal point position of the value a, and λ' is the smallest integer
equal to or greater than λ/2, and each of the plurality of secure computation apparatuses
comprises:
a flag sequence generation unit configured to generate a first sequence of share values
{x0}, ..., {xλ - 1} of a flag sequence xo, ..., xλ - 1 indicating a most significant bit of the value a;
a bit sequence generation unit configured to calculate an exclusive logical sum of
share values {x2i} and share values {x2i + 1} of the first sequence of share values to obtain share values {yi} of bits yi to generate a sequence of share values {y0}, ..., {yλ' - 1} of a bit sequence yo, ..., yλ' - 1 where i is an integer i equal to or greater than 0 and smaller than λ';
a flag calculation unit configured to calculate an exclusive logical sum of all share
values {xj} of the first sequence of share values to obtain a share value {r} of a division
flag r where j is an odd number equal to or greater than 0 and smaller than λ;
a public value multiplier setting unit configured to set a public value multiplier
r', the public value multiplier r' being √2 when λ is an odd number and 1 when λ is
an even number;
an inverse normalization multiplier generation unit configured to generate a share
value [c'] of an inverse normalization multiplier c' obtained by bit-connecting the
second sequence of share values {y0}, ..., {yλ' - 1} in order from the front;
a normalization multiplier generation unit configured to generate a share value [c]
of a normalization multiplier c obtained by bit-connecting the first sequence of share
values {x0}, ..., {xλ - 1} in reverse order; and
a normalization unit configured to calculate a share value [b] obtained by multiplying
the share value [a] by the share value [c].
4. A secure square root computation method executed by a secure square root computation
system for receiving a share value [a] of a value a as an input, and calculating a
share value [√a] of a square root of the value a, the secure square root computation
system including a plurality of secure computation apparatuses,
the secure square root computation method comprising:
generating, by a flag sequence generation unit of each of the plurality of secure
computation apparatuses, a first sequence of share values {x0}, ..., {xλ - 1} of a flag sequence xo, ..., xλ - 1 indicating a most significant bit of the value a;
calculating, by a bit sequence generation unit of the secure computation apparatus,
an exclusive logical sum of share values {x2i} and share values {x2i + 1} of the first sequence of share values to obtain share values {yi} of a bit yi to generate a second sequence of share values {y0}, ..., {yλ' - 1} of a bit sequence yo, ..., yλ' - 1 where i is an integer equal to or greater than 0 and smaller than λ';
calculating, by a flag calculation unit of the secure computation apparatus, an exclusive
logical sum of all share values {xj} of the first sequence of share values to obtain a share value {r} of a division
flag r where j is an odd number equal to or greater than 0 and smaller than λ;
setting, by a public value multiplier setting unit of the secure computation apparatus,
a public value multiplier r', the public value multiplier r' being √2 when λ is an
odd number and 1 when λ is an even number;
generating, by an inverse normalization multiplier generation unit of the secure computation
apparatus, a share value [c'] of an inverse normalization multiplier c' obtained by
bit-connecting the second sequence of share values {y0}, ..., {yλ' - 1} in order from the front;
generating, by a normalization multiplier generation unit of the secure computation
apparatus, a share value [c] of a normalization multiplier c obtained by bit-connecting
the first sequence of share values {x0}, ..., {xλ - 1} in reverse order;
calculating, by a normalization unit of the secure computation apparatus, a share
value [b] obtained by multiplying the share value [a] by the share value [c];
using, by a square root calculation unit of each secure computation apparatus, the
share value [b], the share value {r}, and the public value multiplier r' to calculate
[√b] ∗ (r'/√2) when r = 1 and [√b] ∗ r' when r = 0 to obtain a share value [w]; and
calculating, by an inverse normalization unit of the secure computation apparatus,
the share value [√a] obtained by shifting right a multiplication result of the share
value [w] and the share value [c'] by λ' bits,
wherein λ is a decimal point position of the value a, and λ' is the smallest integer
equal to or greater than λ/2.
5. A secret normalization method executed by a secret normalization system for normalizing
a share value [a] of a value a to calculate a share value [√a] of a square root of
the value a, the secret normalization system including a plurality of secure computation
apparatuses,the secret normalization method comprises:
generating, by a flag sequence generation unit of each of the plurality of secure
computation apparatuses, a first sequence of share values {x0}, ..., {xλ - 1} of a flag sequence xo, ..., xλ - 1 indicating a most significant bit of the value a;
calculating, by a bit sequence generation unit of the secure computation apparatus,
an exclusive logical sum of share values {x2i} and share values {x2i + 1} of the first sequence of share values to obtain share values {yi} of a bit yi to generate a second sequence of share values {y0}, ..., {yλ' - 1} of a bit sequence yo, ..., yλ' - 1 where i is an integer equal to or greater than 0 and smaller than λ';
calculating, by a flag calculation unit of the secure computation apparatus, an exclusive
logical sum of all share values {xj} of the first sequence of share values to obtain a share value {r} of a division
flag r where j is an odd number equal to or greater than 0 and smaller than λ;
setting, by a public value multiplier setting unit of the secure computation apparatus,
a public value multiplier r', the public value multiplier r' being √2 when λ is an
odd number and 1 when λ is an even number;
generating, by an inverse normalization multiplier generation unit of the secure computation
apparatus, a share value [c'] of an inverse normalization multiplier c' obtained by
bit-connecting the second sequence of share values {y0}, ..., {yλ' - 1} in order from the front;
generating, by a normalization multiplier generation unit of the secure computation
apparatus, a share value [c] of a normalization multiplier c obtained by bit-connecting
the first sequence of share values {x0}, ..., {xλ - 1} in reverse order; and
calculating, by a normalization unit of the secure computation apparatus, a share
value [b] obtained by multiplying the share value [a] by the share value [c],
wherein λ is a decimal point position of the value a, and λ' is the smallest integer
equal to or greater than λ/2.
6. The secure computation apparatus used in the secure square root computation system
according to claim 1 or 2 or the secret normalization system according to claim 3.
7. A program for causing a computer to function as the secure computation apparatus according
to claim 6.