TECHNICAL FIELD
[0001] The invention is directed to a display apparatus and a polarization film included
in the same.
DISCUSSION OF THE RELATED ART
[0002] A display apparatus is a device that displays an image. Examples of a display apparatus
include a liquid crystal display (LCD), an organic light-emitting display (OLED),
and electrophoretic display (EPD). As a significant disadvantage external light may
be reflected from the front surface of the display apparatus. The problem will be
prevented by the invention - see the independent claims.
SUMMARY
[0003] One or more embodiments include a display apparatus in which a thickness direction
phase difference of the display apparatus is within a preset range to increase the
visibility of the display apparatus.
[0004] According to the invention, a display apparatus includes a display panel that includes
a display element and a thin-film encapsulation layer disposed on the display element,
and a polarization film disposed on the display panel and that includes a phase compensation
layer, a phase retardation layer, and a polarization layer. A thickness direction
phase difference of the display panel is less than or equal to about -35 nm.
[0005] The phase compensation layer may include a first phase compensation layer and a second
phase compensation layer.
[0006] The phase retardation layer may be located between the first phase compensation layer
and the second phase compensation layer.
[0007] The second phase compensation layer may be located between the phase retardation
layer and the polarization layer.
[0008] The first phase compensation layer may include a positive C plate.
[0009] A thickness direction phase difference of the first phase compensation layer may
be less than or equal to about -40 nm.
[0010] The second phase compensation layer may include a tri-acetyl cellulose (TAC) film.
[0011] A thickness direction phase difference of the second phase compensation layer may
be greater than or equal to about +4 nm.
[0012] The second phase compensation layer may include a negative C plate.
[0013] The second phase compensation layer may be located on the first phase compensation
layer, and the phase retardation layer may be located on the second phase compensation
layer.
[0014] The phase retardation layer may include a quarter-wave plate (QWP).
[0015] The polarization film further may include a protective substrate located on the polarization
layer.
[0016] The display element may include a pixel electrode, a counter electrode, and an emission
layer located between the pixel electrode and the counter electrode.
[0017] The thin-film encapsulation layer may include at least one inorganic encapsulation
layer and at least one organic encapsulation layer.
[0018] The at least one inorganic encapsulation layer may include a first inorganic encapsulation
layer that includes at least one inorganic material and a second inorganic encapsulation
layer that includes at least one inorganic material.
[0019] According to one or more embodiments, a polarization film includes a first phase
compensation layer that includes a positive C plate, a phase retardation layer disposed
on the first phase compensation layer, a second phase compensation layer disposed
on a side of the phase retardation layer and that has a thickness direction phase
difference of greater than or equal to about +4 nm, and a polarization layer disposed
on the second phase compensation layer.
[0020] A thickness direction phase difference of the first phase compensation layer may
be less than or equal to about -40 nm.
[0021] The second phase compensation layer may include a tri-acetyl cellulose (TAC) film
or a negative C plate.
[0022] The phase retardation layer may include a quarter-wave plate (QWP).
[0023] The polarization film may further include a protective substrate disposed on the
polarization layer.
[0024] According to one or more embodiments, a display apparatus includes a display panel
that includes a display element and a thin-film encapsulation layer disposed on the
display element, and a polarization film disposed on the display panel and that includes
a first phase compensation layer, a second phase compensation layer, a phase retardation
layer, and a polarization layer. A thickness direction phase difference of the first
phase compensation layer is less than or equal to about -40 nm, and a thickness direction
phase difference of the second phase compensation layer is greater than or equal to
about +4 nm.
[0025] A thickness direction phase difference of the display panel may be less than or equal
to about -35 nm.
BRIEF DESCRIPTION OF THE DRAWINGS
[0026]
FIG. 1 is a plan view of a display apparatus, according to an embodiment.
FIG. 2 is a cross-sectional view of a display apparatus, according to an embodiment.
FIG. 3 is a cross-sectional view of a part of a display panel of a display apparatus,
according to an embodiment.
FIG. 4 is a cross-sectional view of a part of a polarization film of a display apparatus,
according to an embodiment.
FIG. 5 is a cross-sectional view of a part of a polarization film of a display apparatus,
according to an embodiment.
FIGS. 6 and 7 are cross-sectional views of a display apparatus, according to an embodiment.
FIGS. 8A to 8D are graphs of reflection chroma as a function of a change in a viewing
angle in a CIE L*a*b* coordinate system, when an entire thickness direction phase
difference of a display apparatus is about -67 nm, about -47 nm, about -17 nm, and
about 0 nm.
DETAILED DESCRIPTION
[0027] Reference will now be made in detail to embodiments, examples of which are illustrated
in the accompanying drawings, wherein like reference numerals may refer to like elements
throughout.
[0028] It will be further understood that, when a layer, region, or component is referred
to as being "on" another layer, region, or component, it may be directly on the other
layer, region, or component, or may be indirectly on the other layer, region, or component
with intervening layers, regions, or components therebetween.
[0029] The term "about" as used herein is inclusive of the stated value and means within
an acceptable range of deviation for the particular value as determined by one of
ordinary skill in the art, considering the measurement in question and the error associated
with measurement of the particular quantity, such as the limitations of the measurement
system. For example, "about" may mean within one or more standard deviations as understood
by one of the ordinary skill in the art. Further, it is to be understood that while
parameters may be described herein as having "about" a certain value, according to
embodiments, the parameter may be exactly the certain value or approximately the certain
value within a measurement error as would be understood by a person having ordinary
skill in the art.
[0030] In embodiments, "a plan view of an object" refers to "a view of an object seen from
above, and "a cross-sectional view of an object" refers to "a view of an object vertically
cut and seen from the side. In embodiments, when elements "overlap," it may mean that
the elements overlap in a "plan view" and/or a "cross-sectional view".
[0031] Hereinafter, embodiments will be described in detail with reference to the accompanying
drawings, wherein the same or corresponding elements may be denoted by the same reference
numerals throughout.
[0032] FIG. 1 is a plan view of a display apparatus, according to an embodiment.
[0033] Referring to FIG. 1, in an embodiment, a display apparatus 1 includes a display area
DA and a peripheral area PA. The display apparatus 1 includes a substrate 100. For
example, the substrate 100 includes the display area DA and the peripheral area PA.
[0034] A plurality of pixels PX that each include a display element such as an organic light-emitting
diode are arranged in the display area DA of the substrate 100. Each pixel PX further
includes a plurality of thin-film transistors and a storage capacitor that control
the display element. The number of thin-film transistors in one pixel PX may vary.
For example, one pixel may include one to seven thin-film transistors.
[0035] Various wirings that transmit electrical signals to the display area DA are located
in the peripheral area PA of the substrate 100. A thin-film transistor may also be
provided in the peripheral area PA, and the thin-film transistor in the peripheral
area PA is a part of a circuit unit that controls electrical signals transmitted into
the display area DA.
[0036] Although the display apparatus 1 according to an embodiment is described as being
an organic light-emitting display apparatus, the display apparatus 1 of embodiments
of the present disclosure is not limited thereto. For example, the display apparatus
1 according to an embodiment may be any of various types of display apparatuses, such
as an inorganic electroluminescent (EL) display (inorganic light-emitting display)
or a quantum dot light-emitting display.
[0037] FIG. 2 is a cross-sectional view of a display apparatus, according to an embodiment.
[0038] Referring to FIG. 2, the display apparatus 1 according to an embodiment includes
a display panel 10, a cushion film 20, an input sensing layer 30, a polarization film
40, and a cover window 50.
[0039] The cushion film 20 is located under the display panel 10. The cushion film 20 protects
the display panel 10 from external impacts. A first adhesive layer 71 is located between
the display panel 10 and the cushion film 20. The first adhesive layer 71 may be a
pressure sensitive adhesive (PSA).
[0040] The input sensing layer 30 is disposed on the display panel 10. The input sensing
layer 30 obtains coordinate information of an external input, such as a touch event.
The input sensing layer 30 includes a sensing electrode (or a touch electrode) and
trace lines (or signal wirings) connected to the sensing electrode. The input sensing
layer 30 is located directly on the display panel 10. However, embodiments of the
disclosure are not necessarily limited thereto.
[0041] The polarization film 40 is disposed on the input sensing layer 30. The polarization
film 40 will be described in more detail with reference to FIGS. 4 and 5.
[0042] A second adhesive layer 73 is disposed between the polarization film 40 and the input
sensing layer 30. The second adhesive layer 73 may be a PSA.
[0043] The cover window 50 is disposed on the polarization film 40. The cover window 50
protects the display panel 10, the input sensing layer 30, and the polarization layer
40 disposed under the cover window 50. A third adhesive layer 75 is disposed between
the polarization film 40 and the cover window 50. The third adhesive layer 75 may
be an optically clear adhesive (OCA).
[0044] FIG. 3 is a cross-sectional view of a part of a display panel of a display apparatus,
according to an embodiment.
[0045] Referring to FIG. 3, in an embodiment, the display panel 10 includes the substrate
100, first and second thin-film transistors T1 and T2 disposed on the substrate 100,
a display element 210 electrically connected to the first and second thin-film transistors
T1 and T2, a capping layer 220, and a thin-film encapsulation layer 300. The display
panel 10 further includes various insulating layers 111, 112, 113, 115, 118, and 119
and a storage capacitor Cst.
[0046] The substrate 100 is formed of any one of various materials, such as a glass, a metal,
or a plastic. In an embodiment, the substrate 100 is a flexible substrate. The substrate
100 includes a polymer resin, such as at least one of polyethersulfone (PES), polyacrylate
(PAR), polyetherimide (PEI), polyethylene naphthalate (PEN), polyethylene terephthalate
(PET), polyphenylene sulfide (PPS), polyarylate, polyimide (PI), polycarbonate (PC),
or cellulose acetate propionate (CAP).
[0047] A buffer layer 111 is disposed on the substrate 100, and reduces or prevents penetration
of foreign materials, moisture, or external air from the bottom of the substrate 100
and planarizes the substrate 100. The buffer layer 111 may include an inorganic material
such as oxide or nitride, an organic material, or a combination of an organic material
and an inorganic material, and may have a single or multi-layer structure that includes
an inorganic material and an organic material. A barrier layer is further provided
between the substrate 100 and the buffer layer 111 to prevent penetration of external
air. The buffer layer 111 includes at least one of silicon oxide (SiO
2) or silicon nitride (SiN
X).
[0048] The first thin-film transistor T1 and/or the second thin-film transistor T2 are disposed
on the buffer layer 111. The first thin-film transistor T1 includes a first semiconductor
layer A1, a first gate electrode G1, a first source electrode S1, and a first drain
electrode D1. The second thin-film transistor T2 includes a second semiconductor layer
A2, a second gate electrode G2, a second source electrode S2, and a second drain electrode
D2. The first thin-film transistor T1 is connected to the display element 210 and
functions as a driving thin-film transistor that drives the display element 210. The
second thin-film transistor T2 is connected to a data line DL and may function as
a switching thin-film transistor. Although two thin-film transistors are illustrated
in FIG. 3, embodiments of the disclosure are not necessarily limited thereto. The
number of thin-film transistors may changed in various ways in other embodiments.
For example, one to seven thin-film transistors may be provided.
[0049] In an embodiment, each of the first semiconductor layer A1 and the second semiconductor
layer A2 includes one of amorphous silicon or polycrystalline silicon. In an embodiment,
each of the first semiconductor layer A1 and the second semiconductor layer A2 includes
an oxide of at least one of indium (In), gallium (Ga), tin (Sn), zirconium (Zr), vanadium
(V), hafnium (Hf), cadmium (Cd), germanium (Ge), chromium (Cr), titanium (Ti), or
zinc (Zn). Each of the first semiconductor layer A1 and the second semiconductor layer
A2 includes a channel region, and a source region and a drain region doped with impurities.
[0050] The first gate electrode G1 and the second gate electrode G2 are respectively located
on the first semiconductor layer A1 and the second semiconductor layer A2 with a first
gate insulating layer 112 therebetween. Each of the gate electrode G1 and the second
gate electrode G2 includes at least one of molybdenum (Mo), aluminum (Al), copper
(Cu), or titanium (Ti), and may have a single or multi-layer structure. For example,
each of the first gate electrode G1 and the second gate electrode G2 has a single-layer
structure that includes Mo.
[0051] The first gate insulating layer 112 includes at least one of silicon oxide (SiO
2), silicon nitride (SiN
x), silicon oxynitride (SiON), aluminum oxide (Al
2O
3), titanium oxide (TiO
2), tantalum oxide (Ta
2O
5), hafnium oxide (HfO
2), or zinc oxide (ZnO
2).
[0052] A second gate insulating layer 113 is disposed on the first gate insulating layer
112 and covers the first gate electrode G1 and the second gate electrode G2. The second
gate insulating layer 113 includes at least one of silicon oxide (SiO
2), silicon nitride (SiN
x), silicon oxynitride (SiON), aluminum oxide (Al
2O
3), titanium oxide (TiO
2), tantalum oxide (Ta
2O
5), hafnium oxide (HfO
2), or zinc oxide (ZnO
2).
[0053] A first storage electrode CE1 of the storage capacitor Cst overlaps the first thin-film
transistor T1. For example, the first gate electrode G1 of the first thin-film transistor
T1 functions as the first storage electrode CE1 of the storage capacitor Cst. However,
embodiments of the disclosure are not necessarily limited thereto. In some embodiments,
the storage capacitor Cst does not overlap the first thin-film transistor T1 and is
spaced apart from the first thin-film transistor T1.
[0054] A second storage electrode CE2 of the storage capacitor Cst overlaps the first storage
electrode CE1 with the second gate insulating layer 113 located therebetween. The
second gate insulating layer 113 functions as a dielectric layer of the storage capacitor
Cst. The second storage electrode CE2 includes a conductive material that includes
at least one of molybdenum (Mo), aluminum (Al), copper (Cu), or titanium (Ti), and
may have a single or multi-layer structure that include the above materials. For example,
the second storage electrode CE2 may have a single-layer structure that includes Mo,
or a multi-layer structure that includes Mo/AI/Mo.
[0055] An interlayer insulating layer 115 is formed over the entire surface of the substrate
100 and covers the second storage electrode CE2. The interlayer insulating layer 115
includes at least one of silicon oxide (SiO
2), silicon nitride (SiN
x), silicon oxynitride (SiON), aluminum oxide (Al
2O
3), titanium oxide (TiO
2), tantalum oxide (Ta
2O
5), hafnium oxide (HfO
2), or zinc oxide (ZnO
2).
[0056] The first source electrode S1, the second source electrode S2, the first drain electrode
D1, and the second drain electrode D2 are disposed on the interlayer insulating layer
115. Each of the first source electrode S1, the second source electrode S2, the first
drain electrode D1, and the second drain electrode D2 extends through the interlayer
insulating layer 115, the second gate insulating layer 113 and the first gate insulating
layer 112 and makes contact with the first semiconductor layer A1 or the second semiconductor
layer A2, respectively. Each of the first source electrode S1, the second source electrode
S2, the first drain electrode D1, and the second drain electrode D2 includes a conductive
material that includes at least one of molybdenum (Mo), aluminum (Al), copper (Cu),
or titanium (Ti), and may have a single or multi-layer structure that include the
above materials. For example, each of the first source electrode S1, the second source
electrode S2, the first drain electrode D1, and the second drain electrode D2 has
a multi-layer structure that includes Ti/Al/Ti.
[0057] A planarization layer 118 is disposed on the interlayer insulating layer 115 and
covers first source electrode S1, the second source electrode S2, the first drain
electrode D1, and the second drain electrode D2, and the display element 210 is disposed
on the planarization layer 118. The display element 210 includes a pixel electrode
211, an emission layer 213, and a counter electrode 215.
[0058] The planarization layer 118 has a flat top surface that planarizes the pixel electrode
211. The planarization layer 118 may have a single or multi-layer structure that includes
an organic material or an inorganic material. For example, the planarization layer
118 includes at least one of benzocyclobutene (BCB), polyimide, hexamethyldisiloxane
(HMDSO), a general-purpose polymer such as polymethyl methacrylate (PMMA) or polystyrene
(PS), a polymer derivative that includes a phenol-based group, an acrylic polymer,
an imide-based polymer, an aryl ether-based polymer, an amide-based polymer, a fluorinated
polymer, a p-xylene-based polymer, a vinyl alcohol-based polymer, or a blend thereof.
The planarization layer 118 may also include at least one of silicon oxide (SiO
2), silicon nitride (SiN
x), silicon oxynitride (SiON), aluminum oxide (Al
2O
3), titanium oxide (TiO
2), tantalum oxide (Ta
2O
5), hafnium oxide (HfO
2), or zinc oxide (ZnO
2). After the planarization layer 118 is formed, chemical mechanical polishing is performed
to provide a flat top surface.
[0059] An opening that exposes one of the first source electrode S1 and the first drain
electrode D1 of the first thin-film transistor T1 is formed in the planarization layer
118, and the pixel electrode 211 contacts the first source electrode S1 or the first
drain electrode D1 through the opening and is electrically connected to the first
thin-film transistor T1.
[0060] The pixel electrode 211 includes a conductive oxide such as at least one of indium
tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), indium oxide (In
2O
3), indium gallium oxide (IGO), or aluminum zinc oxide (AZO). In an embodiment, the
pixel electrode 211 includes a reflective film that includes at least one of silver
(Ag), magnesium (Mg), aluminum (Al), platinum (Pt), palladium (Pd), gold (Au), nickel
(Ni), neodymium (Nd), iridium (Ir), chromium (Cr), or a compound thereof. In an embodiment,
the pixel electrode 210 further includes a film formed of at least one of ITO, IZO,
ZnO, or In
2O
3 over/under the above reflective film. For example, the pixel electrode 211 has a
multi-layer structure that includes ITO/Ag/ITO.
[0061] A pixel-defining film 119 is disposed on the pixel electrode 211 and the planarization
layer 118. The pixel-defining film 119 defines a pixel by having an opening 119OP
that corresponds to each pixel, such as an opening through which at least a central
portion of the pixel electrode 211 is exposed. In addition, the pixel-defining film
119 increases a distance between an edge of the pixel electrode 211 and a counter
electrode 215, thereby preventing an arc, etc., from occurring between the edge of
the pixel electrode 211 and the counter electrode 215. The pixel-defining film 119
is formed of an organic material such as one of PI or HMDSO.
[0062] A spacer may be disposed on the pixel-defining film 119. The spacer prevents damage
to a mask that may occur in a mask process. The spacer is formed of an organic material
such as PI or HMDSO. The spacer and the pixel-defining film 119 are simultaneously
formed by using the same material. For example, a halftone mask can be used.
[0063] The emission layer 213 of the display element 210 includes an organic material that
includes a fluorescent or phosphorescent material that emits red, green, blue, or
white light. The emission layer 213 is formed of an organic material, and functional
layers such as a hole transport layer (HTL), a hole injection layer (HIL), an electron
transport layer (ETL), and an electron injection layer (EIL) are selectively located
under and over the emission layer. The emission layer 213 corresponds to each of a
plurality of pixel electrodes 211. However, embodiments of the disclosure are not
necessarily limited thereto, and various modifications are made in other embodiments.
For example, the emission layer 213 includes an integrated layer that covers all of
the plurality of pixel electrodes 211.
[0064] The counter electrode 215 may be a light-transmitting electrode or a reflective electrode.
Alternatively, the counter electrode 215 may be a transparent or semitransparent electrode,
and includes a metallic thin film that has a low work function and that includes at
least one of ytterbium (Yb), lithium (Li), calcium (Ca), LiF/Ca, LiF/AI, aluminum
(Al), silver (Ag), magnesium (Mg), or a compound thereof. In addition, a transparent
conductive oxide (TCO) film such as at least one of ITO, IZO, ZnO, or In
2O
3 may be further disposed on the metallic thin film. The counter electrode 215 is disposed
over the entire display area DA and the peripheral area PA, and is disposed on the
emission layer 213 and the pixel-defining film 119. The counter electrode 215 is integrally
formed for the plurality of display elements 210 and corresponds to each of the plurality
of pixel electrodes 211.
[0065] The capping layer 220 is disposed on the display element 210. For example, the capping
layer 220 is disposed on the counter electrode 215. The capping layer 220 may include
an organic material and/or an inorganic material. When the capping layer 220 includes
an organic material, the capping layer 220 includes at least one of α-NPD, NPB, TPD,
m-MTDATA, Alq
3, CuPc, N4,N4,N4',N4'-tetra (biphenyl-4-yl) biphenyl-4,4'-diamine (TPD15), or 4,4',4"-
Tris (carbazol sol-9-yl) triphenylamine (TCTA), or may include an epoxy resin or an
acrylate such as methacrylate. Alternatively, when the capping layer 220 includes
an inorganic material, the capping layer 220 includes an alkali metal compound such
as at least one of LiF, an alkaline earth metal compound such as MgF
2, silicon oxide (SiO
2), silicon nitride (SiN
x), or silicon oxynitride (SiON). The capping layer 220 may have a single or multi-layer
structure. Because the capping layer 220 is provided on the display element 210, the
efficiency of light emitted from the display element 210 is increased.
[0066] The thin-film encapsulation layer 300 is disposed on the capping layer 220. The thin-film
encapsulation layer 300 includes at least one inorganic encapsulation layer and at
least one organic encapsulation layer. For example, the thin-film encapsulation layer
300 includes a first inorganic encapsulation layer 310, an organic encapsulation layer
320, and a second inorganic encapsulation layer 330 that are sequentially stacked.
[0067] The first inorganic encapsulation layer 310 includes at least one inorganic material.
For example, the first inorganic encapsulation layer 310 includes at least one of
a ceramic, a metal oxide, a metal nitride, a metal carbide, a metal oxynitride, indium
oxide (In
2O
3), tin oxide (SnO
2), ITO, silicon oxide, silicon nitride, and/or silicon oxynitride. The first inorganic
encapsulation layer 310 may have a single or multi-layer structure.
[0068] The organic encapsulation layer 320 includes at least one of acryl, methacrylic,
polyester, polyethylene, polypropylene, PET, PEN, PC, PI, polyethylene sulfonate,
polyoxymethylene, polyaylate, or HMDSO.
[0069] The second inorganic encapsulation layer 330 covers the organic encapsulation layer
320, and includes at least one of a ceramic, a metal oxide, a metal nitride, a metal
carbide, a metal oxynitride, indium oxide (In
2O
3), tin oxide (SnO
2), ITO, silicon oxide, silicon nitride, and/or silicon oxynitride. The second inorganic
encapsulation layer 330 may have a single or multi-layer structure. The second inorganic
encapsulation layer 330 contacts the first inorganic encapsulation layer 310 at an
edge located outside the display area DA and prevents the organic encapsulation layer
320 from being externally exposed.
[0070] As such, since the thin-film encapsulation layer 300 includes the first inorganic
encapsulation layer 310, the organic encapsulation layer 320, and the second inorganic
encapsulation layer 330, even when cracks occur in the thin-film encapsulation layer
300, due to the multi-layer structure, the cracks do not connect the first inorganic
encapsulation layer 310 and the organic encapsulation layer 320 or the organic encapsulation
layer 320 and the second inorganic encapsulation layer 330. Accordingly, the formation
of a path through which external moisture or oxygen can penetrate into the display
layer 200 is prevented or minimized.
[0071] FIG. 4 is a cross-sectional view of a part of a polarization film of a display apparatus,
according to an embodiment.
[0072] Referring to FIG. 4, in an embodiment, the display apparatus 1 (see FIG. 2) includes
the display panel 10 (see FIG. 2) and the polarization film 40, and the polarization
film 40 includes a polarization layer 410, a phase retardation layer 420, a phase
compensation layer 430, and a protective substrate 440.
[0073] The polarization layer 410 polarizes light received from a light source into light
of the same direction as a polarization axis. The polarization layer 410 includes
a polarizer and/or a dichroic dye in a polyvinyl alcohol (PVA) film. The dichroic
dye includes iodine molecules and/or dye molecules. Alternatively, the polarization
layer 410 is formed by stretching a PVA film in one direction and immersing the PVA
film in a solution of iodine and/or dichroic dye. For example, the iodine molecules
and/or dichroic dye molecules are arranged in a direction parallel to a stretching
direction. Since the iodine molecules and the dye molecules exhibit dichroism, the
iodine molecules and the dye molecules absorb light that oscillates in the stretching
direction and transmits light that oscillates in a direction perpendicular to the
stretching direction.
[0074] The phase retardation layer 420 is disposed under the polarization layer 410. The
phase retardation layer 420 delays a phase of light polarized through the polarization
layer 410. Light passing through the phase retardation layer 420 is converted into
circularly polarized light or elliptically polarized light. Accordingly, light reflectance
is reduced. The phase retardation layer 420 is located farther from a light source
than the polarization layer 410. For example, when external light is incident on the
polarization layer 410, the phase retardation layer 420 is located under the polarization
layer 410.
[0075] The phase retardation layer 420 includes a positive A plate. For example, the phase
retardation layer 420 is a positive A plate. However, embodiments of the disclosure
are not necessarily limited thereto. In other embodiments, the phase retardation layer
420 is one of a negative A plate, a positive C plate, or a negative C plate. The phase
retardation layer 420 includes a quarter-wave plate (QWP). For example, the phase
retardation layer 420 is a QWP. The phase retardation layer 420 is formed of at least
one of PC, tri-acetyl cellulose (TAC), or a cyclo-olefin polymer.
[0076] The phase compensation layer 430 includes a first phase compensation layer 431 and
a second phase compensation layer 433. The first phase compensation layer 431 includes
a positive C plate. For example, the first phase compensation layer 431 is a positive
C plate. However, embodiments of the disclosure are not necessarily limited thereto.
In other embodiments, the first phase compensation layer 431 is one of a positive
A plate, a negative A plate, or a negative C plate. The first phase compensation layer
431 is formed of at least one of PC, TAC, or a cyclo-olefin polymer.
[0077] The second phase compensation layer 433 includes a TAC film. For example, the second
phase compensation layer 433 is a TAC film. The second phase compensation layer 433
includes at least one of PC or a cyclo-olefin polymer. Alternatively, in other embodiments,
the second phase compensation layer 433 includes one of a positive C plate, a positive
A plate, a negative A plate, or a negative C plate. The second phase compensation
layer 433 supports the polarization layer 410 and compensates for the mechanical strength
of the polarization layer 410.
[0078] The protective substrate 440 is disposed on the polarization layer 410. The protective
substrate 440 protects the polarization layer 410 and compensates for the mechanical
strength of the polarization layer 410. The protective substrate 440 includes at least
one of TAC, cyclo-olefin polymer, polymethyl methacrylate (PMMA), or polyethylene
terephthalate (PET).
[0079] In an embodiment, the second phase compensation layer 433 is disposed on the first
phase compensation layer 431, and the phase retardation layer 420 is located between
the first phase compensation layer 431 and the second phase compensation layer 433.
In addition, the polarization layer 410 is located on the second phase compensation
layer 433, and the protective substrate 440 may be located on the polarization layer
410.
[0080] FIG. 5 is a cross-sectional view of a part of a polarization film of a display apparatus,
according to an embodiment. An embodiment of FIG. 5 differs from an embodiment of
FIG. 4 in that the second phase compensation layer 433 is located under the phase
retardation layer 420. In FIG. 5, the same members are denoted by the same reference
numerals, and thus a repeated description thereof will be omitted.
[0081] Referring to FIG. 5, in an embodiment, the second phase compensation layer 433 is
disposed on the first phase compensation layer 431, and the phase retardation layer
420 is disposed on the second phase compensation layer 433. In addition, the polarization
layer 410 is disposed on the phase retardation layer 420, and the protective substrate
440 is disposed on the polarization layer 410. For example, the phase retardation
layer 420 is located between the second phase compensation layer 433 and the polarization
layer 410.
[0082] In an embodiment, the second phase compensation layer 433 includes a negative C plate.
For example, the second phase compensation layer 433 is a negative C plate. When the
second phase compensation layer 433 is a negative C plate, the second phase compensation
layer 433 is located on a side of the phase retardation layer 420. For example, when
the second phase compensation layer 433 is a negative C plate, the second phase compensation
layer 433 is located between the phase retardation layer 420 and the polarization
layer 410, or is located between the first phase compensation layer 431 and the phase
retardation layer 420.
[0083] FIGS. 6 and 7 are cross-sectional views of a display apparatus, according to an embodiment.
The display panel 10 of FIGS. 6 and 7 corresponds to the display panel 10 of FIG.
3, and the polarization films 40 of FIGS. 6 and 7 respectively correspond to the polarization
films 40 of FIGS. 4 and 5. The input sensing layer 30 (see FIG. 2) is disposed between
the display panel 10 and the polarization layer 40, as described with reference to
FIG. 2.
[0084] Referring to FIGS. 6 and 7, the display apparatus 1 according to an embodiment includes
the display panel 10 and the polarization film 40. The display panel 10 includes the
display element 210 (see FIG. 3) and the thin-film encapsulation layer 300 (see FIG.
3) disposed on the display element 210 (see FIG. 3). In addition, the polarization
film 40 includes the polarization layer 410, the phase retardation layer 420, and
the phase compensation layer 430.
[0085] The thin-film encapsulation layer 300 of the display panel 10 includes the first
inorganic encapsulation layer 310 (see FIG. 3), the organic encapsulation layer 320
(see FIG. 3), and the second inorganic encapsulation layer 330 (see FIG. 3), and each
of the first inorganic encapsulation layer 310 and the second inorganic encapsulation
layer 330 includes at least one inorganic material. The first inorganic encapsulation
layer 310 and the second inorganic encapsulation layer 330 include a plurality of
layers that have different refractive indices. For example, the thin-film encapsulation
layer 300 of the display panel 10 includes multiple layers that have a large refractive
index difference.
[0086] The display apparatus 1 should display black on a screen when power is turned off.
For example, when a pixel structure of the display apparatus 1 is visible to a user
as is, the aesthetics of a product decrease. Accordingly, the screen should appear
black in a power-off state of the display apparatus 1.
[0087] For example, a thickness direction phase difference Rth of the display apparatus
1 satisfies Equation 1.

[0088] When the thickness direction phase difference Rth of the display apparatus 1 is greater
than ±1.5 nm, for example, when the thickness direction phase difference Rth of the
display apparatus 1 does not satisfy Equation 1, a reflectance increases in a power-off
state, a reflection color of black shifts to a specific color, such as green, which
hinders a seamless design.
[0089] Accordingly, when the thickness direction phase difference Rth of the display apparatus
1 is within ±1.5nm, a reflection color of the display apparatus 1 is prevented from
shifting to a specific color, such as green, and a reflection color change for each
azimuth is minimized in a power-off state of the display apparatus 1.
[0090] However, when the display panel 10 includes the thin-film encapsulation layer 300
that includes multiple layers that have a large refractive index difference, a thickness
direction phase difference Rth1 of the display panel 10 changes. For example, when
the display panel 10 includes the thin-film encapsulation layer 300 that includes
multiple layers that have a large refractive index difference, the thickness direction
phase difference Rth1 of the display panel decreases due to a change in a resonance
structure. For example, as described below, because the thickness direction phase
difference Rth1 of the display panel 10 has a negative value, when the thickness direction
phase difference Rth1 of the display panel 10 decreases, an absolute value of the
thickness direction phase difference Rth1 of the display panel 10 increases.
[0091] In an embodiment, when the display panel 10 includes the thin-film encapsulation
layer 300 that includes multiple layers that have a large refractive index difference,
the thickness direction phase difference Rth1 of the display panel 10 with respect
to a wavelength of 550 nm is about -35 nm or less. For example, the thickness direction
phase difference Rth1 of the display panel 10 can be expressed as in Equation 2.

[0092] Alternatively, in an embodiment, when the display panel 10 includes the thin-film
encapsulation layer 300 that includes multiple layers that have a large refractive
index difference, the thickness direction phase difference Rth1 of the display panel
with respect to a wavelength of 550 nm is about -25 nm or less.
[0093] A thickness direction phase difference Rth2 of the phase retardation layer 420 of
the polarization film 40 is about +71 nm. For example, the thickness direction phase
difference Rth2 of the phase retardation layer 420 of the polarization film 40 with
respect to a wavelength of 550 nm is about +71 nm.
[0094] A thickness direction phase difference Rth3 of the first phase compensation layer
431 of the polarization film 40 can be derived by Equation 3.

[0095] In Equation 3, nx denotes a refractive index of the first phase compensation layer
431 in an x-direction, ny denotes a refractive index of the first phase compensation
layer 431 in a y-direction, nz is a refractive index of the first phase compensation
layer 431 in a z-direction, and d is a thickness (nm) of the first phase compensation
layer 431.
[0096] When the first phase compensation layer 431 of the polarization film 40 includes
a positive C plate, because nz > nx = ny, the thickness direction phase difference
Rth3 of the first phase compensation layer 431 has a negative value.
[0097] As a thickness of the first phase compensation layer 431 decreases, the thickness
direction phase difference Rth3 of the first phase compensation layer 431 increases.
For example, because the thickness direction phase difference Rth3 of the first phase
compensation layer 431 has a negative value, when the thickness direction phase difference
Rth3 of the first phase compensation layer 431 increases, an absolute value of the
thickness direction phase difference Rth3 of the first phase compensation layer 431
decreases.
[0098] As described above, when the display panel 10 includes the thin-film encapsulation
layer 300 that includes multiple layers that have a large refractive index difference,
because the thickness direction phase difference Rth1 of the display panel 10 decreases,
the thickness direction phase difference Rth of the display apparatus 1 can satisfy
Equation 1 by increasing the thickness direction phase difference Rth3 of the first
phase compensation layer 431.
[0099] For example, the thickness direction phase difference Rth3 of the first phase compensation
layer 431 can be increased by reducing a thickness of the first phase compensation
layer 431. However, the thickness direction phase difference Rth3 of the first phase
compensation layer 431 is about -40 nm due to the minimum coating thickness restriction
of a process of manufacturing the first phase compensation layer 431. For example,
when the first phase compensation layer 431 includes a positive C plate, the first
phase compensation layer 431 is formed by, in the following order, coating the alignment
layer, orienting the alignment layer, coating the liquid crystal, and performing UV
curing. A thickness of the first phase compensation layer 431 is not reduced to the
extent that the thickness direction phase difference Rth3 of the first phase compensation
layer 431 exceeds about -40 nm due to the minimum coating thickness restriction of
a coating process. The thickness direction phase difference Rth3 of the first phase
compensation layer 431 with respect to a wavelength of 550 nm is about -40 nm. For
example, the thickness direction phase difference Rth3 of the first phase compensation
layer 431 can be expressed as in Equation 4.

[0100] Accordingly, for the thickness direction phase difference Rth of the display apparatus
1 to satisfy Equation 1, a compensation layer having a positive thickness direction
phase difference is further required.
[0101] In an embodiment, the polarization film 40 includes the second phase compensation
layer 433, and the second phase compensation layer 433 has a positive thickness direction
phase difference. The second phase compensation layer 433 includes one of a TAC film
or a negative C plate. For example, when the second phase compensation layer 433 includes
a TAC film, as shown in FIG. 6, the second phase compensation layer 433 is located
between the phase retardation layer 420 and the polarization layer 410. In contrast,
when the second phase compensation layer 433 includes a negative C plate, as shown
in FIGS. 6 and 7, the second phase compensation layer 433 may be located between the
phase retardation layer 420 and the polarization layer 410, or may be located between
the first phase compensation layer 431 and the phase retardation layer 420.
[0102] A thickness direction phase difference Rth4 of the second phase compensation layer
433 is about +4 nm or more. For example, the thickness direction phase difference
Rth4 of the second phase compensation layer 433 with respect to a wavelength of 550
nm is about +4 nm or more. For example, the thickness direction phase difference Rth4
of the second phase compensation layer 433 can be expressed as in Equation 5.

[0103] In an embodiment, since the polarization film 40 includes the second phase compensation
layer 433 that has the thickness direction phase difference Rth4 of +4 nm or more,
the entire thickness direction phase difference Rth of the display apparatus 1 that
includes the polarization film 40 has a value within ±1.5 nm, and thus, a reflection
color of the display apparatus 1 does not shift to a specific color, such as green,
and a reflection color change for each azimuth in a power-off state of the display
apparatus 1 is minimized.
[0104] For example, the display apparatus 1 includes the display panel 10 and the polarization
film 40. For example, the display panel 10 of the display apparatus 1 includes the
thin-film encapsulation layer 300 that includes multiple layers that have a large
refractive index difference, and the polarization film 40 of the display apparatus
1 includes the polarization layer 410, the phase retardation layer 420, the first
phase compensation layer 431, and the second phase compensation layer 433. In addition,
when the thickness direction phase difference Rth1 of the display panel 10 that includes
the thin-film encapsulation layer 300 that includes multiple layers that have a large
refractive index difference is less than or equal to about -35 nm, the thickness direction
phase difference Rth2 of the phase retardation layer 420 is about +71 nm, the thickness
direction phase difference Rth3 of the first phase compensation layer 431 is less
than or equal to about -40 nm, and the thickness direction phase difference Rth4 of
the second phase compensation layer 433 is greater than or equal to about +4 nm, because
the entire thickness direction phase difference Rth of the display apparatus 1 has
a value within ±4 nm. Thus, a reflection color of the display apparatus 1 is prevented
from shifting to a specific color, such as green, and a reflection color change for
each azimuth in a power-off state of the display apparatus 1 is minimized.
[0105] FIGS. 8A to 8D are graphs of reflection chroma as a function of a change in a viewing
angle in a CIE L*a*b* coordinate system, when an entire thickness direction phase
difference of a display apparatus is about -67 nm, about -47 nm, about -17 nm, and
about 0 nm. For example, FIG. 8A is a graph of reflection chroma in a CIE L*a*b* coordinate
system when an entire thickness direction phase difference Rth of a display apparatus
is about -67 nm. FIG. 8B is a graph of reflection chroma in a CIE L*a*b* coordinate
system when the entire thickness direction phase difference Rth of the display apparatus
is about -47 nm. FIG. 8C is a graph of reflection chroma in a CIE L*a*b* coordinate
system when the entire thickness direction phase difference Rth of the display apparatus
is about -17 nm. FIG. 8D is a graph of reflection chroma in a CIE L*a*b* coordinate
system when the entire thickness direction phase difference Rth of the display apparatus
is about 0 nm. In addition, a* and b* of FIGS. 8A to 8D denote values measured for
an azimuth angle of ϕ= 0 to 360° at a polar angle of 60°.
[0106] In FIGS. 8A to 8D, when a*=0 and b*=0 in CIE L*a*b* color space coordinates, a reflection
chroma refers to neutral black.
[0107] In the CIE L*a*b* coordinate system, as a distance from a*=0 and b*=0 increases,
for example, +a* indicates a red direction, -a* indicates a green direction, +b* indicates
a yellow direction, and -b* indicates a blue direction. For example, in the CIE L*a*b*
coordinate system, as a distance from a*=0 and b*=0 increases, a first quadrant indicates
a red-based color, a second quadrant indicates a green-based color, a third quadrant
indicates a blue-based color, and a fourth quadrant indicates a purple-based color.
Alternatively, when a* is a negative value, it represents a color closer to green;
when a* is a positive value, it represents a color closer to red or purple; when b*
is a negative value, it represents blue; and when b* is a positive value, it represents
a color closer to yellow.
[0108] When a distance from coordinates a*=0 and b*=0 increases, a reflected light chroma
increases. In addition, when a reflected light chroma increases, a color is visibly
recognized and black visibility decreases.
[0109] Referring to FIGS. 8A to 8D, when the entire thickness direction phase difference
Rth of the display apparatus 1 decreases, a distance from a*=0 and b*=0 increases.
For example, because the entire thickness direction phase difference Rth of the display
apparatus 1 has a negative value, when an absolute value of the entire thickness direction
phase difference Rth of the display apparatus 1 increases, a distance from a*=0 and
b*=0 increases.
[0110] For example, when the entire thickness direction phase difference Rth of the display
apparatus 1 is about -67 nm, a* and b* values are respectively farther from a*=0 and
b*=0 than when the entire thickness direction phase difference Rth of the display
apparatus 1 is about -47 nm. When the entire thickness direction phase difference
Rth of the display apparatus 1 is about -47 nm, a* and b* values are respectively
farther from a*=0 and b*=0 than when the entire thickness direction phase difference
Rth of the display apparatus 1 is about -17 nm. When the entire thickness direction
phase difference Rth of the display apparatus 1 is about -17 nm, a* and b* values
are respectively farther from a*=0 and b*=0 than when the entire thickness direction
phase difference Rth of the display apparatus 1 is about 0 nm. In addition, when the
entire thickness direction phase difference Rth of the display apparatus 1 is about
0 nm, a* and b* values are closer to 0 than in other cases.
[0111] Accordingly, as the entire thickness direction phase difference Rth of the display
apparatus 1 increases, black visibility in a power-off state of the display apparatus
1 increases. For example, as the entire thickness direction phase difference Rth of
the display apparatus 1 approaches 0, black visibility in a power-off state of the
display apparatus 1 increases.
[0112] In addition, side characteristics azimuthal angle color distribution (AACD) can be
obtained by using the following equation:

[0113] Here, a* and b* are coordinate values in a CIE L*a*b* coordinate system, Max(a*)
and Min(a*) are respectively a maximum value and a minimum value of a* coordinate
values measured for an azimuth angle of ϕ=0 to 360°, and Max(b*) and Min(b*) are respectively
a maximum value and a minimum value of b* coordinate values measured for an azimuth
angle of ϕ=0 to 360° at a polar angle of 60°.
[0114] The side characteristics are extracted from values in the CIE L*a*b* coordinate system
according to the azimuth angle, and as a value decreases, a side color change according
to the azimuth angle decreases.
[0115] Referring to FIGS. 8A to 8D, when the entire thickness direction phase difference
Rth of the display apparatus 1 is about -67 nm, an ACCD value is about 71.63. When
the entire thickness direction phase difference Rth of the display apparatus 1 is
about -47 nm, an AACD value is about 43.26. When the entire thickness direction phase
difference Rth of the display apparatus 1 is about -17 nm, an AACD value is about
25.49, and when the entire thickness direction phase difference Rth of the display
apparatus 1 is about 0 nm, an AACD value is about 16.
[0116] Accordingly, as the entire thickness direction phase difference Rth of the display
apparatus 1 increases, an AACD value decreases. For example, as the entire thickness
direction phase difference Rth of the display apparatus 1 approaches 0, an AACD value
decreases. As an AACD value decreases, a side color change decreases according to
an azimuth angle. Accordingly, as the entire thickness direction phase difference
Rth of the display apparatus 1 approaches 0, a reflection color change decreases according
to an azimuth angle.
[0117] As described above, the display apparatus 1 includes the display panel 10 and the
polarization film 40. For example, the display panel 10 of the display apparatus 1
includes the thin-film encapsulation layer 300 that includes multiple layers that
have a large refractive index difference, and the polarization film 40 of the display
apparatus 1 includes the polarization layer 410, the phase retardation layer 420,
the first phase compensation layer 431, and the second phase compensation layer 433.
When the thickness direction phase difference Rth1 of the display panel 10 that includes
the thin-film encapsulation layer 300 that includes multiple layers that have a large
refractive index difference is less than or equal to about -35 nm, the thickness direction
phase difference Rth2 of the phase retardation layer 420 is about +71 nm, the thickness
direction phase difference Rth3 of the first phase compensation layer 431 is less
than or equal to about -40 nm, and the thickness direction phase difference Rth4 of
the second phase compensation layer 433 is greater than or equal to about +4 nm. Since
the entire thickness direction phase difference Rth of the display apparatus 1 has
a value within ±1.5 nm, black visibility in a power-off state of the display apparatus
1 increases and a reflection color change according to an azimuth angle is minimized.
[0118] In a polarization film and a display apparatus that includes the same according to
the one or more embodiments, because a thickness direction phase difference of a display
apparatus has a value within a preset range, a display apparatus is provided that
has increased visibility. However, the scope of embodiments of the disclosure is not
limited by the effect.
[0119] It should be understood that embodiments described herein should be considered in
a descriptive sense only and not for purposes of limitation. Descriptions of features
or aspects within each embodiment should typically be considered as available for
other similar features or aspects in other embodiments. While one or more embodiments
have been described with reference to the figures, it will be understood by one of
ordinary skill in the art that various changes in form and details may be made therein
without departing from the scope as defined by the following claims.
1. A display apparatus (1), comprising:
a display panel (10) that includes a display element (210) and a thin-film encapsulation
layer (300) disposed on the display element (210); and
a polarization film (40) disposed on the display panel (10) and that includes a phase
compensation layer (430), a phase retardation layer (420), and a polarization layer
(410),
wherein a thickness direction phase difference (Rth1) of the display panel (10) is
less than or equal to about -35 nm or less.
2. The display apparatus (1) of claim 1, wherein the phase compensation layer (430) comprises
a first phase compensation layer (431) and a second phase compensation layer (433).
3. The display apparatus (1) of claim 2, wherein the phase retardation layer (420) is
located between the first phase compensation layer (431) and the second phase compensation
layer (433).
4. The display apparatus (1) of at least one of claims 2 or 3, wherein the second phase
compensation layer (433) is located between the phase retardation layer (420) and
the polarization layer (410).
5. The display apparatus (1) of at least one of claims 2 to 4, wherein the first phase
compensation layer (431) comprises a positive C plate.
6. The display apparatus (1) of at least one of claims 2 to 5, wherein a thickness direction
phase difference (Rth3) of the first phase compensation layer (431) is less than or
equal to about -40 nm.
7. The display apparatus (1) of at least one of claims 2 to 6, wherein the second phase
compensation layer (433) comprises a tri-acetyl cellulose (TAC) film.
8. The display apparatus (1) of at least one of claims 2 to 7, wherein a thickness direction
phase difference (Rth4) of the second phase compensation layer (433) is greater than
or equal to about +4 nm.
9. The display apparatus (1) of at least one of claims 2 to 8, wherein the second phase
compensation layer (433) comprises a negative C plate.
10. The display apparatus (1) of at least one of claims 2 to 9, when not dependent on
claims 3 and 4, wherein the second phase compensation layer (433) is located on the
first phase compensation layer (431), and the phase retardation layer (420) is located
on the second phase compensation layer (433).
11. The display apparatus (1) of at least one of claims 1 to 10, wherein the phase retardation
layer (420) comprises a quarter-wave plate (QWP).
12. The display apparatus (1) of at least one of claims 1 to 11, wherein the polarization
film (40) further comprises a protective substrate (440) disposed on the polarization
layer (410).
13. The display apparatus (1) of at least one of claims 1 to 12, wherein the display element
(210) comprises a pixel electrode (211), a counter electrode (215), and an emission
layer (213) located between the pixel electrode (211) and the counter electrode (215).
14. The display apparatus (1) of at least one of claims 1 to 13, wherein the thin-film
encapsulation layer (300) comprises at least one inorganic encapsulation layer (310,
330) and at least one organic encapsulation layer (320).
15. The display apparatus (1) of claim 14, wherein the at least one inorganic encapsulation
layer comprises a first inorganic encapsulation layer (310) that includes at least
one inorganic material and a second inorganic encapsulation layer (330) that includes
at least one inorganic material.
16. A polarization film (40), in particular for a display apparatus as per one of claims
1 to 15,comprising:
a first phase compensation layer (431) that includes a positive C plate;
a phase retardation layer (420) disposed on the first phase compensation layer (431);
a second phase compensation layer (433) disposed on a side of the phase retardation
layer (420) and that has a thickness direction phase difference (Rth2) of greater
than or equal to about +4 nm; and
a polarization layer (410) disposed on the second phase compensation layer (433).
17. The polarization film (40) of claim 16, wherein a thickness direction phase (Rth3)
difference of the first phase compensation layer (431) is less than or equal to about
-40 nm.
18. The polarization film (40) of at least one claims 16 or 17, wherein the second phase
compensation layer (433) comprises a tri-acetyl cellulose (TAC) film or a negative
C plate.
19. The polarization film (40) of at least one claims 16 to 18, wherein the phase retardation
layer (420) comprises a quarter-wave plate (QWP).
20. The polarization film (40) of at least one claims 16 to 19, further comprising a protective
substrate (440) disposed on the polarization layer (410).
21. A display apparatus (1), comprising:
a display panel (10) that includes a display element (210) and a thin-film encapsulation
layer (300) disposed on the display element (210); and
a polarization film (40) disposed on the display panel (10) and that includes a first
phase compensation layer (431), a second phase compensation layer (433), a phase retardation
layer (420), and a polarization layer (410),
wherein a thickness direction phase difference (Rth3) of the first phase compensation
layer (431) is less than or equal to about -40 nm, and
wherein a thickness direction phase difference (Rth4) of the second phase compensation
layer (433) is greater than or equal to about +4 nm.
22. The display apparatus (1) of claim 21, wherein a thickness direction phase difference
(Rth1) of the display panel (10) is less than or equal to about -35 nm.