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(11) | EP 4 329 252 A3 |
(12) | EUROPEAN PATENT APPLICATION |
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(54) | EQUALIZER FOR REMOVING INTER SYMBOL INTERFERENCE OF DATA SIGNAL BY INCREASING PULSE WIDTHS OF LOGIC LOW LEVEL AND LOGIC HIGH LEVEL OF DATA SIGNAL |
(57) An equalizer includes a first pulse width controller that is configured to generate
a first signal by increasing a first pulse width of a first data signal having a first
logic level, the first data signal corresponding to a current data bit, a second pulse
width controller that is configured to generate a second signal by increasing a second
pulse width of the first data signal having a second logic level, a first sampler
that is configured to generate a first sampled signal by sampling the first signal,
a second sampler that is configured to generate a second sampled signal by sampling
the second signal, and a multiplexer that is configured to output the first sampled
signal or the second sampled signal based on a value of a previous data bit.
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