(19)
(11) EP 4 390 916 A3

(12) EUROPEAN PATENT APPLICATION

(88) Date of publication A3:
16.10.2024 Bulletin 2024/42

(43) Date of publication A2:
26.06.2024 Bulletin 2024/26

(21) Application number: 23218348.3

(22) Date of filing: 19.12.2023
(51) International Patent Classification (IPC): 
G09G 5/12(2006.01)
(52) Cooperative Patent Classification (CPC):
G09G 3/32; G09G 5/12; G09G 2310/08; G09G 2310/0202; G09G 2310/061; G09G 2310/0251; G09G 2310/0205; G09G 2300/0809
(84) Designated Contracting States:
AL AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HR HU IE IS IT LI LT LU LV MC ME MK MT NL NO PL PT RO RS SE SI SK SM TR
Designated Extension States:
BA
Designated Validation States:
KH MA MD TN

(30) Priority: 19.12.2022 US 202263433646 P
23.05.2023 US 202318322279
29.06.2023 US 202318216459
30.06.2023 US 202318217201
30.06.2023 US 202318217261
30.06.2023 US 202318217268
12.07.2023 US 202318351243
11.08.2023 US 202318233115

(71) Applicant: Stereyo BV
9810 Nazareth (BE)

(72) Inventors:
  • Thielemans, Robbie
    9810 Nazareth (BE)
  • Dundee, Vince
    Glendale, 91221 (US)

(74) Representative: Winger 
Mouterij 16 bus 101
3190 Boortmeerbeek
3190 Boortmeerbeek (BE)

   


(54) ACTIVE MATRIX DISPLAY, SYSTEM, AND METHOD


(57) An active matrix display is disclosed, wherein, in the pixel circuits thereof comprising each a light-emitting element, at least two transistors and a storage capacitor, one of the transistors being provided, is intended for discharging purposes of the storage capacitor. An active matrix display is also disclosed, having at least two drive circuits, wherein at least one of the pixel circuits driven by a data driver of a first drive circuit is residing physically within a second drive circuit, or vice versa. Further, an active matrix is disclosed, wherein the timing of scan signals and updating of data signals is programmed in relation to the operation of a camera recording an image that is displayed on the active matrix display.







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