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(11) | EP 4 472 084 A3 |
(12) | EUROPEAN PATENT APPLICATION |
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(54) | HIGH EFFICIENCY POWER AMPLIFIER ARCHITECTURES FOR RF APPLICATIONS |
(57) A parallel delta sigma signal modulator comprising: a signal demultiplexer configured
to receive an input signal and to demultiplex the input signal into a plurality of
streams of symbols at symbol boundaries; a plurality of delta sigma modulators waveform
signal encoders, where each delta sigma modulator waveform signal encoder is configured
to receive a stream of symbols from the plurality of streams of symbols and to generate
an delta sigma modulated output and where each waveform signal encoder comprises a
noise shaping filter that is un-constrained; and a signal multiplexer configured to
receive a plurality of delta sigma modulated outputs from the plurality of waveform
signal encoders delta sigma modulators and to multiplex together the plurality of
delta sigma modulated outputs into a pulse train.
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