BIAS CURRENT WITH HYBRID TEMPERATURE PROFILE

(19)

(11)

EP 4 513 292 A3

(12)	EUROPEAN PATENT APPLICATION

(88)	Date of publication A3:
	18.06.2025 Bulletin 2025/25

(43)	Date of publication A2:
	26.02.2025 Bulletin 2025/09

(21)	Application number: 24189704.0

(22)	Date of filing: 19.07.2024

(51)

International Patent Classification (IPC):

G05F 3/24^(2006.01)

G05F 3/26^(2006.01)

(52)	Cooperative Patent Classification (CPC):
	G05F 3/262; G05F 3/245

(84)	Designated Contracting States:
	AL AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HR HU IE IS IT LI LT LU LV MC ME MK MT NL NO PL PT RO RS SE SI SK SM TR
	Designated Extension States:
	BA
	Designated Validation States:
	GE KH MA MD TN

(30)

Priority:

22.08.2023 US 202318453882

(71)	Applicant: Analog Devices, Inc.
	Wilmington, MA 01887 (US)

(72)	Inventors:
	WRENNER, Kevin Wilmington, 01887 (US) YUN, Ruida Wilmington, 01887 (US) RICHARDSON, Kenneth Wilmington, 01887 (US)

(74)	Representative: Horler, Philip John
	Withers & Rogers LLP 2 London Bridge London SE1 9RA London SE1 9RA (GB)

(54)	BIAS CURRENT WITH HYBRID TEMPERATURE PROFILE

(57) Aspects of the present disclosure include a scalable proportional to absolute temperature (PTAT) hybrid circuit, comprising a bias mirror circuit configured to provide a zero temperature coefficient (ZTC) current, a PTAT control circuit configured to generate, based on the ZTC current, a PTAT current with a slope having a non-zero value, alter the PTAT current by at least scaling the PTAT current or changing the slope of the PTAT current to generate an altered PTAT current, and provide the altered PTAT current, a hybrid circuit configured to receive the ZTC current and the altered PTAT current, and output a larger current of the ZTC current and the altered PTAT current as a hybrid current.

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