(19)
(11) EP 4 824 793 A1

(12)

(43) Date of publication:
21.10.2026 Bulletin 2026/43

(21) Application number: 24904574.1

(22) Date of filing: 10.07.2024
(51) International Patent Classification (IPC): 
G11C 29/42(2006.01)
G11C 29/52(2006.01)
(52) Cooperative Patent Classification (CPC):
G11C 29/42
(86) International application number:
PCT/US2024/037436
(87) International publication number:
WO 2025/128160 (19.06.2025 Gazette 2025/25)
(84) Designated Contracting States:
AL AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HR HU IE IS IT LI LT LU LV MC ME MK MT NL NO PL PT RO RS SE SI SK SM TR
Designated Extension States:
BA
Designated Validation States:
GE KH MA MD TN

(30) Priority: 15.12.2023 US 202363611083 P
08.07.2024 US 202418766219

(71) Applicants:
  • Advanced Micro Devices, Inc.
    Santa Clara, CA 95054 (US)
  • ATI Technologies ULC
    Markham, ON L3T 7X6 (CA)

(72) Inventors:
  • LITT, Michael
    Thornhill, Ontario L3T 7X6 (CA)
  • YAO, Yubin
    Santa Clara, California 95054 (US)
  • SRIDHARAN, Vilas
    Boxborough, Massachusetts 01719 (US)

(74) Representative: Marks & Clerk LLP 
15 Fetter Lane
London EC4A 1BW
London EC4A 1BW (GB)

   


(54) DETECTING ERRORS WITHIN DATA PATH CIRCUITRY OF A MEMORY DEVICE