(57) A plurality of color graphic memories (41,51,61) are assigned the same address space,
and are connected to a common data bus (X1). It is determined by a separately output memory select data which one of the color
graphic memories (41,51,61) is to be written into. In the case of writing the same
data into two or more of the color graphic memories (41,51,61) at the same address,
the color graphic memories to be written into are selected by the memory select data
first and then the same data is written into the selected colour graphic memories
in the same write cycle.
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