(19)
(11) EP 0 186 818 A3

(12) EUROPEAN PATENT APPLICATION

(88) Date of publication A3:
18.03.1987 Bulletin 1987/12

(43) Date of publication A2:
09.07.1986 Bulletin 1986/28

(21) Application number: 85115710

(22) Date of filing: 10.12.1985
(84) Designated Contracting States:
DE FR GB

(30) Priority: 31.12.1984 US 687696

(71) Applicant: International Business Machines Corporation
 ()

(72) Inventors:
  • Marks, Robert
     ()
  • Phelps, Douglas Wallace, Jr.
     ()
  • Ward, William Carroll
     ()

   


(54) Chip to pin interconnect method


(57) A self aligning integrated circuit package including a flexible insulated lead frame (11) and a flip chip (16) having a plurality of input/output solder balls (17) in predetermined positions thereon. The lead frame is provided with a plurality of flexible metallic leads (13) on an insulation coating. A plurality of openings is etched in the insulating coating over the ends of the leads to be connected to the solder balls on the chip. These openings in the insulation are in the same pattern as the balls on the chip and act as a jig to assure that the chip is properly positioned on the lead frame and that the solder balls are contained in a restricted area and provide significant electrical contact to the exposed lead frames.






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