(19)
(11) EP 0 313 848 A3

(12) EUROPEAN PATENT APPLICATION

(88) Date of publication A3:
26.09.1990 Bulletin 1990/39

(43) Date of publication A2:
03.05.1989 Bulletin 1989/18

(21) Application number: 88116088.1

(22) Date of filing: 29.09.1988
(51) International Patent Classification (IPC)4: G06F 11/00
(84) Designated Contracting States:
DE FR GB IT

(30) Priority: 30.10.1987 US 115479

(71) Applicant: MOTOROLA INC.
Schaumburg Illinois 60196 (US)

(72) Inventors:
  • Vaglica, John J.
    Austin Texas 78748 (US)
  • Hartvigsen, Jay A.
    Austin Texas 78749 (US)
  • Gray, Rand L.
    Hillsboro Oregon 97123 (US)

(74) Representative: Ibbotson, Harold et al
Motorola, European Intellectual Property, Midpoint, Alencon Link,
Basingstoke, Hampshire RG21 1PL
Basingstoke, Hampshire RG21 1PL (GB)


(56) References cited: : 
   
       


    (54) Data processor with development support features


    (57) A data processor (11) with development support features includes an alternate mode of operation in which instructions are received by means of an externally-controlled path. The connections used by the externally-controlled path are not shared by any system resources accessible to the data processor (11) in the normal mode of operation, but are used by other development support features in the normal mode. In a preferred embodiment, an integrated circuit microcomputer (10) includes such a data processor (11) as its CPU. The CPU (11) has access to on-chip peripherals and memory, in addition to off-chip peripherals (13,15) and memory (14), in both the normal and alternate modes of operation, by means of a parallel bus (12) which it operates as a bus master. In the alternate mode, the CPU receives instructions by means of a serial bus on which the CPU is a slave device.







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