Method of manufacturing a semi-conductor device

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EP 0 380 326 A3

(12)	EUROPEAN PATENT APPLICATION

(88)	Date of publication A3:
	11.03.1992 Bulletin 1992/11

(43)	Date of publication A2:
	01.08.1990 Bulletin 1990/31

(21)	Application number: 90300752.4

(22)	Date of filing: 24.01.1990

(51)	International Patent Classification (IPC)⁵: C23C 14/08, C23C 14/06, H01L 29/95, H01L 21/3205, H01L 21/3105, H01G 7/06

(84)	Designated Contracting States:
	DE FR GB NL

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Priority:

26.01.1989 JP 17218/89
27.01.1989 JP 18710/89
27.01.1989 JP 18711/89
08.02.1989 JP 28942/89

(71)	Applicant: SEIKO EPSON CORPORATION
	Shinjuku-ku Tokyo (JP)

(72)	Inventor:
	Takenaka, Kazuhiro Suwa-shi, Nagano-ken (JP)

(74)	Representative: Sturt, Clifford Mark et al
	J. MILLER & CO. 34 Bedford Row, Holborn London WC1R 4JH London WC1R 4JH (GB)

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References cited: :

(54)	Method of manufacturing a semi-conductor device

(57) A semi-conductor device is manufactured by forming on a silicon substrate 101, source and drain diffusion layers 103 and 104, an insulation film 102, a gate film 105, a gate electrode 106 and an insulation film 107. A contact hole 108 is formed through the films 107 and 105 and a bottom electrode 109 for a ferro-electric film is formed on the film 107 and in the hole 108. A ferro-electric film 110 of PbTiO₃ or PZT or PLZT is sputtered onto the electrode 109 and film 107 and it is treated by ion implantation of Pb to correct the composition thereof to stoichiometric composition. Thereafter, annealing takes place at above 500°C to improve the crystalline characteristics of the film. A top electrode 111 is formed on the shaped film 110 and the whole protected by a passivation layer 112.

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