(19)
(11) EP 0 671 691 A3

(12) EUROPEAN PATENT APPLICATION

(88) Date of publication A3:
04.12.1996 Bulletin 1996/49

(43) Date of publication A2:
13.09.1995 Bulletin 1995/37

(21) Application number: 95101369.7

(22) Date of filing: 01.02.1995
(51) International Patent Classification (IPC)6: G06F 13/12, G06F 13/38
(84) Designated Contracting States:
DE FR GB

(30) Priority: 09.02.1994 JP 15255/94

(71) Applicant: HITACHI, LTD.
Chiyoda-ku, Tokyo 100 (JP)

(72) Inventors:
  • Satoh, Takao
    Sagamihara-shi, Kanagawa-ken (JP)
  • Takeuchi, Hisaharu
    Odawara-shi, Kanagawa-ken (JP)
  • Inoue, Yasuo
    Odawara-shi, Kanagawa-ken (JP)
  • Yamamoto, Akira
    Sagamihara-shi, Kanagawa-ken (JP)

(74) Representative: Strehl Schübel-Hopf Groening & Partner 
Maximilianstrasse 54
80538 München
80538 München (DE)

   


(54) Storage controller and bus control method for use therewith


(57) A storage controller (2; 2a) comprising a storage device adapter (22; 522), a channel adapter (21a, 21b; 521a, 521b), a cache memory (24), a control memory (23), and a plurality of buses (26, 27; 56-58) connecting therebetween. The channel adapter communicates with a processor (1) and processes input/output requests issued by the processor. The storage device adapter controls a storage device (3) and data transfer between the storage device and the cache memory. The channel adapter and the storage device adapter exchanges control information via the control memory. The buses are used to transfer the data and the control information between the cache memory and the control memory, and the channel adapter and the storage device adapter. The controller also comprises bus load estimating means and bus mode selecting means. The bus load estimating means (201, 202) estimates bus load characteristics as an index based on the amount of data transfer during sequential access to the storage device. The bus mode selecting means (203) determines a bus mode of bus utilization based on the index. Each of the channel adapter and the storage device adapter has bus access means for accessing the buses in accordance with the bus mode selected by the bus mode selecting means.






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