(19)
(11) EP 1 174 899 A3

(12) EUROPEAN PATENT APPLICATION

(88) Date of publication A3:
18.09.2002 Bulletin 2002/38

(43) Date of publication A2:
23.01.2002 Bulletin 2002/04

(21) Application number: 01306009.0

(22) Date of filing: 12.07.2001
(51) International Patent Classification (IPC)7: H01J 3/02
(84) Designated Contracting States:
AT BE CH CY DE DK ES FI FR GB GR IE IT LI LU MC NL PT SE TR
Designated Extension States:
AL LT LV MK RO SI

(30) Priority: 17.07.2000 US 617876

(71) Applicant: Hewlett-Packard Company
Palo Alto, CA 94304 (US)

(72) Inventors:
  • Lam, Si-Ty
    Pleasanton, CA 94588 (US)
  • Birecki, Henryk
    Palo Alto, CA 94303 (US)
  • Kuo, Huei-Pei
    Cupertino, CA 95014 (US)
  • Naberhuis, Steven L.
    Freemont, CA 94536 (US)

(74) Representative: Powell, Stephen David et al
WILLIAMS, POWELL & ASSOCIATES 4 St Paul's Churchyard
London EC4M 8AY
London EC4M 8AY (GB)

   


(54) Electron source device


(57) A self-aligned electron device (10) includes emitter (13), extraction electrode (17), and focus electrode (21) separated by dielectric layers, (11, 15, 19). A single cavity (23) extending through the electrodes and the dielectric layers and terminating at the emitter electrode (13) is formed by a single photolithography step and an etching process. A composite emitter (1) including a base (3) disposed on the emitter electrode (13) and a conical tip (5) disposed on the base (3) and terminating at a vertex V is formed in the cavity (23). The base (3) can be made from materials including titanium, chromium, or doped silicon. The tip (5) can be made from a wide variety of materials including a refractory metal, a metal alloy, a silicon alloy, a carbide, a nitride, or an electroformable metal. The cavity (23) and the composite emitter (1) are self-aligned relative to each other. The dielectric layers can be etched back to reduce or eliminate charge accumulation on cavity-facing portions (43, 45) of the dielectric layers. A composite layer including a dielectric and mechanical strength enhancement layer (15a, 19a) of silicon nitride or silicon carbide and a pull-back layer (15b, 19b) of silicon oxide on top of the etch stop layer can be used to form the dielectric layers.






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